Commit | Line | Data |
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12a67cf6 SS |
1 | #include <linux/threads.h> |
2 | #include <linux/cpumask.h> | |
3 | #include <linux/string.h> | |
4 | #include <linux/kernel.h> | |
5 | #include <linux/ctype.h> | |
6 | #include <linux/init.h> | |
1b9b89e7 YL |
7 | #include <linux/dmar.h> |
8 | ||
12a67cf6 SS |
9 | #include <asm/smp.h> |
10 | #include <asm/ipi.h> | |
11 | #include <asm/genapic.h> | |
12 | ||
13 | DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); | |
14 | ||
2caa3715 | 15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
1b9b89e7 | 16 | { |
d25ae38b | 17 | if (cpu_has_x2apic) |
1b9b89e7 YL |
18 | return 1; |
19 | ||
20 | return 0; | |
21 | } | |
22 | ||
12a67cf6 SS |
23 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |
24 | ||
e7986739 | 25 | static const cpumask_t *x2apic_target_cpus(void) |
12a67cf6 | 26 | { |
e7986739 | 27 | return &cpumask_of_cpu(0); |
12a67cf6 SS |
28 | } |
29 | ||
30 | /* | |
31 | * for now each logical cpu is in its own vector allocation domain. | |
32 | */ | |
e7986739 | 33 | static void x2apic_vector_allocation_domain(int cpu, cpumask_t *retmask) |
12a67cf6 | 34 | { |
e7986739 MT |
35 | cpus_clear(*retmask); |
36 | cpu_set(cpu, *retmask); | |
12a67cf6 SS |
37 | } |
38 | ||
39 | static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, | |
40 | unsigned int dest) | |
41 | { | |
42 | unsigned long cfg; | |
43 | ||
44 | cfg = __prepare_ICR(0, vector, dest); | |
45 | ||
46 | /* | |
47 | * send the IPI. | |
48 | */ | |
49 | x2apic_icr_write(cfg, apicid); | |
50 | } | |
51 | ||
52 | /* | |
53 | * for now, we send the IPI's one by one in the cpumask. | |
54 | * TBD: Based on the cpu mask, we can send the IPI's to the cluster group | |
55 | * at once. We have 16 cpu's in a cluster. This will minimize IPI register | |
56 | * writes. | |
57 | */ | |
e7986739 | 58 | static void x2apic_send_IPI_mask(const cpumask_t *mask, int vector) |
12a67cf6 SS |
59 | { |
60 | unsigned long flags; | |
61 | unsigned long query_cpu; | |
62 | ||
63 | local_irq_save(flags); | |
e7986739 MT |
64 | for_each_cpu_mask_nr(query_cpu, *mask) |
65 | __x2apic_send_IPI_dest( | |
66 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | |
67 | vector, APIC_DEST_LOGICAL); | |
12a67cf6 SS |
68 | local_irq_restore(flags); |
69 | } | |
70 | ||
e7986739 | 71 | static void x2apic_send_IPI_mask_allbutself(const cpumask_t *mask, int vector) |
12a67cf6 | 72 | { |
e7986739 MT |
73 | unsigned long flags; |
74 | unsigned long query_cpu; | |
75 | unsigned long this_cpu = smp_processor_id(); | |
12a67cf6 | 76 | |
e7986739 MT |
77 | local_irq_save(flags); |
78 | for_each_cpu_mask_nr(query_cpu, *mask) | |
79 | if (query_cpu != this_cpu) | |
80 | __x2apic_send_IPI_dest( | |
81 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | |
82 | vector, APIC_DEST_LOGICAL); | |
83 | local_irq_restore(flags); | |
84 | } | |
12a67cf6 | 85 | |
e7986739 MT |
86 | static void x2apic_send_IPI_allbutself(int vector) |
87 | { | |
88 | unsigned long flags; | |
89 | unsigned long query_cpu; | |
90 | unsigned long this_cpu = smp_processor_id(); | |
91 | ||
92 | local_irq_save(flags); | |
93 | for_each_online_cpu(query_cpu) | |
94 | if (query_cpu != this_cpu) | |
95 | __x2apic_send_IPI_dest( | |
96 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | |
97 | vector, APIC_DEST_LOGICAL); | |
98 | local_irq_restore(flags); | |
12a67cf6 SS |
99 | } |
100 | ||
101 | static void x2apic_send_IPI_all(int vector) | |
102 | { | |
e7986739 | 103 | x2apic_send_IPI_mask(&cpu_online_map, vector); |
12a67cf6 SS |
104 | } |
105 | ||
106 | static int x2apic_apic_id_registered(void) | |
107 | { | |
108 | return 1; | |
109 | } | |
110 | ||
e7986739 | 111 | static unsigned int x2apic_cpu_mask_to_apicid(const cpumask_t *cpumask) |
12a67cf6 SS |
112 | { |
113 | int cpu; | |
114 | ||
115 | /* | |
116 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | |
117 | * May as well be the first. | |
118 | */ | |
e7986739 MT |
119 | cpu = first_cpu(*cpumask); |
120 | if ((unsigned)cpu < nr_cpu_ids) | |
12a67cf6 SS |
121 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
122 | else | |
123 | return BAD_APICID; | |
124 | } | |
125 | ||
6eeb7c5a MT |
126 | static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
127 | const struct cpumask *andmask) | |
95d313cf MT |
128 | { |
129 | int cpu; | |
130 | ||
131 | /* | |
132 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | |
133 | * May as well be the first. | |
134 | */ | |
6eeb7c5a MT |
135 | cpu = cpumask_any_and(cpumask, andmask); |
136 | if (cpu < nr_cpu_ids) | |
137 | return per_cpu(x86_cpu_to_apicid, cpu); | |
95d313cf MT |
138 | return BAD_APICID; |
139 | } | |
140 | ||
f910a9dc YL |
141 | static unsigned int get_apic_id(unsigned long x) |
142 | { | |
143 | unsigned int id; | |
144 | ||
145 | id = x; | |
146 | return id; | |
147 | } | |
148 | ||
149 | static unsigned long set_apic_id(unsigned int id) | |
150 | { | |
151 | unsigned long x; | |
152 | ||
153 | x = id; | |
154 | return x; | |
155 | } | |
156 | ||
12a67cf6 SS |
157 | static unsigned int phys_pkg_id(int index_msb) |
158 | { | |
e17941b0 | 159 | return current_cpu_data.initial_apicid >> index_msb; |
12a67cf6 SS |
160 | } |
161 | ||
162 | static void x2apic_send_IPI_self(int vector) | |
163 | { | |
164 | apic_write(APIC_SELF_IPI, vector); | |
165 | } | |
166 | ||
167 | static void init_x2apic_ldr(void) | |
168 | { | |
169 | int cpu = smp_processor_id(); | |
170 | ||
171 | per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); | |
172 | return; | |
173 | } | |
174 | ||
175 | struct genapic apic_x2apic_cluster = { | |
176 | .name = "cluster x2apic", | |
1b9b89e7 | 177 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, |
12a67cf6 SS |
178 | .int_delivery_mode = dest_LowestPrio, |
179 | .int_dest_mode = (APIC_DEST_LOGICAL != 0), | |
180 | .target_cpus = x2apic_target_cpus, | |
181 | .vector_allocation_domain = x2apic_vector_allocation_domain, | |
182 | .apic_id_registered = x2apic_apic_id_registered, | |
183 | .init_apic_ldr = init_x2apic_ldr, | |
184 | .send_IPI_all = x2apic_send_IPI_all, | |
185 | .send_IPI_allbutself = x2apic_send_IPI_allbutself, | |
186 | .send_IPI_mask = x2apic_send_IPI_mask, | |
e7986739 | 187 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, |
12a67cf6 SS |
188 | .send_IPI_self = x2apic_send_IPI_self, |
189 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | |
95d313cf | 190 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, |
12a67cf6 | 191 | .phys_pkg_id = phys_pkg_id, |
f910a9dc YL |
192 | .get_apic_id = get_apic_id, |
193 | .set_apic_id = set_apic_id, | |
194 | .apic_id_mask = (0xFFFFFFFFu), | |
12a67cf6 | 195 | }; |