Commit | Line | Data |
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12a67cf6 SS |
1 | #include <linux/threads.h> |
2 | #include <linux/cpumask.h> | |
3 | #include <linux/string.h> | |
4 | #include <linux/kernel.h> | |
5 | #include <linux/ctype.h> | |
6 | #include <linux/init.h> | |
1b9b89e7 YL |
7 | #include <linux/dmar.h> |
8 | ||
12a67cf6 SS |
9 | #include <asm/smp.h> |
10 | #include <asm/ipi.h> | |
11 | #include <asm/genapic.h> | |
12 | ||
13 | DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); | |
14 | ||
2caa3715 | 15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
1b9b89e7 | 16 | { |
d25ae38b | 17 | if (cpu_has_x2apic) |
1b9b89e7 YL |
18 | return 1; |
19 | ||
20 | return 0; | |
21 | } | |
22 | ||
12a67cf6 SS |
23 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |
24 | ||
bcda016e | 25 | static const struct cpumask *x2apic_target_cpus(void) |
12a67cf6 | 26 | { |
bcda016e | 27 | return cpumask_of(0); |
12a67cf6 SS |
28 | } |
29 | ||
30 | /* | |
31 | * for now each logical cpu is in its own vector allocation domain. | |
32 | */ | |
bcda016e | 33 | static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) |
12a67cf6 | 34 | { |
bcda016e MT |
35 | cpumask_clear(retmask); |
36 | cpumask_set_cpu(cpu, retmask); | |
12a67cf6 SS |
37 | } |
38 | ||
dac5f412 IM |
39 | static void |
40 | __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) | |
12a67cf6 SS |
41 | { |
42 | unsigned long cfg; | |
43 | ||
44 | cfg = __prepare_ICR(0, vector, dest); | |
45 | ||
46 | /* | |
47 | * send the IPI. | |
48 | */ | |
49 | x2apic_icr_write(cfg, apicid); | |
50 | } | |
51 | ||
52 | /* | |
53 | * for now, we send the IPI's one by one in the cpumask. | |
54 | * TBD: Based on the cpu mask, we can send the IPI's to the cluster group | |
55 | * at once. We have 16 cpu's in a cluster. This will minimize IPI register | |
56 | * writes. | |
57 | */ | |
bcda016e | 58 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) |
12a67cf6 | 59 | { |
12a67cf6 | 60 | unsigned long query_cpu; |
dac5f412 | 61 | unsigned long flags; |
12a67cf6 SS |
62 | |
63 | local_irq_save(flags); | |
dac5f412 | 64 | for_each_cpu(query_cpu, mask) { |
e7986739 MT |
65 | __x2apic_send_IPI_dest( |
66 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | |
bdb1a9b6 | 67 | vector, apic->dest_logical); |
dac5f412 | 68 | } |
12a67cf6 SS |
69 | local_irq_restore(flags); |
70 | } | |
71 | ||
dac5f412 IM |
72 | static void |
73 | x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) | |
12a67cf6 | 74 | { |
e7986739 | 75 | unsigned long this_cpu = smp_processor_id(); |
dac5f412 IM |
76 | unsigned long query_cpu; |
77 | unsigned long flags; | |
12a67cf6 | 78 | |
e7986739 | 79 | local_irq_save(flags); |
dac5f412 IM |
80 | for_each_cpu(query_cpu, mask) { |
81 | if (query_cpu == this_cpu) | |
82 | continue; | |
83 | __x2apic_send_IPI_dest( | |
e7986739 | 84 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
bdb1a9b6 | 85 | vector, apic->dest_logical); |
dac5f412 | 86 | } |
e7986739 MT |
87 | local_irq_restore(flags); |
88 | } | |
12a67cf6 | 89 | |
e7986739 MT |
90 | static void x2apic_send_IPI_allbutself(int vector) |
91 | { | |
e7986739 | 92 | unsigned long this_cpu = smp_processor_id(); |
dac5f412 IM |
93 | unsigned long query_cpu; |
94 | unsigned long flags; | |
e7986739 MT |
95 | |
96 | local_irq_save(flags); | |
dac5f412 IM |
97 | for_each_online_cpu(query_cpu) { |
98 | if (query_cpu == this_cpu) | |
99 | continue; | |
100 | __x2apic_send_IPI_dest( | |
e7986739 | 101 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
bdb1a9b6 | 102 | vector, apic->dest_logical); |
dac5f412 | 103 | } |
e7986739 | 104 | local_irq_restore(flags); |
12a67cf6 SS |
105 | } |
106 | ||
107 | static void x2apic_send_IPI_all(int vector) | |
108 | { | |
bcda016e | 109 | x2apic_send_IPI_mask(cpu_online_mask, vector); |
12a67cf6 SS |
110 | } |
111 | ||
112 | static int x2apic_apic_id_registered(void) | |
113 | { | |
114 | return 1; | |
115 | } | |
116 | ||
bcda016e | 117 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) |
12a67cf6 | 118 | { |
12a67cf6 | 119 | /* |
7d87d536 | 120 | * We're using fixed IRQ delivery, can only return one logical APIC ID. |
12a67cf6 SS |
121 | * May as well be the first. |
122 | */ | |
debccb3e IM |
123 | int cpu = cpumask_first(cpumask); |
124 | ||
e7986739 | 125 | if ((unsigned)cpu < nr_cpu_ids) |
12a67cf6 SS |
126 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
127 | else | |
128 | return BAD_APICID; | |
129 | } | |
130 | ||
debccb3e IM |
131 | static unsigned int |
132 | x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |
133 | const struct cpumask *andmask) | |
95d313cf MT |
134 | { |
135 | int cpu; | |
136 | ||
137 | /* | |
7d87d536 | 138 | * We're using fixed IRQ delivery, can only return one logical APIC ID. |
95d313cf MT |
139 | * May as well be the first. |
140 | */ | |
debccb3e | 141 | for_each_cpu_and(cpu, cpumask, andmask) { |
a775a38b MT |
142 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
143 | break; | |
debccb3e IM |
144 | } |
145 | ||
6eeb7c5a | 146 | if (cpu < nr_cpu_ids) |
7d87d536 | 147 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
debccb3e | 148 | |
95d313cf MT |
149 | return BAD_APICID; |
150 | } | |
151 | ||
ca6c8ed4 | 152 | static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x) |
f910a9dc YL |
153 | { |
154 | unsigned int id; | |
155 | ||
156 | id = x; | |
157 | return id; | |
158 | } | |
159 | ||
160 | static unsigned long set_apic_id(unsigned int id) | |
161 | { | |
162 | unsigned long x; | |
163 | ||
164 | x = id; | |
165 | return x; | |
166 | } | |
167 | ||
d4c9a9f3 | 168 | static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb) |
12a67cf6 | 169 | { |
e17941b0 | 170 | return current_cpu_data.initial_apicid >> index_msb; |
12a67cf6 SS |
171 | } |
172 | ||
173 | static void x2apic_send_IPI_self(int vector) | |
174 | { | |
175 | apic_write(APIC_SELF_IPI, vector); | |
176 | } | |
177 | ||
178 | static void init_x2apic_ldr(void) | |
179 | { | |
180 | int cpu = smp_processor_id(); | |
181 | ||
182 | per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); | |
12a67cf6 SS |
183 | } |
184 | ||
185 | struct genapic apic_x2apic_cluster = { | |
504a3c3a IM |
186 | |
187 | .name = "cluster x2apic", | |
188 | .probe = NULL, | |
189 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, | |
190 | .apic_id_registered = x2apic_apic_id_registered, | |
191 | ||
f8987a10 | 192 | .irq_delivery_mode = dest_LowestPrio, |
0b06e734 | 193 | .irq_dest_mode = 1, /* logical */ |
504a3c3a IM |
194 | |
195 | .target_cpus = x2apic_target_cpus, | |
08125d3e | 196 | .disable_esr = 0, |
bdb1a9b6 | 197 | .dest_logical = APIC_DEST_LOGICAL, |
504a3c3a IM |
198 | .check_apicid_used = NULL, |
199 | .check_apicid_present = NULL, | |
200 | ||
504a3c3a IM |
201 | .vector_allocation_domain = x2apic_vector_allocation_domain, |
202 | .init_apic_ldr = init_x2apic_ldr, | |
203 | ||
204 | .ioapic_phys_id_map = NULL, | |
205 | .setup_apic_routing = NULL, | |
206 | .multi_timer_check = NULL, | |
207 | .apicid_to_node = NULL, | |
208 | .cpu_to_logical_apicid = NULL, | |
a21769a4 | 209 | .cpu_present_to_apicid = default_cpu_present_to_apicid, |
504a3c3a IM |
210 | .apicid_to_cpu_present = NULL, |
211 | .setup_portio_remap = NULL, | |
a27a6210 | 212 | .check_phys_apicid_present = default_check_phys_apicid_present, |
504a3c3a | 213 | .enable_apic_mode = NULL, |
d4c9a9f3 | 214 | .phys_pkg_id = x2apic_cluster_phys_pkg_id, |
504a3c3a IM |
215 | .mps_oem_check = NULL, |
216 | ||
ca6c8ed4 | 217 | .get_apic_id = x2apic_cluster_phys_get_apic_id, |
504a3c3a IM |
218 | .set_apic_id = set_apic_id, |
219 | .apic_id_mask = 0xFFFFFFFFu, | |
220 | ||
221 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | |
222 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, | |
223 | ||
224 | .send_IPI_mask = x2apic_send_IPI_mask, | |
225 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, | |
226 | .send_IPI_allbutself = x2apic_send_IPI_allbutself, | |
227 | .send_IPI_all = x2apic_send_IPI_all, | |
228 | .send_IPI_self = x2apic_send_IPI_self, | |
229 | ||
230 | .wakeup_cpu = NULL, | |
abfa584c IM |
231 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, |
232 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | |
504a3c3a IM |
233 | .wait_for_init_deassert = NULL, |
234 | .smp_callin_clear_local_apic = NULL, | |
235 | .store_NMI_vector = NULL, | |
504a3c3a | 236 | .inquire_remote_apic = NULL, |
12a67cf6 | 237 | }; |