Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
b992c660 IM |
2 | /* |
3 | * FPU signal frame handling routines. | |
4 | */ | |
5 | ||
6 | #include <linux/compat.h> | |
7 | #include <linux/cpu.h> | |
8 | ||
9 | #include <asm/fpu/internal.h> | |
10 | #include <asm/fpu/signal.h> | |
11 | #include <asm/fpu/regset.h> | |
99aa22d0 | 12 | #include <asm/fpu/xstate.h> |
b992c660 IM |
13 | |
14 | #include <asm/sigframe.h> | |
d1898b73 | 15 | #include <asm/trace/fpu.h> |
b992c660 IM |
16 | |
17 | static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32; | |
18 | ||
19 | /* | |
20 | * Check for the presence of extended state information in the | |
21 | * user fpstate pointer in the sigcontext. | |
22 | */ | |
c47ada30 | 23 | static inline int check_for_xstate(struct fxregs_state __user *buf, |
b992c660 IM |
24 | void __user *fpstate, |
25 | struct _fpx_sw_bytes *fx_sw) | |
26 | { | |
c47ada30 | 27 | int min_xstate_size = sizeof(struct fxregs_state) + |
b992c660 IM |
28 | sizeof(struct xstate_header); |
29 | unsigned int magic2; | |
30 | ||
31 | if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw))) | |
32 | return -1; | |
33 | ||
34 | /* Check for the first magic field and other error scenarios. */ | |
35 | if (fx_sw->magic1 != FP_XSTATE_MAGIC1 || | |
36 | fx_sw->xstate_size < min_xstate_size || | |
a1141e0b | 37 | fx_sw->xstate_size > fpu_user_xstate_size || |
b992c660 IM |
38 | fx_sw->xstate_size > fx_sw->extended_size) |
39 | return -1; | |
40 | ||
41 | /* | |
42 | * Check for the presence of second magic word at the end of memory | |
43 | * layout. This detects the case where the user just copied the legacy | |
44 | * fpstate layout with out copying the extended state information | |
45 | * in the memory layout. | |
46 | */ | |
47 | if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size)) | |
48 | || magic2 != FP_XSTATE_MAGIC2) | |
49 | return -1; | |
50 | ||
51 | return 0; | |
52 | } | |
53 | ||
54 | /* | |
55 | * Signal frame handlers. | |
56 | */ | |
57 | static inline int save_fsave_header(struct task_struct *tsk, void __user *buf) | |
58 | { | |
59 | if (use_fxsr()) { | |
c47ada30 | 60 | struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
b992c660 | 61 | struct user_i387_ia32_struct env; |
86e9fc3a | 62 | struct _fpstate_32 __user *fp = buf; |
b992c660 IM |
63 | |
64 | convert_from_fxsr(&env, tsk); | |
65 | ||
66 | if (__copy_to_user(buf, &env, sizeof(env)) || | |
67 | __put_user(xsave->i387.swd, &fp->status) || | |
68 | __put_user(X86_FXSR_MAGIC, &fp->magic)) | |
69 | return -1; | |
70 | } else { | |
c47ada30 | 71 | struct fregs_state __user *fp = buf; |
b992c660 IM |
72 | u32 swd; |
73 | if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status)) | |
74 | return -1; | |
75 | } | |
76 | ||
77 | return 0; | |
78 | } | |
79 | ||
80 | static inline int save_xstate_epilog(void __user *buf, int ia32_frame) | |
81 | { | |
c47ada30 | 82 | struct xregs_state __user *x = buf; |
b992c660 IM |
83 | struct _fpx_sw_bytes *sw_bytes; |
84 | u32 xfeatures; | |
85 | int err; | |
86 | ||
87 | /* Setup the bytes not touched by the [f]xsave and reserved for SW. */ | |
88 | sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved; | |
89 | err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes)); | |
90 | ||
91 | if (!use_xsave()) | |
92 | return err; | |
93 | ||
a1141e0b FY |
94 | err |= __put_user(FP_XSTATE_MAGIC2, |
95 | (__u32 *)(buf + fpu_user_xstate_size)); | |
b992c660 IM |
96 | |
97 | /* | |
98 | * Read the xfeatures which we copied (directly from the cpu or | |
99 | * from the state in task struct) to the user buffers. | |
100 | */ | |
101 | err |= __get_user(xfeatures, (__u32 *)&x->header.xfeatures); | |
102 | ||
103 | /* | |
104 | * For legacy compatible, we always set FP/SSE bits in the bit | |
105 | * vector while saving the state to the user context. This will | |
106 | * enable us capturing any changes(during sigreturn) to | |
107 | * the FP/SSE bits by the legacy applications which don't touch | |
108 | * xfeatures in the xsave header. | |
109 | * | |
110 | * xsave aware apps can change the xfeatures in the xsave | |
111 | * header as well as change any contents in the memory layout. | |
112 | * xrestore as part of sigreturn will capture all the changes. | |
113 | */ | |
d91cab78 | 114 | xfeatures |= XFEATURE_MASK_FPSSE; |
b992c660 IM |
115 | |
116 | err |= __put_user(xfeatures, (__u32 *)&x->header.xfeatures); | |
117 | ||
118 | return err; | |
119 | } | |
120 | ||
c47ada30 | 121 | static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf) |
b992c660 IM |
122 | { |
123 | int err; | |
124 | ||
125 | if (use_xsave()) | |
126 | err = copy_xregs_to_user(buf); | |
127 | else if (use_fxsr()) | |
c47ada30 | 128 | err = copy_fxregs_to_user((struct fxregs_state __user *) buf); |
b992c660 | 129 | else |
c47ada30 | 130 | err = copy_fregs_to_user((struct fregs_state __user *) buf); |
b992c660 | 131 | |
a1141e0b | 132 | if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size)) |
b992c660 IM |
133 | err = -EFAULT; |
134 | return err; | |
135 | } | |
136 | ||
137 | /* | |
138 | * Save the fpu, extended register state to the user signal frame. | |
139 | * | |
140 | * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save | |
141 | * state is copied. | |
142 | * 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'. | |
143 | * | |
144 | * buf == buf_fx for 64-bit frames and 32-bit fsave frame. | |
145 | * buf != buf_fx for 32-bit frames with fxstate. | |
146 | * | |
147 | * If the fpu, extended register state is live, save the state directly | |
148 | * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise, | |
149 | * copy the thread's fpu state to the user frame starting at 'buf_fx'. | |
150 | * | |
151 | * If this is a 32-bit frame with fxstate, put a fsave header before | |
152 | * the aligned state at 'buf_fx'. | |
153 | * | |
154 | * For [f]xsave state, update the SW reserved fields in the [f]xsave frame | |
155 | * indicating the absence/presence of the extended state to the user. | |
156 | */ | |
157 | int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size) | |
158 | { | |
b3a16308 IM |
159 | struct fpu *fpu = ¤t->thread.fpu; |
160 | struct xregs_state *xsave = &fpu->state.xsave; | |
b992c660 IM |
161 | struct task_struct *tsk = current; |
162 | int ia32_fxstate = (buf != buf_fx); | |
163 | ||
97f2645f MY |
164 | ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || |
165 | IS_ENABLED(CONFIG_IA32_EMULATION)); | |
b992c660 IM |
166 | |
167 | if (!access_ok(VERIFY_WRITE, buf, size)) | |
168 | return -EACCES; | |
169 | ||
170 | if (!static_cpu_has(X86_FEATURE_FPU)) | |
171 | return fpregs_soft_get(current, NULL, 0, | |
172 | sizeof(struct user_i387_ia32_struct), NULL, | |
86e9fc3a | 173 | (struct _fpstate_32 __user *) buf) ? -1 : 1; |
b992c660 | 174 | |
e4a81bfc | 175 | if (fpu->initialized || using_compacted_format()) { |
b992c660 IM |
176 | /* Save the live register state to the user directly. */ |
177 | if (copy_fpregs_to_sigframe(buf_fx)) | |
178 | return -1; | |
179 | /* Update the thread's fxstate to save the fsave header. */ | |
180 | if (ia32_fxstate) | |
b3a16308 | 181 | copy_fxregs_to_kernel(fpu); |
b992c660 | 182 | } else { |
a1141e0b FY |
183 | /* |
184 | * It is a *bug* if kernel uses compacted-format for xsave | |
185 | * area and we copy it out directly to a signal frame. It | |
186 | * should have been handled above by saving the registers | |
187 | * directly. | |
188 | */ | |
189 | if (boot_cpu_has(X86_FEATURE_XSAVES)) { | |
190 | WARN_ONCE(1, "x86/fpu: saving compacted-format xsave area to a signal frame!\n"); | |
191 | return -1; | |
192 | } | |
193 | ||
b3a16308 | 194 | fpstate_sanitize_xstate(fpu); |
a1141e0b | 195 | if (__copy_to_user(buf_fx, xsave, fpu_user_xstate_size)) |
b992c660 IM |
196 | return -1; |
197 | } | |
198 | ||
199 | /* Save the fsave header for the 32-bit frames. */ | |
200 | if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf)) | |
201 | return -1; | |
202 | ||
203 | if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate)) | |
204 | return -1; | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
209 | static inline void | |
210 | sanitize_restored_xstate(struct task_struct *tsk, | |
211 | struct user_i387_ia32_struct *ia32_env, | |
212 | u64 xfeatures, int fx_only) | |
213 | { | |
c47ada30 | 214 | struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; |
b992c660 IM |
215 | struct xstate_header *header = &xsave->header; |
216 | ||
217 | if (use_xsave()) { | |
b11e2e18 EB |
218 | /* |
219 | * Note: we don't need to zero the reserved bits in the | |
220 | * xstate_header here because we either didn't copy them at all, | |
221 | * or we checked earlier that they aren't set. | |
222 | */ | |
b992c660 IM |
223 | |
224 | /* | |
225 | * Init the state that is not present in the memory | |
226 | * layout and not enabled by the OS. | |
227 | */ | |
228 | if (fx_only) | |
d91cab78 | 229 | header->xfeatures = XFEATURE_MASK_FPSSE; |
b992c660 | 230 | else |
b11e2e18 | 231 | header->xfeatures &= xfeatures; |
b992c660 IM |
232 | } |
233 | ||
234 | if (use_fxsr()) { | |
235 | /* | |
236 | * mscsr reserved bits must be masked to zero for security | |
237 | * reasons. | |
238 | */ | |
239 | xsave->i387.mxcsr &= mxcsr_feature_mask; | |
240 | ||
241 | convert_to_fxsr(tsk, ia32_env); | |
242 | } | |
243 | } | |
244 | ||
245 | /* | |
246 | * Restore the extended state if present. Otherwise, restore the FP/SSE state. | |
247 | */ | |
248 | static inline int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only) | |
249 | { | |
250 | if (use_xsave()) { | |
251 | if ((unsigned long)buf % 64 || fx_only) { | |
d91cab78 | 252 | u64 init_bv = xfeatures_mask & ~XFEATURE_MASK_FPSSE; |
b992c660 IM |
253 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); |
254 | return copy_user_to_fxregs(buf); | |
255 | } else { | |
256 | u64 init_bv = xfeatures_mask & ~xbv; | |
257 | if (unlikely(init_bv)) | |
258 | copy_kernel_to_xregs(&init_fpstate.xsave, init_bv); | |
259 | return copy_user_to_xregs(buf, xbv); | |
260 | } | |
261 | } else if (use_fxsr()) { | |
262 | return copy_user_to_fxregs(buf); | |
263 | } else | |
264 | return copy_user_to_fregs(buf); | |
265 | } | |
266 | ||
267 | static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size) | |
268 | { | |
269 | int ia32_fxstate = (buf != buf_fx); | |
270 | struct task_struct *tsk = current; | |
271 | struct fpu *fpu = &tsk->thread.fpu; | |
bf15a8cf | 272 | int state_size = fpu_kernel_xstate_size; |
b992c660 IM |
273 | u64 xfeatures = 0; |
274 | int fx_only = 0; | |
275 | ||
97f2645f MY |
276 | ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) || |
277 | IS_ENABLED(CONFIG_IA32_EMULATION)); | |
b992c660 IM |
278 | |
279 | if (!buf) { | |
280 | fpu__clear(fpu); | |
281 | return 0; | |
282 | } | |
283 | ||
284 | if (!access_ok(VERIFY_READ, buf, size)) | |
285 | return -EACCES; | |
286 | ||
2ce03d85 | 287 | fpu__initialize(fpu); |
b992c660 IM |
288 | |
289 | if (!static_cpu_has(X86_FEATURE_FPU)) | |
290 | return fpregs_soft_set(current, NULL, | |
291 | 0, sizeof(struct user_i387_ia32_struct), | |
292 | NULL, buf) != 0; | |
293 | ||
294 | if (use_xsave()) { | |
295 | struct _fpx_sw_bytes fx_sw_user; | |
296 | if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) { | |
297 | /* | |
298 | * Couldn't find the extended state information in the | |
299 | * memory layout. Restore just the FP/SSE and init all | |
300 | * the other extended state. | |
301 | */ | |
c47ada30 | 302 | state_size = sizeof(struct fxregs_state); |
b992c660 | 303 | fx_only = 1; |
d1898b73 | 304 | trace_x86_fpu_xstate_check_failed(fpu); |
b992c660 IM |
305 | } else { |
306 | state_size = fx_sw_user.xstate_size; | |
307 | xfeatures = fx_sw_user.xfeatures; | |
308 | } | |
309 | } | |
310 | ||
311 | if (ia32_fxstate) { | |
312 | /* | |
313 | * For 32-bit frames with fxstate, copy the user state to the | |
314 | * thread's fpu state, reconstruct fxstate from the fsave | |
b11e2e18 | 315 | * header. Validate and sanitize the copied state. |
b992c660 IM |
316 | */ |
317 | struct fpu *fpu = &tsk->thread.fpu; | |
318 | struct user_i387_ia32_struct env; | |
319 | int err = 0; | |
320 | ||
321 | /* | |
e4a81bfc | 322 | * Drop the current fpu which clears fpu->initialized. This ensures |
b992c660 IM |
323 | * that any context-switch during the copy of the new state, |
324 | * avoids the intermediate state from getting restored/saved. | |
325 | * Thus avoiding the new restored state from getting corrupted. | |
326 | * We will be ready to restore/save the state only after | |
e4a81bfc | 327 | * fpu->initialized is again set. |
b992c660 IM |
328 | */ |
329 | fpu__drop(fpu); | |
330 | ||
814fb7bb | 331 | if (using_compacted_format()) { |
6d7f7da5 | 332 | err = copy_user_to_xstate(&fpu->state.xsave, buf_fx); |
814fb7bb | 333 | } else { |
7b9094c6 | 334 | err = __copy_from_user(&fpu->state.xsave, buf_fx, state_size); |
1fc2b67b | 335 | |
b11e2e18 EB |
336 | if (!err && state_size > offsetof(struct xregs_state, header)) |
337 | err = validate_xstate_header(&fpu->state.xsave.header); | |
814fb7bb EB |
338 | } |
339 | ||
1fc2b67b | 340 | if (err || __copy_from_user(&env, buf, sizeof(env))) { |
b992c660 | 341 | fpstate_init(&fpu->state); |
d1898b73 | 342 | trace_x86_fpu_init_state(fpu); |
b992c660 IM |
343 | err = -1; |
344 | } else { | |
345 | sanitize_restored_xstate(tsk, &env, xfeatures, fx_only); | |
346 | } | |
347 | ||
e4a81bfc | 348 | fpu->initialized = 1; |
c592b573 AL |
349 | preempt_disable(); |
350 | fpu__restore(fpu); | |
351 | preempt_enable(); | |
b992c660 IM |
352 | |
353 | return err; | |
354 | } else { | |
355 | /* | |
356 | * For 64-bit frames and 32-bit fsave frames, restore the user | |
357 | * state to the registers directly (with exceptions handled). | |
358 | */ | |
359 | user_fpu_begin(); | |
360 | if (copy_user_to_fpregs_zeroing(buf_fx, xfeatures, fx_only)) { | |
361 | fpu__clear(fpu); | |
362 | return -1; | |
363 | } | |
364 | } | |
365 | ||
366 | return 0; | |
367 | } | |
368 | ||
369 | static inline int xstate_sigframe_size(void) | |
370 | { | |
a1141e0b FY |
371 | return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE : |
372 | fpu_user_xstate_size; | |
b992c660 IM |
373 | } |
374 | ||
375 | /* | |
376 | * Restore FPU state from a sigframe: | |
377 | */ | |
378 | int fpu__restore_sig(void __user *buf, int ia32_frame) | |
379 | { | |
380 | void __user *buf_fx = buf; | |
381 | int size = xstate_sigframe_size(); | |
382 | ||
383 | if (ia32_frame && use_fxsr()) { | |
c47ada30 IM |
384 | buf_fx = buf + sizeof(struct fregs_state); |
385 | size += sizeof(struct fregs_state); | |
b992c660 IM |
386 | } |
387 | ||
388 | return __fpu__restore_sig(buf, buf_fx, size); | |
389 | } | |
390 | ||
391 | unsigned long | |
392 | fpu__alloc_mathframe(unsigned long sp, int ia32_frame, | |
393 | unsigned long *buf_fx, unsigned long *size) | |
394 | { | |
395 | unsigned long frame_size = xstate_sigframe_size(); | |
396 | ||
397 | *buf_fx = sp = round_down(sp - frame_size, 64); | |
398 | if (ia32_frame && use_fxsr()) { | |
c47ada30 IM |
399 | frame_size += sizeof(struct fregs_state); |
400 | sp -= sizeof(struct fregs_state); | |
b992c660 IM |
401 | } |
402 | ||
403 | *size = frame_size; | |
404 | ||
405 | return sp; | |
406 | } | |
407 | /* | |
408 | * Prepare the SW reserved portion of the fxsave memory layout, indicating | |
409 | * the presence of the extended state information in the memory layout | |
410 | * pointed by the fpstate pointer in the sigcontext. | |
411 | * This will be saved when ever the FP and extended state context is | |
412 | * saved on the user stack during the signal handler delivery to the user. | |
413 | */ | |
414 | void fpu__init_prepare_fx_sw_frame(void) | |
415 | { | |
a1141e0b | 416 | int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE; |
b992c660 | 417 | |
b992c660 IM |
418 | fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1; |
419 | fx_sw_reserved.extended_size = size; | |
420 | fx_sw_reserved.xfeatures = xfeatures_mask; | |
a1141e0b | 421 | fx_sw_reserved.xstate_size = fpu_user_xstate_size; |
b992c660 | 422 | |
97f2645f MY |
423 | if (IS_ENABLED(CONFIG_IA32_EMULATION) || |
424 | IS_ENABLED(CONFIG_X86_32)) { | |
ab6b5294 DH |
425 | int fsave_header_size = sizeof(struct fregs_state); |
426 | ||
b992c660 | 427 | fx_sw_reserved_ia32 = fx_sw_reserved; |
ab6b5294 | 428 | fx_sw_reserved_ia32.extended_size = size + fsave_header_size; |
b992c660 IM |
429 | } |
430 | } | |
431 |