x86, apic: clean up the cpu_2_logical_apiciddeclaration
[linux-block.git] / arch / x86 / kernel / es7000_32.c
CommitLineData
1da177e4
LT
1/*
2 * Written by: Garry Forsgren, Unisys Corporation
3 * Natalie Protasevich, Unisys Corporation
4 * This file contains the code to configure and interface
5 * with Unisys ES7000 series hardware system manager.
6 *
7 * Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it would be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 *
21 * Contact information: Unisys Corporation, Township Line & Union Meeting
22 * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
23 *
24 * http://www.unisys.com
25 */
26
27#include <linux/module.h>
28#include <linux/types.h>
29#include <linux/kernel.h>
30#include <linux/smp.h>
31#include <linux/string.h>
32#include <linux/spinlock.h>
33#include <linux/errno.h>
34#include <linux/notifier.h>
35#include <linux/reboot.h>
36#include <linux/init.h>
37#include <linux/acpi.h>
38#include <asm/io.h>
39#include <asm/nmi.h>
40#include <asm/smp.h>
b5fe363b 41#include <asm/atomic.h>
1da177e4 42#include <asm/apicdef.h>
7b6aa335 43#include <asm/apic.h>
569712b2 44#include <asm/setup.h>
1da177e4 45
1625324d
YL
46/*
47 * ES7000 chipsets
48 */
49
50#define NON_UNISYS 0
51#define ES7000_CLASSIC 1
52#define ES7000_ZORRO 2
53
54
55#define MIP_REG 1
56#define MIP_PSAI_REG 4
57
58#define MIP_BUSY 1
59#define MIP_SPIN 0xf0000
60#define MIP_VALID 0x0100000000000000ULL
61#define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
62
63#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
64
65struct mip_reg_info {
66 unsigned long long mip_info;
67 unsigned long long delivery_info;
68 unsigned long long host_reg;
69 unsigned long long mip_reg;
70};
71
72struct part_info {
73 unsigned char type;
74 unsigned char length;
75 unsigned char part_id;
76 unsigned char apic_mode;
77 unsigned long snum;
78 char ptype[16];
79 char sname[64];
80 char pname[64];
81};
82
83struct psai {
84 unsigned long long entry_type;
85 unsigned long long addr;
86 unsigned long long bep_addr;
87};
88
89struct es7000_mem_info {
90 unsigned char type;
91 unsigned char length;
92 unsigned char resv[6];
93 unsigned long long start;
94 unsigned long long size;
95};
96
97struct es7000_oem_table {
98 unsigned long long hdr;
99 struct mip_reg_info mip;
100 struct part_info pif;
101 struct es7000_mem_info shm;
102 struct psai psai;
103};
104
105#ifdef CONFIG_ACPI
106
107struct oem_table {
108 struct acpi_table_header Header;
109 u32 OEMTableAddr;
110 u32 OEMTableSize;
111};
112
113extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
a73aaedd 114extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
1625324d
YL
115#endif
116
117struct mip_reg {
118 unsigned long long off_0;
119 unsigned long long off_8;
120 unsigned long long off_10;
121 unsigned long long off_18;
122 unsigned long long off_20;
123 unsigned long long off_28;
124 unsigned long long off_30;
125 unsigned long long off_38;
126};
127
128#define MIP_SW_APIC 0x1020b
129#define MIP_FUNC(VALUE) (VALUE & 0xff)
130
1da177e4
LT
131/*
132 * ES7000 Globals
133 */
134
fb7ae26d
AB
135static volatile unsigned long *psai = NULL;
136static struct mip_reg *mip_reg;
137static struct mip_reg *host_reg;
138static int mip_port;
139static unsigned long mip_addr, host_addr;
1da177e4 140
32c50612
AS
141int es7000_plat;
142
1da177e4
LT
143/*
144 * GSI override for ES7000 platforms.
145 */
146
147static unsigned int base;
148
149static int
150es7000_rename_gsi(int ioapic, int gsi)
151{
9338316c
NP
152 if (es7000_plat == ES7000_ZORRO)
153 return gsi;
154
1da177e4
LT
155 if (!base) {
156 int i;
157 for (i = 0; i < nr_ioapics; i++)
158 base += nr_ioapic_registers[i];
159 }
160
c7e7964c 161 if (!ioapic && (gsi < 16))
1da177e4
LT
162 gsi += base;
163 return gsi;
164}
165
569712b2
YL
166static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
167{
168 unsigned long vect = 0, psaival = 0;
169
170 if (psai == NULL)
171 return -1;
172
173 vect = ((unsigned long)__pa(eip)/0x1000) << 16;
174 psaival = (0x1000000 | vect | cpu);
175
176 while (*psai & 0x1000000)
177 ;
178
179 *psai = psaival;
180
181 return 0;
182}
54ac14a8
YL
183
184static int __init es7000_update_genapic(void)
185{
c8d46cf0 186 apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
54ac14a8 187
b5fe363b
YL
188 /* MPENTIUMIII */
189 if (boot_cpu_data.x86 == 6 &&
190 (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
191 es7000_update_genapic_to_cluster();
a9659366 192 apic->wait_for_init_deassert = NULL;
c8d46cf0 193 apic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
b5fe363b
YL
194 }
195
54ac14a8
YL
196 return 0;
197}
569712b2 198
56f1d5d5 199void __init
9338316c 200setup_unisys(void)
56f1d5d5
NP
201{
202 /*
203 * Determine the generation of the ES7000 currently running.
204 *
205 * es7000_plat = 1 if the machine is a 5xx ES7000 box
206 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
207 *
208 */
209 if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
9338316c 210 es7000_plat = ES7000_ZORRO;
56f1d5d5 211 else
9338316c 212 es7000_plat = ES7000_CLASSIC;
56f1d5d5 213 ioapic_renumber_irq = es7000_rename_gsi;
54ac14a8 214
54ac14a8 215 x86_quirks->update_genapic = es7000_update_genapic;
56f1d5d5
NP
216}
217
1da177e4
LT
218/*
219 * Parse the OEM Table
220 */
221
222int __init
56f1d5d5 223parse_unisys_oem (char *oemptr)
1da177e4
LT
224{
225 int i;
226 int success = 0;
227 unsigned char type, size;
228 unsigned long val;
229 char *tp = NULL;
230 struct psai *psaip = NULL;
231 struct mip_reg_info *mi;
232 struct mip_reg *host, *mip;
233
234 tp = oemptr;
235
236 tp += 8;
237
56f1d5d5 238 for (i=0; i <= 6; i++) {
1da177e4
LT
239 type = *tp++;
240 size = *tp++;
241 tp -= 2;
242 switch (type) {
243 case MIP_REG:
244 mi = (struct mip_reg_info *)tp;
245 val = MIP_RD_LO(mi->host_reg);
246 host_addr = val;
247 host = (struct mip_reg *)val;
248 host_reg = __va(host);
249 val = MIP_RD_LO(mi->mip_reg);
250 mip_port = MIP_PORT(mi->mip_info);
251 mip_addr = val;
252 mip = (struct mip_reg *)val;
253 mip_reg = __va(mip);
5171c304
TG
254 pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
255 (unsigned long)host_reg);
256 pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
257 (unsigned long)mip_reg);
1da177e4
LT
258 success++;
259 break;
260 case MIP_PSAI_REG:
261 psaip = (struct psai *)tp;
262 if (tp != NULL) {
263 if (psaip->addr)
264 psai = __va(psaip->addr);
265 else
266 psai = NULL;
267 success++;
268 }
269 break;
270 default:
271 break;
272 }
1da177e4
LT
273 tp += size;
274 }
275
276 if (success < 2) {
9338316c 277 es7000_plat = NON_UNISYS;
56f1d5d5
NP
278 } else
279 setup_unisys();
1da177e4
LT
280 return es7000_plat;
281}
282
e5428ede 283#ifdef CONFIG_ACPI
a73aaedd
YL
284static unsigned long oem_addrX;
285static unsigned long oem_size;
286int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
1da177e4 287{
ceb6c468
AS
288 struct acpi_table_header *header = NULL;
289 int i = 0;
b825e6cc 290 acpi_size tbl_size;
a73aaedd 291
b825e6cc 292 while (ACPI_SUCCESS(acpi_get_table_with_size("OEM1", i++, &header, &tbl_size))) {
ceb6c468
AS
293 if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
294 struct oem_table *t = (struct oem_table *)header;
a73aaedd
YL
295
296 oem_addrX = t->OEMTableAddr;
297 oem_size = t->OEMTableSize;
b825e6cc 298 early_acpi_os_unmap_memory(header, tbl_size);
a73aaedd
YL
299
300 *oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
301 oem_size);
ceb6c468 302 return 0;
1da177e4 303 }
b825e6cc 304 early_acpi_os_unmap_memory(header, tbl_size);
1da177e4 305 }
1da177e4
LT
306 return -1;
307}
a73aaedd
YL
308
309void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
310{
b825e6cc
YL
311 if (!oem_addr)
312 return;
313
314 __acpi_unmap_table((char *)oem_addr, oem_size);
a73aaedd 315}
e5428ede 316#endif
1da177e4
LT
317
318static void
319es7000_spin(int n)
320{
321 int i = 0;
322
323 while (i++ < n)
324 rep_nop();
325}
326
327static int __init
328es7000_mip_write(struct mip_reg *mip_reg)
329{
330 int status = 0;
331 int spin;
332
333 spin = MIP_SPIN;
334 while (((unsigned long long)host_reg->off_38 &
335 (unsigned long long)MIP_VALID) != 0) {
336 if (--spin <= 0) {
337 printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
338 return -1;
339 }
340 es7000_spin(MIP_SPIN);
341 }
342
343 memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
344 outb(1, mip_port);
345
346 spin = MIP_SPIN;
347
348 while (((unsigned long long)mip_reg->off_38 &
349 (unsigned long long)MIP_VALID) == 0) {
350 if (--spin <= 0) {
351 printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
352 return -1;
353 }
354 es7000_spin(MIP_SPIN);
355 }
356
357 status = ((unsigned long long)mip_reg->off_0 &
358 (unsigned long long)0xffff0000000000ULL) >> 48;
359 mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
360 (unsigned long long)~MIP_VALID);
361 return status;
362}
363
b0b20e5a 364void __init es7000_enable_apic_mode(void)
1da177e4 365{
b0b20e5a
IM
366 struct mip_reg es7000_mip_reg;
367 int mip_status;
368
369 if (!es7000_plat)
1da177e4 370 return;
b0b20e5a
IM
371
372 printk("ES7000: Enabling APIC mode.\n");
373 memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
374 es7000_mip_reg.off_0 = MIP_SW_APIC;
375 es7000_mip_reg.off_38 = MIP_VALID;
376
377 while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) {
378 printk("es7000_enable_apic_mode: command failed, status = %x\n",
379 mip_status);
1da177e4
LT
380 }
381}
2e096df8
IM
382
383/*
384 * APIC driver for the Unisys ES7000 chipset.
385 */
2e096df8
IM
386#include <linux/threads.h>
387#include <linux/cpumask.h>
388#include <asm/mpspec.h>
2e096df8
IM
389#include <asm/fixmap.h>
390#include <asm/apicdef.h>
391#include <linux/kernel.h>
392#include <linux/string.h>
393#include <linux/init.h>
394#include <linux/acpi.h>
395#include <linux/smp.h>
396#include <asm/ipi.h>
397
398#define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER)
399#define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio)
400#define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */
401
402#define APIC_DFR_VALUE (APIC_DFR_FLAT)
403
404extern void es7000_enable_apic_mode(void);
405extern int apic_version [MAX_APICS];
2e096df8
IM
406extern unsigned int boot_cpu_physical_apicid;
407
408extern int parse_unisys_oem (char *oemptr);
409extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
410extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
411extern void setup_unisys(void);
412
413#define apicid_cluster(apicid) (apicid & 0xF0)
414#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
415
416static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
417{
418 /* Careful. Some cpus do not strictly honor the set of cpus
419 * specified in the interrupt destination when using lowest
420 * priority interrupt delivery mode.
421 *
422 * In particular there was a hyperthreading cpu observed to
423 * deliver interrupts to the wrong hyperthread when only one
424 * hyperthread was specified in the interrupt desitination.
425 */
426 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
427}
428
429
430static void es7000_wait_for_init_deassert(atomic_t *deassert)
431{
432#ifndef CONFIG_ES7000_CLUSTERED_APIC
433 while (!atomic_read(deassert))
434 cpu_relax();
435#endif
436 return;
437}
438
439static unsigned int es7000_get_apic_id(unsigned long x)
440{
441 return (x >> 24) & 0xFF;
442}
443
444#ifdef CONFIG_ACPI
445static int es7000_check_dsdt(void)
446{
447 struct acpi_table_header header;
448
449 if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
450 !strncmp(header.oem_id, "UNISYS", 6))
451 return 1;
452 return 0;
453}
454#endif
455
456static void es7000_send_IPI_mask(const struct cpumask *mask, int vector)
457{
43f39890 458 default_send_IPI_mask_sequence_phys(mask, vector);
2e096df8
IM
459}
460
461static void es7000_send_IPI_allbutself(int vector)
462{
43f39890 463 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
2e096df8
IM
464}
465
466static void es7000_send_IPI_all(int vector)
467{
468 es7000_send_IPI_mask(cpu_online_mask, vector);
469}
470
471static int es7000_apic_id_registered(void)
472{
473 return 1;
474}
475
476static const cpumask_t *target_cpus_cluster(void)
477{
478 return &CPU_MASK_ALL;
479}
480
481static const cpumask_t *es7000_target_cpus(void)
482{
483 return &cpumask_of_cpu(smp_processor_id());
484}
485
486static unsigned long
487es7000_check_apicid_used(physid_mask_t bitmap, int apicid)
488{
489 return 0;
490}
491static unsigned long es7000_check_apicid_present(int bit)
492{
493 return physid_isset(bit, phys_cpu_present_map);
494}
495
496static unsigned long calculate_ldr(int cpu)
497{
498 unsigned long id = xapic_phys_to_log_apicid(cpu);
499
500 return (SET_APIC_LOGICAL_ID(id));
501}
502
503/*
504 * Set up the logical destination ID.
505 *
506 * Intel recommends to set DFR, LdR and TPR before enabling
507 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
508 * document number 292116). So here it goes...
509 */
510static void es7000_init_apic_ldr_cluster(void)
511{
512 unsigned long val;
513 int cpu = smp_processor_id();
514
515 apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
516 val = calculate_ldr(cpu);
517 apic_write(APIC_LDR, val);
518}
519
520static void es7000_init_apic_ldr(void)
521{
522 unsigned long val;
523 int cpu = smp_processor_id();
524
525 apic_write(APIC_DFR, APIC_DFR_VALUE);
526 val = calculate_ldr(cpu);
527 apic_write(APIC_LDR, val);
528}
529
530static void es7000_setup_apic_routing(void)
531{
532 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
533 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
534 (apic_version[apic] == 0x14) ?
535 "Physical Cluster" : "Logical Cluster",
536 nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
537}
538
539static int es7000_apicid_to_node(int logical_apicid)
540{
541 return 0;
542}
543
544
545static int es7000_cpu_present_to_apicid(int mps_cpu)
546{
547 if (!mps_cpu)
548 return boot_cpu_physical_apicid;
549 else if (mps_cpu < nr_cpu_ids)
550 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
551 else
552 return BAD_APICID;
553}
554
555static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid)
556{
557 static int id = 0;
558 physid_mask_t mask;
559
560 mask = physid_mask_of_physid(id);
561 ++id;
562
563 return mask;
564}
565
566/* Mapping from cpu number to logical apicid */
567static int es7000_cpu_to_logical_apicid(int cpu)
568{
569#ifdef CONFIG_SMP
570 if (cpu >= nr_cpu_ids)
571 return BAD_APICID;
2f205bc4 572 return cpu_2_logical_apicid[cpu];
2e096df8
IM
573#else
574 return logical_smp_processor_id();
575#endif
576}
577
578static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map)
579{
580 /* For clustered we don't have a good way to do this yet - hack */
581 return physids_promote(0xff);
582}
583
584static int es7000_check_phys_apicid_present(int cpu_physical_apicid)
585{
586 boot_cpu_physical_apicid = read_apic_id();
587 return (1);
588}
589
590static unsigned int
591es7000_cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
592{
593 int cpus_found = 0;
594 int num_bits_set;
595 int apicid;
596 int cpu;
597
598 num_bits_set = cpumask_weight(cpumask);
599 /* Return id to all */
600 if (num_bits_set == nr_cpu_ids)
601 return 0xFF;
602 /*
603 * The cpus in the mask must all be on the apic cluster. If are not
604 * on the same apicid cluster return default value of target_cpus():
605 */
606 cpu = cpumask_first(cpumask);
607 apicid = es7000_cpu_to_logical_apicid(cpu);
608
609 while (cpus_found < num_bits_set) {
610 if (cpumask_test_cpu(cpu, cpumask)) {
611 int new_apicid = es7000_cpu_to_logical_apicid(cpu);
612
613 if (apicid_cluster(apicid) !=
614 apicid_cluster(new_apicid)) {
615 printk ("%s: Not a valid mask!\n", __func__);
616
617 return 0xFF;
618 }
619 apicid = new_apicid;
620 cpus_found++;
621 }
622 cpu++;
623 }
624 return apicid;
625}
626
627static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask)
628{
629 int cpus_found = 0;
630 int num_bits_set;
631 int apicid;
632 int cpu;
633
634 num_bits_set = cpus_weight(*cpumask);
635 /* Return id to all */
636 if (num_bits_set == nr_cpu_ids)
637 return es7000_cpu_to_logical_apicid(0);
638 /*
639 * The cpus in the mask must all be on the apic cluster. If are not
640 * on the same apicid cluster return default value of target_cpus():
641 */
642 cpu = first_cpu(*cpumask);
643 apicid = es7000_cpu_to_logical_apicid(cpu);
644 while (cpus_found < num_bits_set) {
645 if (cpu_isset(cpu, *cpumask)) {
646 int new_apicid = es7000_cpu_to_logical_apicid(cpu);
647
648 if (apicid_cluster(apicid) !=
649 apicid_cluster(new_apicid)) {
650 printk ("%s: Not a valid mask!\n", __func__);
651
652 return es7000_cpu_to_logical_apicid(0);
653 }
654 apicid = new_apicid;
655 cpus_found++;
656 }
657 cpu++;
658 }
659 return apicid;
660}
661
662static unsigned int
663es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask,
664 const struct cpumask *andmask)
665{
666 int apicid = es7000_cpu_to_logical_apicid(0);
667 cpumask_var_t cpumask;
668
669 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
670 return apicid;
671
672 cpumask_and(cpumask, inmask, andmask);
673 cpumask_and(cpumask, cpumask, cpu_online_mask);
674 apicid = es7000_cpu_mask_to_apicid(cpumask);
675
676 free_cpumask_var(cpumask);
677
678 return apicid;
679}
680
681static int es7000_phys_pkg_id(int cpuid_apic, int index_msb)
682{
683 return cpuid_apic >> index_msb;
684}
685
686void __init es7000_update_genapic_to_cluster(void)
687{
688 apic->target_cpus = target_cpus_cluster;
689 apic->irq_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
690 apic->irq_dest_mode = INT_DEST_MODE_CLUSTER;
691
692 apic->init_apic_ldr = es7000_init_apic_ldr_cluster;
693
694 apic->cpu_mask_to_apicid = es7000_cpu_mask_to_apicid_cluster;
695}
696
697static int probe_es7000(void)
698{
699 /* probed later in mptable/ACPI hooks */
700 return 0;
701}
702
703static __init int
704es7000_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
705{
706 if (mpc->oemptr) {
707 struct mpc_oemtable *oem_table =
708 (struct mpc_oemtable *)mpc->oemptr;
709
710 if (!strncmp(oem, "UNISYS", 6))
711 return parse_unisys_oem((char *)oem_table);
712 }
713 return 0;
714}
715
716#ifdef CONFIG_ACPI
717/* Hook from generic ACPI tables.c */
718static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
719{
720 unsigned long oem_addr = 0;
721 int check_dsdt;
722 int ret = 0;
723
724 /* check dsdt at first to avoid clear fix_map for oem_addr */
725 check_dsdt = es7000_check_dsdt();
726
727 if (!find_unisys_acpi_oem_table(&oem_addr)) {
728 if (check_dsdt)
729 ret = parse_unisys_oem((char *)oem_addr);
730 else {
731 setup_unisys();
732 ret = 1;
733 }
734 /*
735 * we need to unmap it
736 */
737 unmap_unisys_acpi_oem_table(oem_addr);
738 }
739 return ret;
740}
741#else
742static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
743{
744 return 0;
745}
746#endif
747
748
749struct genapic apic_es7000 = {
750
751 .name = "es7000",
752 .probe = probe_es7000,
753 .acpi_madt_oem_check = es7000_acpi_madt_oem_check,
754 .apic_id_registered = es7000_apic_id_registered,
755
756 .irq_delivery_mode = dest_Fixed,
757 /* phys delivery to target CPUs: */
758 .irq_dest_mode = 0,
759
760 .target_cpus = es7000_target_cpus,
761 .disable_esr = 1,
762 .dest_logical = 0,
763 .check_apicid_used = es7000_check_apicid_used,
764 .check_apicid_present = es7000_check_apicid_present,
765
766 .vector_allocation_domain = es7000_vector_allocation_domain,
767 .init_apic_ldr = es7000_init_apic_ldr,
768
769 .ioapic_phys_id_map = es7000_ioapic_phys_id_map,
770 .setup_apic_routing = es7000_setup_apic_routing,
771 .multi_timer_check = NULL,
772 .apicid_to_node = es7000_apicid_to_node,
773 .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid,
774 .cpu_present_to_apicid = es7000_cpu_present_to_apicid,
775 .apicid_to_cpu_present = es7000_apicid_to_cpu_present,
776 .setup_portio_remap = NULL,
777 .check_phys_apicid_present = es7000_check_phys_apicid_present,
778 .enable_apic_mode = es7000_enable_apic_mode,
779 .phys_pkg_id = es7000_phys_pkg_id,
780 .mps_oem_check = es7000_mps_oem_check,
781
782 .get_apic_id = es7000_get_apic_id,
783 .set_apic_id = NULL,
784 .apic_id_mask = 0xFF << 24,
785
786 .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid,
787 .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and,
788
789 .send_IPI_mask = es7000_send_IPI_mask,
790 .send_IPI_mask_allbutself = NULL,
791 .send_IPI_allbutself = es7000_send_IPI_allbutself,
792 .send_IPI_all = es7000_send_IPI_all,
6b64ee02 793 .send_IPI_self = default_send_IPI_self,
2e096df8
IM
794
795 .wakeup_cpu = NULL,
796
797 .trampoline_phys_low = 0x467,
798 .trampoline_phys_high = 0x469,
799
800 .wait_for_init_deassert = es7000_wait_for_init_deassert,
801
802 /* Nothing to do for most platforms, since cleared by the INIT cycle: */
803 .smp_callin_clear_local_apic = NULL,
804 .store_NMI_vector = NULL,
805 .inquire_remote_apic = default_inquire_remote_apic,
c1eeb2de
YL
806
807 .read = native_apic_mem_read,
808 .write = native_apic_mem_write,
809 .icr_read = native_apic_icr_read,
810 .icr_write = native_apic_icr_write,
811 .wait_icr_idle = native_apic_wait_icr_idle,
812 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
2e096df8 813};