[linux-2.6-block.git] / arch / x86 / kernel / cpu / mcheck / non-fatal.c

/*
 * Non Fatal Machine Check Exception Reporting
 *
 * (C) Copyright 2002 Dave Jones. <davej@redhat.com>
 *
 * This file contains routines to check for non-fatal MCEs every 15s
 *
 */
#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/smp.h>

#include <asm/processor.h>
#include <asm/system.h>
#include <asm/msr.h>

#include "mce.h"

static int		firstbank;

#define MCE_RATE	(15*HZ)	/* timer rate is 15s */

static void mce_checkregs(void *info)
{
	u32 low, high;
	int i;

	for (i = firstbank; i < nr_mce_banks; i++) {
		rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);

		if (!(high & (1<<31)))
			continue;

		printk(KERN_INFO "MCE: The hardware reports a non fatal, "
			"correctable incident occurred on CPU %d.\n",
				smp_processor_id());

		printk(KERN_INFO "Bank %d: %08x%08x\n", i, high, low);

		/*
		 * Scrub the error so we don't pick it up in MCE_RATE
		 * seconds time:
		 */
		wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);

		/* Serialize: */
		wmb();
		add_taint(TAINT_MACHINE_CHECK);
	}
}

static void mce_work_fn(struct work_struct *work);
static DECLARE_DELAYED_WORK(mce_work, mce_work_fn);

static void mce_work_fn(struct work_struct *work)
{
	on_each_cpu(mce_checkregs, NULL, 1);
	schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
}

static int __init init_nonfatal_mce_checker(void)
{
	struct cpuinfo_x86 *c = &boot_cpu_data;

	/* Check for MCE support */
	if (!cpu_has(c, X86_FEATURE_MCE))
		return -ENODEV;

	/* Check for PPro style MCA */
	if (!cpu_has(c, X86_FEATURE_MCA))
		return -ENODEV;

	/* Some Athlons misbehave when we frob bank 0 */
	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
						boot_cpu_data.x86 == 6)
		firstbank = 1;
	else
		firstbank = 0;

	/*
	 * Check for non-fatal errors every MCE_RATE s
	 */
	schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
	printk(KERN_INFO "Machine check exception polling timer started.\n");

	return 0;
}
module_init(init_nonfatal_mce_checker);

MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Non Fatal Machine Check Exception Reporting
	3	*
f4432c5c	4	* (C) Copyright 2002 Dave Jones. <davej@redhat.com>
1da177e4 LT	5	*
	6	* This file contains routines to check for non-fatal MCEs every 15s
	7	*
	8	*/
1da177e4	9	#include <linux/interrupt.h>
bdbfbdd5 IM	10	#include <linux/workqueue.h>
	11	#include <linux/jiffies.h>
	12	#include <linux/kernel.h>
1da177e4	13	#include <linux/module.h>
bdbfbdd5 IM	14	#include <linux/types.h>
	15	#include <linux/init.h>
	16	#include <linux/smp.h>
1da177e4	17
714a9ac2	18	#include <asm/processor.h>
1da177e4 LT	19	#include <asm/system.h>
	20	#include <asm/msr.h>
	21
	22	#include "mce.h"
	23
bdbfbdd5	24	static int firstbank;
1da177e4	25
bdbfbdd5	26	#define MCE_RATE (15HZ) / timer rate is 15s */
1da177e4	27
714a9ac2	28	static void mce_checkregs(void *info)
1da177e4 LT	29	{
	30	u32 low, high;
	31	int i;
	32
714a9ac2 PC	33	for (i = firstbank; i < nr_mce_banks; i++) {
714a9ac2 PC	34	rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
1da177e4	35
bdbfbdd5 IM	36	if (!(high & (1<<31)))
	37	continue;
	38
	39	printk(KERN_INFO "MCE: The hardware reports a non fatal, "
	40	"correctable incident occurred on CPU %d.\n",
1da177e4	41	smp_processor_id());
bdbfbdd5 IM	42
	43	printk(KERN_INFO "Bank %d: %08x%08x\n", i, high, low);
	44
	45	/*
	46	* Scrub the error so we don't pick it up in MCE_RATE
	47	* seconds time:
	48	*/
	49	wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
	50
	51	/* Serialize: */
	52	wmb();
	53	add_taint(TAINT_MACHINE_CHECK);
1da177e4 LT	54	}
	55	}
	56
c4028958 DH	57	static void mce_work_fn(struct work_struct *work);
c4028958 DH	58	static DECLARE_DELAYED_WORK(mce_work, mce_work_fn);
1da177e4	59
c4028958	60	static void mce_work_fn(struct work_struct *work)
714a9ac2	61	{
15c8b6c1	62	on_each_cpu(mce_checkregs, NULL, 1);
22293e58	63	schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
714a9ac2	64	}
1da177e4 LT	65
	66	static int __init init_nonfatal_mce_checker(void)
	67	{
	68	struct cpuinfo_x86 *c = &boot_cpu_data;
	69
	70	/* Check for MCE support */
	71	if (!cpu_has(c, X86_FEATURE_MCE))
	72	return -ENODEV;
	73
	74	/* Check for PPro style MCA */
	75	if (!cpu_has(c, X86_FEATURE_MCA))
	76	return -ENODEV;
	77
	78	/* Some Athlons misbehave when we frob bank 0 */
	79	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
bdbfbdd5 IM	80	boot_cpu_data.x86 == 6)
bdbfbdd5 IM	81	firstbank = 1;
1da177e4	82	else
bdbfbdd5	83	firstbank = 0;
1da177e4 LT	84
	85	/*
	86	* Check for non-fatal errors every MCE_RATE s
	87	*/
22293e58	88	schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
1da177e4	89	printk(KERN_INFO "Machine check exception polling timer started.\n");
bdbfbdd5	90
1da177e4 LT	91	return 0;
	92	}
	93	module_init(init_nonfatal_mce_checker);
	94
	95	MODULE_LICENSE("GPL");