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262e6811 BP |
1 | #ifndef __X86_MCE_INTERNAL_H__ |
2 | #define __X86_MCE_INTERNAL_H__ | |
3 | ||
8a25a2fd | 4 | #include <linux/device.h> |
817f32d0 AK |
5 | #include <asm/mce.h> |
6 | ||
7 | enum severity_level { | |
8 | MCE_NO_SEVERITY, | |
e3480271 CY |
9 | MCE_DEFERRED_SEVERITY, |
10 | MCE_UCNA_SEVERITY = MCE_DEFERRED_SEVERITY, | |
ed7290d0 | 11 | MCE_KEEP_SEVERITY, |
817f32d0 | 12 | MCE_SOME_SEVERITY, |
ed7290d0 | 13 | MCE_AO_SEVERITY, |
817f32d0 | 14 | MCE_UC_SEVERITY, |
ed7290d0 | 15 | MCE_AR_SEVERITY, |
817f32d0 AK |
16 | MCE_PANIC_SEVERITY, |
17 | }; | |
18 | ||
0dc9c639 | 19 | extern struct blocking_notifier_head x86_mce_decoder_chain; |
648ed940 | 20 | |
cebe1820 | 21 | #define ATTR_LEN 16 |
3f2f0680 | 22 | #define INITIAL_CHECK_INTERVAL 5 * 60 /* 5 minutes */ |
cebe1820 AK |
23 | |
24 | /* One object for each MCE bank, shared by all CPUs */ | |
25 | struct mce_bank { | |
26 | u64 ctl; /* subevents to enable */ | |
27 | unsigned char init; /* initialise bank? */ | |
8a25a2fd | 28 | struct device_attribute attr; /* device attribute */ |
cebe1820 AK |
29 | char attrname[ATTR_LEN]; /* attribute name */ |
30 | }; | |
31 | ||
648ed940 CG |
32 | struct mce_evt_llist { |
33 | struct llist_node llnode; | |
34 | struct mce mce; | |
35 | }; | |
36 | ||
cff4c039 | 37 | void mce_gen_pool_process(struct work_struct *__unused); |
648ed940 CG |
38 | bool mce_gen_pool_empty(void); |
39 | int mce_gen_pool_add(struct mce *mce); | |
40 | int mce_gen_pool_init(void); | |
5541c93c | 41 | struct llist_node *mce_gen_pool_prepare_records(void); |
648ed940 | 42 | |
43eaa2a1 | 43 | extern int (*mce_severity)(struct mce *a, int tolerant, char **msg, bool is_excp); |
5be9ed25 | 44 | struct dentry *mce_get_debugfs_dir(void); |
ed7290d0 | 45 | |
cebe1820 | 46 | extern struct mce_bank *mce_banks; |
c3d1fb56 | 47 | extern mce_banks_t mce_banks_ce_disabled; |
cebe1820 | 48 | |
55babd8f | 49 | #ifdef CONFIG_X86_MCE_INTEL |
3f2f0680 BP |
50 | unsigned long cmci_intel_adjust_timer(unsigned long interval); |
51 | bool mce_intel_cmci_poll(void); | |
55babd8f | 52 | void mce_intel_hcpu_update(unsigned long cpu); |
c3d1fb56 | 53 | void cmci_disable_bank(int bank); |
55babd8f | 54 | #else |
3f2f0680 BP |
55 | # define cmci_intel_adjust_timer mce_adjust_timer_default |
56 | static inline bool mce_intel_cmci_poll(void) { return false; } | |
55babd8f | 57 | static inline void mce_intel_hcpu_update(unsigned long cpu) { } |
c3d1fb56 | 58 | static inline void cmci_disable_bank(int bank) { } |
55babd8f CG |
59 | #endif |
60 | ||
61 | void mce_timer_kick(unsigned long interval); | |
62 | ||
482908b4 HY |
63 | #ifdef CONFIG_ACPI_APEI |
64 | int apei_write_mce(struct mce *m); | |
65 | ssize_t apei_read_mce(struct mce *m, u64 *record_id); | |
66 | int apei_check_mce(void); | |
67 | int apei_clear_mce(u64 record_id); | |
68 | #else | |
69 | static inline int apei_write_mce(struct mce *m) | |
70 | { | |
71 | return -EINVAL; | |
72 | } | |
73 | static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id) | |
74 | { | |
75 | return 0; | |
76 | } | |
77 | static inline int apei_check_mce(void) | |
78 | { | |
79 | return 0; | |
80 | } | |
81 | static inline int apei_clear_mce(u64 record_id) | |
82 | { | |
83 | return -EINVAL; | |
84 | } | |
85 | #endif | |
a79da384 BP |
86 | |
87 | void mce_inject_log(struct mce *m); | |
5541c93c TL |
88 | |
89 | /* | |
90 | * We consider records to be equivalent if bank+status+addr+misc all match. | |
91 | * This is only used when the system is going down because of a fatal error | |
92 | * to avoid cluttering the console log with essentially repeated information. | |
93 | * In normal processing all errors seen are logged. | |
94 | */ | |
95 | static inline bool mce_cmp(struct mce *m1, struct mce *m2) | |
96 | { | |
97 | return m1->bank != m2->bank || | |
98 | m1->status != m2->status || | |
99 | m1->addr != m2->addr || | |
100 | m1->misc != m2->misc; | |
101 | } | |
5de97c9f TL |
102 | |
103 | extern struct device_attribute dev_attr_trigger; | |
104 | ||
105 | #ifdef CONFIG_X86_MCELOG_LEGACY | |
fbe9ff9e BP |
106 | void mce_work_trigger(void); |
107 | void mce_register_injector_chain(struct notifier_block *nb); | |
108 | void mce_unregister_injector_chain(struct notifier_block *nb); | |
5de97c9f TL |
109 | #else |
110 | static inline void mce_work_trigger(void) { } | |
fbe9ff9e BP |
111 | static inline void mce_register_injector_chain(struct notifier_block *nb) { } |
112 | static inline void mce_unregister_injector_chain(struct notifier_block *nb) { } | |
5de97c9f | 113 | #endif |
262e6811 BP |
114 | |
115 | extern struct mca_config mca_cfg; | |
116 | ||
117 | #endif /* __X86_MCE_INTERNAL_H__ */ |