Commit | Line | Data |
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1da177e4 | 1 | /* |
fe27cb35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $) |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
8adcc0c6 | 35 | #include <linux/dmi.h> |
f3f47a67 | 36 | #include <linux/ftrace.h> |
1da177e4 LT |
37 | |
38 | #include <linux/acpi.h> | |
39 | #include <acpi/processor.h> | |
40 | ||
fe27cb35 | 41 | #include <asm/io.h> |
dde9f7ba | 42 | #include <asm/msr.h> |
fe27cb35 VP |
43 | #include <asm/processor.h> |
44 | #include <asm/cpufeature.h> | |
45 | #include <asm/delay.h> | |
46 | #include <asm/uaccess.h> | |
47 | ||
1da177e4 LT |
48 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg) |
49 | ||
50 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); | |
51 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
52 | MODULE_LICENSE("GPL"); | |
53 | ||
dde9f7ba VP |
54 | enum { |
55 | UNDEFINED_CAPABLE = 0, | |
56 | SYSTEM_INTEL_MSR_CAPABLE, | |
57 | SYSTEM_IO_CAPABLE, | |
58 | }; | |
59 | ||
60 | #define INTEL_MSR_RANGE (0xffff) | |
dfde5d62 | 61 | #define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1) |
dde9f7ba | 62 | |
fe27cb35 | 63 | struct acpi_cpufreq_data { |
64be7eed VP |
64 | struct acpi_processor_performance *acpi_data; |
65 | struct cpufreq_frequency_table *freq_table; | |
dfde5d62 | 66 | unsigned int max_freq; |
64be7eed VP |
67 | unsigned int resume; |
68 | unsigned int cpu_feature; | |
1da177e4 LT |
69 | }; |
70 | ||
ea348f3e | 71 | static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data); |
72 | ||
50109292 FY |
73 | /* acpi_perf_data is a pointer to percpu data. */ |
74 | static struct acpi_processor_performance *acpi_perf_data; | |
1da177e4 LT |
75 | |
76 | static struct cpufreq_driver acpi_cpufreq_driver; | |
77 | ||
d395bf12 VP |
78 | static unsigned int acpi_pstate_strict; |
79 | ||
dde9f7ba VP |
80 | static int check_est_cpu(unsigned int cpuid) |
81 | { | |
92cb7612 | 82 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); |
dde9f7ba VP |
83 | |
84 | if (cpu->x86_vendor != X86_VENDOR_INTEL || | |
64be7eed | 85 | !cpu_has(cpu, X86_FEATURE_EST)) |
dde9f7ba VP |
86 | return 0; |
87 | ||
88 | return 1; | |
89 | } | |
90 | ||
dde9f7ba | 91 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
fe27cb35 | 92 | { |
64be7eed VP |
93 | struct acpi_processor_performance *perf; |
94 | int i; | |
fe27cb35 VP |
95 | |
96 | perf = data->acpi_data; | |
97 | ||
95dd7227 | 98 | for (i=0; i<perf->state_count; i++) { |
fe27cb35 VP |
99 | if (value == perf->states[i].status) |
100 | return data->freq_table[i].frequency; | |
101 | } | |
102 | return 0; | |
103 | } | |
104 | ||
dde9f7ba VP |
105 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
106 | { | |
107 | int i; | |
a6f6e6e6 | 108 | struct acpi_processor_performance *perf; |
dde9f7ba VP |
109 | |
110 | msr &= INTEL_MSR_RANGE; | |
a6f6e6e6 VP |
111 | perf = data->acpi_data; |
112 | ||
95dd7227 | 113 | for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { |
a6f6e6e6 | 114 | if (msr == perf->states[data->freq_table[i].index].status) |
dde9f7ba VP |
115 | return data->freq_table[i].frequency; |
116 | } | |
117 | return data->freq_table[0].frequency; | |
118 | } | |
119 | ||
dde9f7ba VP |
120 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) |
121 | { | |
122 | switch (data->cpu_feature) { | |
64be7eed | 123 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba | 124 | return extract_msr(val, data); |
64be7eed | 125 | case SYSTEM_IO_CAPABLE: |
dde9f7ba | 126 | return extract_io(val, data); |
64be7eed | 127 | default: |
dde9f7ba VP |
128 | return 0; |
129 | } | |
130 | } | |
131 | ||
dde9f7ba VP |
132 | struct msr_addr { |
133 | u32 reg; | |
134 | }; | |
135 | ||
fe27cb35 VP |
136 | struct io_addr { |
137 | u16 port; | |
138 | u8 bit_width; | |
139 | }; | |
140 | ||
dde9f7ba VP |
141 | typedef union { |
142 | struct msr_addr msr; | |
143 | struct io_addr io; | |
144 | } drv_addr_union; | |
145 | ||
fe27cb35 | 146 | struct drv_cmd { |
dde9f7ba | 147 | unsigned int type; |
fe27cb35 | 148 | cpumask_t mask; |
dde9f7ba | 149 | drv_addr_union addr; |
fe27cb35 VP |
150 | u32 val; |
151 | }; | |
152 | ||
153 | static void do_drv_read(struct drv_cmd *cmd) | |
1da177e4 | 154 | { |
dde9f7ba VP |
155 | u32 h; |
156 | ||
157 | switch (cmd->type) { | |
64be7eed | 158 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
159 | rdmsr(cmd->addr.msr.reg, cmd->val, h); |
160 | break; | |
64be7eed | 161 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
162 | acpi_os_read_port((acpi_io_address)cmd->addr.io.port, |
163 | &cmd->val, | |
164 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 165 | break; |
64be7eed | 166 | default: |
dde9f7ba VP |
167 | break; |
168 | } | |
fe27cb35 | 169 | } |
1da177e4 | 170 | |
fe27cb35 VP |
171 | static void do_drv_write(struct drv_cmd *cmd) |
172 | { | |
13424f65 | 173 | u32 lo, hi; |
dde9f7ba VP |
174 | |
175 | switch (cmd->type) { | |
64be7eed | 176 | case SYSTEM_INTEL_MSR_CAPABLE: |
13424f65 VP |
177 | rdmsr(cmd->addr.msr.reg, lo, hi); |
178 | lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE); | |
179 | wrmsr(cmd->addr.msr.reg, lo, hi); | |
dde9f7ba | 180 | break; |
64be7eed | 181 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
182 | acpi_os_write_port((acpi_io_address)cmd->addr.io.port, |
183 | cmd->val, | |
184 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 185 | break; |
64be7eed | 186 | default: |
dde9f7ba VP |
187 | break; |
188 | } | |
fe27cb35 | 189 | } |
1da177e4 | 190 | |
95dd7227 | 191 | static void drv_read(struct drv_cmd *cmd) |
fe27cb35 | 192 | { |
64be7eed | 193 | cpumask_t saved_mask = current->cpus_allowed; |
fe27cb35 VP |
194 | cmd->val = 0; |
195 | ||
fc0e4748 | 196 | set_cpus_allowed_ptr(current, &cmd->mask); |
fe27cb35 | 197 | do_drv_read(cmd); |
fc0e4748 | 198 | set_cpus_allowed_ptr(current, &saved_mask); |
fe27cb35 VP |
199 | } |
200 | ||
201 | static void drv_write(struct drv_cmd *cmd) | |
202 | { | |
64be7eed VP |
203 | cpumask_t saved_mask = current->cpus_allowed; |
204 | unsigned int i; | |
fe27cb35 | 205 | |
334ef7a7 | 206 | for_each_cpu_mask_nr(i, cmd->mask) { |
0bc3cc03 | 207 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(i)); |
fe27cb35 | 208 | do_drv_write(cmd); |
1da177e4 LT |
209 | } |
210 | ||
fc0e4748 | 211 | set_cpus_allowed_ptr(current, &saved_mask); |
fe27cb35 VP |
212 | return; |
213 | } | |
1da177e4 | 214 | |
fc0e4748 | 215 | static u32 get_cur_val(const cpumask_t *mask) |
fe27cb35 | 216 | { |
64be7eed VP |
217 | struct acpi_processor_performance *perf; |
218 | struct drv_cmd cmd; | |
1da177e4 | 219 | |
fc0e4748 | 220 | if (unlikely(cpus_empty(*mask))) |
fe27cb35 | 221 | return 0; |
1da177e4 | 222 | |
fc0e4748 | 223 | switch (per_cpu(drv_data, first_cpu(*mask))->cpu_feature) { |
dde9f7ba VP |
224 | case SYSTEM_INTEL_MSR_CAPABLE: |
225 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
226 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
227 | break; | |
228 | case SYSTEM_IO_CAPABLE: | |
229 | cmd.type = SYSTEM_IO_CAPABLE; | |
fc0e4748 | 230 | perf = per_cpu(drv_data, first_cpu(*mask))->acpi_data; |
dde9f7ba VP |
231 | cmd.addr.io.port = perf->control_register.address; |
232 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
233 | break; | |
234 | default: | |
235 | return 0; | |
236 | } | |
237 | ||
fc0e4748 | 238 | cmd.mask = *mask; |
1da177e4 | 239 | |
fe27cb35 | 240 | drv_read(&cmd); |
1da177e4 | 241 | |
fe27cb35 VP |
242 | dprintk("get_cur_val = %u\n", cmd.val); |
243 | ||
244 | return cmd.val; | |
245 | } | |
1da177e4 | 246 | |
dfde5d62 VP |
247 | /* |
248 | * Return the measured active (C0) frequency on this CPU since last call | |
249 | * to this function. | |
250 | * Input: cpu number | |
251 | * Return: Average CPU frequency in terms of max frequency (zero on error) | |
252 | * | |
253 | * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance | |
254 | * over a period of time, while CPU is in C0 state. | |
255 | * IA32_MPERF counts at the rate of max advertised frequency | |
256 | * IA32_APERF counts at the rate of actual CPU frequency | |
257 | * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and | |
258 | * no meaning should be associated with absolute values of these MSRs. | |
259 | */ | |
bf0b90e3 | 260 | static unsigned int get_measured_perf(struct cpufreq_policy *policy, |
261 | unsigned int cpu) | |
dfde5d62 VP |
262 | { |
263 | union { | |
264 | struct { | |
265 | u32 lo; | |
266 | u32 hi; | |
267 | } split; | |
268 | u64 whole; | |
269 | } aperf_cur, mperf_cur; | |
270 | ||
271 | cpumask_t saved_mask; | |
272 | unsigned int perf_percent; | |
273 | unsigned int retval; | |
274 | ||
275 | saved_mask = current->cpus_allowed; | |
0bc3cc03 | 276 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); |
dfde5d62 VP |
277 | if (get_cpu() != cpu) { |
278 | /* We were not able to run on requested processor */ | |
279 | put_cpu(); | |
280 | return 0; | |
281 | } | |
282 | ||
283 | rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi); | |
284 | rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi); | |
285 | ||
286 | wrmsr(MSR_IA32_APERF, 0,0); | |
287 | wrmsr(MSR_IA32_MPERF, 0,0); | |
288 | ||
289 | #ifdef __i386__ | |
290 | /* | |
291 | * We dont want to do 64 bit divide with 32 bit kernel | |
292 | * Get an approximate value. Return failure in case we cannot get | |
293 | * an approximate value. | |
294 | */ | |
295 | if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) { | |
296 | int shift_count; | |
297 | u32 h; | |
298 | ||
299 | h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi); | |
300 | shift_count = fls(h); | |
301 | ||
302 | aperf_cur.whole >>= shift_count; | |
303 | mperf_cur.whole >>= shift_count; | |
304 | } | |
305 | ||
306 | if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) { | |
307 | int shift_count = 7; | |
308 | aperf_cur.split.lo >>= shift_count; | |
309 | mperf_cur.split.lo >>= shift_count; | |
310 | } | |
311 | ||
95dd7227 | 312 | if (aperf_cur.split.lo && mperf_cur.split.lo) |
dfde5d62 | 313 | perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo; |
95dd7227 | 314 | else |
dfde5d62 | 315 | perf_percent = 0; |
dfde5d62 VP |
316 | |
317 | #else | |
318 | if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) { | |
319 | int shift_count = 7; | |
320 | aperf_cur.whole >>= shift_count; | |
321 | mperf_cur.whole >>= shift_count; | |
322 | } | |
323 | ||
95dd7227 | 324 | if (aperf_cur.whole && mperf_cur.whole) |
dfde5d62 | 325 | perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole; |
95dd7227 | 326 | else |
dfde5d62 | 327 | perf_percent = 0; |
dfde5d62 VP |
328 | |
329 | #endif | |
330 | ||
bf0b90e3 | 331 | retval = per_cpu(drv_data, policy->cpu)->max_freq * perf_percent / 100; |
dfde5d62 VP |
332 | |
333 | put_cpu(); | |
fc0e4748 | 334 | set_cpus_allowed_ptr(current, &saved_mask); |
dfde5d62 VP |
335 | |
336 | dprintk("cpu %d: performance percent %d\n", cpu, perf_percent); | |
337 | return retval; | |
338 | } | |
339 | ||
fe27cb35 VP |
340 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
341 | { | |
ea348f3e | 342 | struct acpi_cpufreq_data *data = per_cpu(drv_data, cpu); |
64be7eed | 343 | unsigned int freq; |
e56a727b | 344 | unsigned int cached_freq; |
fe27cb35 VP |
345 | |
346 | dprintk("get_cur_freq_on_cpu (%d)\n", cpu); | |
347 | ||
348 | if (unlikely(data == NULL || | |
64be7eed | 349 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 | 350 | return 0; |
1da177e4 LT |
351 | } |
352 | ||
e56a727b | 353 | cached_freq = data->freq_table[data->acpi_data->state].frequency; |
0bc3cc03 | 354 | freq = extract_freq(get_cur_val(&cpumask_of_cpu(cpu)), data); |
e56a727b VP |
355 | if (freq != cached_freq) { |
356 | /* | |
357 | * The dreaded BIOS frequency change behind our back. | |
358 | * Force set the frequency on next target call. | |
359 | */ | |
360 | data->resume = 1; | |
361 | } | |
362 | ||
fe27cb35 | 363 | dprintk("cur freq = %u\n", freq); |
1da177e4 | 364 | |
fe27cb35 | 365 | return freq; |
1da177e4 LT |
366 | } |
367 | ||
fc0e4748 | 368 | static unsigned int check_freqs(const cpumask_t *mask, unsigned int freq, |
64be7eed | 369 | struct acpi_cpufreq_data *data) |
fe27cb35 | 370 | { |
64be7eed VP |
371 | unsigned int cur_freq; |
372 | unsigned int i; | |
1da177e4 | 373 | |
95dd7227 | 374 | for (i=0; i<100; i++) { |
fe27cb35 VP |
375 | cur_freq = extract_freq(get_cur_val(mask), data); |
376 | if (cur_freq == freq) | |
377 | return 1; | |
378 | udelay(10); | |
379 | } | |
380 | return 0; | |
381 | } | |
382 | ||
383 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
64be7eed | 384 | unsigned int target_freq, unsigned int relation) |
1da177e4 | 385 | { |
ea348f3e | 386 | struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu); |
64be7eed VP |
387 | struct acpi_processor_performance *perf; |
388 | struct cpufreq_freqs freqs; | |
389 | cpumask_t online_policy_cpus; | |
390 | struct drv_cmd cmd; | |
8edc59d9 VP |
391 | unsigned int next_state = 0; /* Index into freq_table */ |
392 | unsigned int next_perf_state = 0; /* Index into perf table */ | |
64be7eed VP |
393 | unsigned int i; |
394 | int result = 0; | |
f3f47a67 | 395 | struct power_trace it; |
fe27cb35 VP |
396 | |
397 | dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); | |
398 | ||
399 | if (unlikely(data == NULL || | |
95dd7227 | 400 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 VP |
401 | return -ENODEV; |
402 | } | |
1da177e4 | 403 | |
fe27cb35 | 404 | perf = data->acpi_data; |
1da177e4 | 405 | result = cpufreq_frequency_table_target(policy, |
64be7eed VP |
406 | data->freq_table, |
407 | target_freq, | |
408 | relation, &next_state); | |
09b4d1ee | 409 | if (unlikely(result)) |
fe27cb35 | 410 | return -ENODEV; |
09b4d1ee | 411 | |
7e1f19e5 | 412 | #ifdef CONFIG_HOTPLUG_CPU |
09b4d1ee | 413 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
835481d9 | 414 | cpumask_and(&online_policy_cpus, cpu_online_mask, policy->cpus); |
7e1f19e5 AM |
415 | #else |
416 | online_policy_cpus = policy->cpus; | |
417 | #endif | |
1da177e4 | 418 | |
fe27cb35 | 419 | next_perf_state = data->freq_table[next_state].index; |
7650b281 | 420 | if (perf->state == next_perf_state) { |
fe27cb35 | 421 | if (unlikely(data->resume)) { |
64be7eed VP |
422 | dprintk("Called after resume, resetting to P%d\n", |
423 | next_perf_state); | |
fe27cb35 VP |
424 | data->resume = 0; |
425 | } else { | |
64be7eed VP |
426 | dprintk("Already at target state (P%d)\n", |
427 | next_perf_state); | |
fe27cb35 VP |
428 | return 0; |
429 | } | |
09b4d1ee VP |
430 | } |
431 | ||
f3f47a67 AV |
432 | trace_power_mark(&it, POWER_PSTATE, next_perf_state); |
433 | ||
64be7eed VP |
434 | switch (data->cpu_feature) { |
435 | case SYSTEM_INTEL_MSR_CAPABLE: | |
436 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
437 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
13424f65 | 438 | cmd.val = (u32) perf->states[next_perf_state].control; |
64be7eed VP |
439 | break; |
440 | case SYSTEM_IO_CAPABLE: | |
441 | cmd.type = SYSTEM_IO_CAPABLE; | |
442 | cmd.addr.io.port = perf->control_register.address; | |
443 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
444 | cmd.val = (u32) perf->states[next_perf_state].control; | |
445 | break; | |
446 | default: | |
447 | return -ENODEV; | |
448 | } | |
09b4d1ee | 449 | |
fe27cb35 | 450 | cpus_clear(cmd.mask); |
09b4d1ee | 451 | |
fe27cb35 VP |
452 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
453 | cmd.mask = online_policy_cpus; | |
454 | else | |
455 | cpu_set(policy->cpu, cmd.mask); | |
09b4d1ee | 456 | |
8edc59d9 VP |
457 | freqs.old = perf->states[perf->state].core_frequency * 1000; |
458 | freqs.new = data->freq_table[next_state].frequency; | |
334ef7a7 | 459 | for_each_cpu_mask_nr(i, cmd.mask) { |
fe27cb35 VP |
460 | freqs.cpu = i; |
461 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 462 | } |
1da177e4 | 463 | |
fe27cb35 | 464 | drv_write(&cmd); |
09b4d1ee | 465 | |
fe27cb35 | 466 | if (acpi_pstate_strict) { |
fc0e4748 | 467 | if (!check_freqs(&cmd.mask, freqs.new, data)) { |
fe27cb35 | 468 | dprintk("acpi_cpufreq_target failed (%d)\n", |
64be7eed | 469 | policy->cpu); |
fe27cb35 | 470 | return -EAGAIN; |
09b4d1ee VP |
471 | } |
472 | } | |
473 | ||
334ef7a7 | 474 | for_each_cpu_mask_nr(i, cmd.mask) { |
fe27cb35 VP |
475 | freqs.cpu = i; |
476 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
477 | } | |
478 | perf->state = next_perf_state; | |
479 | ||
480 | return result; | |
1da177e4 LT |
481 | } |
482 | ||
64be7eed | 483 | static int acpi_cpufreq_verify(struct cpufreq_policy *policy) |
1da177e4 | 484 | { |
ea348f3e | 485 | struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu); |
1da177e4 LT |
486 | |
487 | dprintk("acpi_cpufreq_verify\n"); | |
488 | ||
fe27cb35 | 489 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
490 | } |
491 | ||
1da177e4 | 492 | static unsigned long |
64be7eed | 493 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 494 | { |
64be7eed | 495 | struct acpi_processor_performance *perf = data->acpi_data; |
09b4d1ee | 496 | |
1da177e4 LT |
497 | if (cpu_khz) { |
498 | /* search the closest match to cpu_khz */ | |
499 | unsigned int i; | |
500 | unsigned long freq; | |
09b4d1ee | 501 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 502 | |
95dd7227 | 503 | for (i=0; i<(perf->state_count-1); i++) { |
1da177e4 | 504 | freq = freqn; |
95dd7227 | 505 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 506 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 507 | perf->state = i; |
64be7eed | 508 | return freq; |
1da177e4 LT |
509 | } |
510 | } | |
95dd7227 | 511 | perf->state = perf->state_count-1; |
64be7eed | 512 | return freqn; |
09b4d1ee | 513 | } else { |
1da177e4 | 514 | /* assume CPU is at P0... */ |
09b4d1ee VP |
515 | perf->state = 0; |
516 | return perf->states[0].core_frequency * 1000; | |
517 | } | |
1da177e4 LT |
518 | } |
519 | ||
2fdf66b4 RR |
520 | static void free_acpi_perf_data(void) |
521 | { | |
522 | unsigned int i; | |
523 | ||
524 | /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ | |
525 | for_each_possible_cpu(i) | |
526 | free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) | |
527 | ->shared_cpu_map); | |
528 | free_percpu(acpi_perf_data); | |
529 | } | |
530 | ||
09b4d1ee VP |
531 | /* |
532 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
533 | * | |
534 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
535 | * in order to determine correct frequency and voltage pairings. We can | |
536 | * do _PDC and _PSD and find out the processor dependency for the | |
537 | * actual init that will happen later... | |
538 | */ | |
50109292 | 539 | static int __init acpi_cpufreq_early_init(void) |
09b4d1ee | 540 | { |
2fdf66b4 | 541 | unsigned int i; |
09b4d1ee VP |
542 | dprintk("acpi_cpufreq_early_init\n"); |
543 | ||
50109292 FY |
544 | acpi_perf_data = alloc_percpu(struct acpi_processor_performance); |
545 | if (!acpi_perf_data) { | |
546 | dprintk("Memory allocation error for acpi_perf_data.\n"); | |
547 | return -ENOMEM; | |
09b4d1ee | 548 | } |
2fdf66b4 | 549 | for_each_possible_cpu(i) { |
80855f73 MT |
550 | if (!alloc_cpumask_var_node( |
551 | &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, | |
552 | GFP_KERNEL, cpu_to_node(i))) { | |
2fdf66b4 RR |
553 | |
554 | /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ | |
555 | free_acpi_perf_data(); | |
556 | return -ENOMEM; | |
557 | } | |
558 | } | |
09b4d1ee VP |
559 | |
560 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
561 | acpi_processor_preregister_performance(acpi_perf_data); |
562 | return 0; | |
09b4d1ee VP |
563 | } |
564 | ||
95625b8f | 565 | #ifdef CONFIG_SMP |
8adcc0c6 VP |
566 | /* |
567 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
568 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
569 | * detected, this has a side effect of making CPU run at a different speed | |
570 | * than OS intended it to run at. Detect it and handle it cleanly. | |
571 | */ | |
572 | static int bios_with_sw_any_bug; | |
573 | ||
1855256c | 574 | static int sw_any_bug_found(const struct dmi_system_id *d) |
8adcc0c6 VP |
575 | { |
576 | bios_with_sw_any_bug = 1; | |
577 | return 0; | |
578 | } | |
579 | ||
1855256c | 580 | static const struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
581 | { |
582 | .callback = sw_any_bug_found, | |
583 | .ident = "Supermicro Server X6DLP", | |
584 | .matches = { | |
585 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
586 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
587 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
588 | }, | |
589 | }, | |
590 | { } | |
591 | }; | |
95625b8f | 592 | #endif |
8adcc0c6 | 593 | |
64be7eed | 594 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 595 | { |
64be7eed VP |
596 | unsigned int i; |
597 | unsigned int valid_states = 0; | |
598 | unsigned int cpu = policy->cpu; | |
599 | struct acpi_cpufreq_data *data; | |
64be7eed | 600 | unsigned int result = 0; |
92cb7612 | 601 | struct cpuinfo_x86 *c = &cpu_data(policy->cpu); |
64be7eed | 602 | struct acpi_processor_performance *perf; |
1da177e4 | 603 | |
1da177e4 | 604 | dprintk("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 605 | |
fe27cb35 | 606 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 | 607 | if (!data) |
64be7eed | 608 | return -ENOMEM; |
1da177e4 | 609 | |
50109292 | 610 | data->acpi_data = percpu_ptr(acpi_perf_data, cpu); |
ea348f3e | 611 | per_cpu(drv_data, cpu) = data; |
1da177e4 | 612 | |
95dd7227 | 613 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
fe27cb35 | 614 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
1da177e4 | 615 | |
fe27cb35 | 616 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
617 | if (result) |
618 | goto err_free; | |
619 | ||
09b4d1ee | 620 | perf = data->acpi_data; |
09b4d1ee | 621 | policy->shared_type = perf->shared_type; |
95dd7227 | 622 | |
46f18e3a | 623 | /* |
95dd7227 | 624 | * Will let policy->cpus know about dependency only when software |
46f18e3a VP |
625 | * coordination is required. |
626 | */ | |
627 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 628 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
835481d9 | 629 | cpumask_copy(policy->cpus, perf->shared_cpu_map); |
8adcc0c6 | 630 | } |
835481d9 | 631 | cpumask_copy(policy->related_cpus, perf->shared_cpu_map); |
8adcc0c6 VP |
632 | |
633 | #ifdef CONFIG_SMP | |
634 | dmi_check_system(sw_any_bug_dmi_table); | |
835481d9 | 635 | if (bios_with_sw_any_bug && cpumask_weight(policy->cpus) == 1) { |
8adcc0c6 | 636 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; |
835481d9 | 637 | cpumask_copy(policy->cpus, cpu_core_mask(cpu)); |
8adcc0c6 VP |
638 | } |
639 | #endif | |
09b4d1ee | 640 | |
1da177e4 | 641 | /* capability check */ |
09b4d1ee | 642 | if (perf->state_count <= 1) { |
1da177e4 LT |
643 | dprintk("No P-States\n"); |
644 | result = -ENODEV; | |
645 | goto err_unreg; | |
646 | } | |
09b4d1ee | 647 | |
fe27cb35 VP |
648 | if (perf->control_register.space_id != perf->status_register.space_id) { |
649 | result = -ENODEV; | |
650 | goto err_unreg; | |
651 | } | |
652 | ||
653 | switch (perf->control_register.space_id) { | |
64be7eed | 654 | case ACPI_ADR_SPACE_SYSTEM_IO: |
fe27cb35 | 655 | dprintk("SYSTEM IO addr space\n"); |
dde9f7ba VP |
656 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
657 | break; | |
64be7eed | 658 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
dde9f7ba VP |
659 | dprintk("HARDWARE addr space\n"); |
660 | if (!check_est_cpu(cpu)) { | |
661 | result = -ENODEV; | |
662 | goto err_unreg; | |
663 | } | |
664 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 | 665 | break; |
64be7eed | 666 | default: |
fe27cb35 | 667 | dprintk("Unknown addr space %d\n", |
64be7eed | 668 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
669 | result = -ENODEV; |
670 | goto err_unreg; | |
671 | } | |
672 | ||
95dd7227 DJ |
673 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * |
674 | (perf->state_count+1), GFP_KERNEL); | |
1da177e4 LT |
675 | if (!data->freq_table) { |
676 | result = -ENOMEM; | |
677 | goto err_unreg; | |
678 | } | |
679 | ||
680 | /* detect transition latency */ | |
681 | policy->cpuinfo.transition_latency = 0; | |
95dd7227 | 682 | for (i=0; i<perf->state_count; i++) { |
64be7eed VP |
683 | if ((perf->states[i].transition_latency * 1000) > |
684 | policy->cpuinfo.transition_latency) | |
685 | policy->cpuinfo.transition_latency = | |
686 | perf->states[i].transition_latency * 1000; | |
1da177e4 | 687 | } |
1da177e4 | 688 | |
dfde5d62 | 689 | data->max_freq = perf->states[0].core_frequency * 1000; |
1da177e4 | 690 | /* table init */ |
95dd7227 | 691 | for (i=0; i<perf->state_count; i++) { |
3cdf552b ZR |
692 | if (i>0 && perf->states[i].core_frequency >= |
693 | data->freq_table[valid_states-1].frequency / 1000) | |
fe27cb35 VP |
694 | continue; |
695 | ||
696 | data->freq_table[valid_states].index = i; | |
697 | data->freq_table[valid_states].frequency = | |
64be7eed | 698 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 699 | valid_states++; |
1da177e4 | 700 | } |
3d4a7ef3 | 701 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
8edc59d9 | 702 | perf->state = 0; |
1da177e4 LT |
703 | |
704 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
95dd7227 | 705 | if (result) |
1da177e4 | 706 | goto err_freqfree; |
1da177e4 | 707 | |
a507ac4b | 708 | switch (perf->control_register.space_id) { |
64be7eed | 709 | case ACPI_ADR_SPACE_SYSTEM_IO: |
dde9f7ba VP |
710 | /* Current speed is unknown and not detectable by IO port */ |
711 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
712 | break; | |
64be7eed | 713 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 714 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
a507ac4b | 715 | policy->cur = get_cur_freq_on_cpu(cpu); |
dde9f7ba | 716 | break; |
64be7eed | 717 | default: |
dde9f7ba VP |
718 | break; |
719 | } | |
720 | ||
1da177e4 LT |
721 | /* notify BIOS that we exist */ |
722 | acpi_processor_notify_smm(THIS_MODULE); | |
723 | ||
dfde5d62 VP |
724 | /* Check for APERF/MPERF support in hardware */ |
725 | if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) { | |
726 | unsigned int ecx; | |
727 | ecx = cpuid_ecx(6); | |
95dd7227 | 728 | if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY) |
dfde5d62 | 729 | acpi_cpufreq_driver.getavg = get_measured_perf; |
dfde5d62 VP |
730 | } |
731 | ||
fe27cb35 | 732 | dprintk("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 733 | for (i = 0; i < perf->state_count; i++) |
1da177e4 | 734 | dprintk(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 735 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
736 | (u32) perf->states[i].core_frequency, |
737 | (u32) perf->states[i].power, | |
738 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
739 | |
740 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
64be7eed | 741 | |
4b31e774 DB |
742 | /* |
743 | * the first call to ->target() should result in us actually | |
744 | * writing something to the appropriate registers. | |
745 | */ | |
746 | data->resume = 1; | |
64be7eed | 747 | |
fe27cb35 | 748 | return result; |
1da177e4 | 749 | |
95dd7227 | 750 | err_freqfree: |
1da177e4 | 751 | kfree(data->freq_table); |
95dd7227 | 752 | err_unreg: |
09b4d1ee | 753 | acpi_processor_unregister_performance(perf, cpu); |
95dd7227 | 754 | err_free: |
1da177e4 | 755 | kfree(data); |
ea348f3e | 756 | per_cpu(drv_data, cpu) = NULL; |
1da177e4 | 757 | |
64be7eed | 758 | return result; |
1da177e4 LT |
759 | } |
760 | ||
64be7eed | 761 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 762 | { |
ea348f3e | 763 | struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu); |
1da177e4 | 764 | |
1da177e4 LT |
765 | dprintk("acpi_cpufreq_cpu_exit\n"); |
766 | ||
767 | if (data) { | |
768 | cpufreq_frequency_table_put_attr(policy->cpu); | |
ea348f3e | 769 | per_cpu(drv_data, policy->cpu) = NULL; |
64be7eed VP |
770 | acpi_processor_unregister_performance(data->acpi_data, |
771 | policy->cpu); | |
1da177e4 LT |
772 | kfree(data); |
773 | } | |
774 | ||
64be7eed | 775 | return 0; |
1da177e4 LT |
776 | } |
777 | ||
64be7eed | 778 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 779 | { |
ea348f3e | 780 | struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu); |
1da177e4 | 781 | |
1da177e4 LT |
782 | dprintk("acpi_cpufreq_resume\n"); |
783 | ||
784 | data->resume = 1; | |
785 | ||
64be7eed | 786 | return 0; |
1da177e4 LT |
787 | } |
788 | ||
64be7eed | 789 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 LT |
790 | &cpufreq_freq_attr_scaling_available_freqs, |
791 | NULL, | |
792 | }; | |
793 | ||
794 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
64be7eed VP |
795 | .verify = acpi_cpufreq_verify, |
796 | .target = acpi_cpufreq_target, | |
64be7eed VP |
797 | .init = acpi_cpufreq_cpu_init, |
798 | .exit = acpi_cpufreq_cpu_exit, | |
799 | .resume = acpi_cpufreq_resume, | |
800 | .name = "acpi-cpufreq", | |
801 | .owner = THIS_MODULE, | |
802 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
803 | }; |
804 | ||
64be7eed | 805 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 806 | { |
50109292 FY |
807 | int ret; |
808 | ||
ee297533 YL |
809 | if (acpi_disabled) |
810 | return 0; | |
811 | ||
1da177e4 LT |
812 | dprintk("acpi_cpufreq_init\n"); |
813 | ||
50109292 FY |
814 | ret = acpi_cpufreq_early_init(); |
815 | if (ret) | |
816 | return ret; | |
09b4d1ee | 817 | |
847aef6f AM |
818 | ret = cpufreq_register_driver(&acpi_cpufreq_driver); |
819 | if (ret) | |
2fdf66b4 | 820 | free_acpi_perf_data(); |
847aef6f AM |
821 | |
822 | return ret; | |
1da177e4 LT |
823 | } |
824 | ||
64be7eed | 825 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 LT |
826 | { |
827 | dprintk("acpi_cpufreq_exit\n"); | |
828 | ||
829 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
830 | ||
50109292 | 831 | free_percpu(acpi_perf_data); |
1da177e4 LT |
832 | } |
833 | ||
d395bf12 | 834 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed | 835 | MODULE_PARM_DESC(acpi_pstate_strict, |
95dd7227 DJ |
836 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
837 | "performed during frequency changes."); | |
1da177e4 LT |
838 | |
839 | late_initcall(acpi_cpufreq_init); | |
840 | module_exit(acpi_cpufreq_exit); | |
841 | ||
842 | MODULE_ALIAS("acpi"); |