Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
3a58df35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
8adcc0c6 | 35 | #include <linux/dmi.h> |
61613521 | 36 | #include <trace/events/power.h> |
1da177e4 LT |
37 | |
38 | #include <linux/acpi.h> | |
3a58df35 DJ |
39 | #include <linux/io.h> |
40 | #include <linux/delay.h> | |
41 | #include <linux/uaccess.h> | |
42 | ||
1da177e4 LT |
43 | #include <acpi/processor.h> |
44 | ||
dde9f7ba | 45 | #include <asm/msr.h> |
fe27cb35 VP |
46 | #include <asm/processor.h> |
47 | #include <asm/cpufeature.h> | |
fe27cb35 | 48 | |
3a58df35 DJ |
49 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \ |
50 | "acpi-cpufreq", msg) | |
1da177e4 LT |
51 | |
52 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); | |
53 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
54 | MODULE_LICENSE("GPL"); | |
55 | ||
dde9f7ba VP |
56 | enum { |
57 | UNDEFINED_CAPABLE = 0, | |
58 | SYSTEM_INTEL_MSR_CAPABLE, | |
59 | SYSTEM_IO_CAPABLE, | |
60 | }; | |
61 | ||
62 | #define INTEL_MSR_RANGE (0xffff) | |
63 | ||
fe27cb35 | 64 | struct acpi_cpufreq_data { |
64be7eed VP |
65 | struct acpi_processor_performance *acpi_data; |
66 | struct cpufreq_frequency_table *freq_table; | |
67 | unsigned int resume; | |
68 | unsigned int cpu_feature; | |
1da177e4 LT |
69 | }; |
70 | ||
f1625066 | 71 | static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data); |
ea348f3e | 72 | |
f1625066 | 73 | static DEFINE_PER_CPU(struct aperfmperf, acfreq_old_perf); |
093f13e2 | 74 | |
50109292 FY |
75 | /* acpi_perf_data is a pointer to percpu data. */ |
76 | static struct acpi_processor_performance *acpi_perf_data; | |
1da177e4 LT |
77 | |
78 | static struct cpufreq_driver acpi_cpufreq_driver; | |
79 | ||
d395bf12 VP |
80 | static unsigned int acpi_pstate_strict; |
81 | ||
dde9f7ba VP |
82 | static int check_est_cpu(unsigned int cpuid) |
83 | { | |
92cb7612 | 84 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); |
dde9f7ba | 85 | |
0de51088 | 86 | return cpu_has(cpu, X86_FEATURE_EST); |
dde9f7ba VP |
87 | } |
88 | ||
dde9f7ba | 89 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
fe27cb35 | 90 | { |
64be7eed VP |
91 | struct acpi_processor_performance *perf; |
92 | int i; | |
fe27cb35 VP |
93 | |
94 | perf = data->acpi_data; | |
95 | ||
3a58df35 | 96 | for (i = 0; i < perf->state_count; i++) { |
fe27cb35 VP |
97 | if (value == perf->states[i].status) |
98 | return data->freq_table[i].frequency; | |
99 | } | |
100 | return 0; | |
101 | } | |
102 | ||
dde9f7ba VP |
103 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
104 | { | |
105 | int i; | |
a6f6e6e6 | 106 | struct acpi_processor_performance *perf; |
dde9f7ba VP |
107 | |
108 | msr &= INTEL_MSR_RANGE; | |
a6f6e6e6 VP |
109 | perf = data->acpi_data; |
110 | ||
3a58df35 | 111 | for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { |
a6f6e6e6 | 112 | if (msr == perf->states[data->freq_table[i].index].status) |
dde9f7ba VP |
113 | return data->freq_table[i].frequency; |
114 | } | |
115 | return data->freq_table[0].frequency; | |
116 | } | |
117 | ||
dde9f7ba VP |
118 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) |
119 | { | |
120 | switch (data->cpu_feature) { | |
64be7eed | 121 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba | 122 | return extract_msr(val, data); |
64be7eed | 123 | case SYSTEM_IO_CAPABLE: |
dde9f7ba | 124 | return extract_io(val, data); |
64be7eed | 125 | default: |
dde9f7ba VP |
126 | return 0; |
127 | } | |
128 | } | |
129 | ||
dde9f7ba VP |
130 | struct msr_addr { |
131 | u32 reg; | |
132 | }; | |
133 | ||
fe27cb35 VP |
134 | struct io_addr { |
135 | u16 port; | |
136 | u8 bit_width; | |
137 | }; | |
138 | ||
139 | struct drv_cmd { | |
dde9f7ba | 140 | unsigned int type; |
bfa318ad | 141 | const struct cpumask *mask; |
3a58df35 DJ |
142 | union { |
143 | struct msr_addr msr; | |
144 | struct io_addr io; | |
145 | } addr; | |
fe27cb35 VP |
146 | u32 val; |
147 | }; | |
148 | ||
01599fca AM |
149 | /* Called via smp_call_function_single(), on the target CPU */ |
150 | static void do_drv_read(void *_cmd) | |
1da177e4 | 151 | { |
72859081 | 152 | struct drv_cmd *cmd = _cmd; |
dde9f7ba VP |
153 | u32 h; |
154 | ||
155 | switch (cmd->type) { | |
64be7eed | 156 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
157 | rdmsr(cmd->addr.msr.reg, cmd->val, h); |
158 | break; | |
64be7eed | 159 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
160 | acpi_os_read_port((acpi_io_address)cmd->addr.io.port, |
161 | &cmd->val, | |
162 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 163 | break; |
64be7eed | 164 | default: |
dde9f7ba VP |
165 | break; |
166 | } | |
fe27cb35 | 167 | } |
1da177e4 | 168 | |
01599fca AM |
169 | /* Called via smp_call_function_many(), on the target CPUs */ |
170 | static void do_drv_write(void *_cmd) | |
fe27cb35 | 171 | { |
72859081 | 172 | struct drv_cmd *cmd = _cmd; |
13424f65 | 173 | u32 lo, hi; |
dde9f7ba VP |
174 | |
175 | switch (cmd->type) { | |
64be7eed | 176 | case SYSTEM_INTEL_MSR_CAPABLE: |
13424f65 VP |
177 | rdmsr(cmd->addr.msr.reg, lo, hi); |
178 | lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE); | |
179 | wrmsr(cmd->addr.msr.reg, lo, hi); | |
dde9f7ba | 180 | break; |
64be7eed | 181 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
182 | acpi_os_write_port((acpi_io_address)cmd->addr.io.port, |
183 | cmd->val, | |
184 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 185 | break; |
64be7eed | 186 | default: |
dde9f7ba VP |
187 | break; |
188 | } | |
fe27cb35 | 189 | } |
1da177e4 | 190 | |
95dd7227 | 191 | static void drv_read(struct drv_cmd *cmd) |
fe27cb35 | 192 | { |
4a28395d | 193 | int err; |
fe27cb35 VP |
194 | cmd->val = 0; |
195 | ||
4a28395d AM |
196 | err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1); |
197 | WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ | |
fe27cb35 VP |
198 | } |
199 | ||
200 | static void drv_write(struct drv_cmd *cmd) | |
201 | { | |
ea34f43a LT |
202 | int this_cpu; |
203 | ||
204 | this_cpu = get_cpu(); | |
205 | if (cpumask_test_cpu(this_cpu, cmd->mask)) | |
206 | do_drv_write(cmd); | |
01599fca | 207 | smp_call_function_many(cmd->mask, do_drv_write, cmd, 1); |
ea34f43a | 208 | put_cpu(); |
fe27cb35 | 209 | } |
1da177e4 | 210 | |
4d8bb537 | 211 | static u32 get_cur_val(const struct cpumask *mask) |
fe27cb35 | 212 | { |
64be7eed VP |
213 | struct acpi_processor_performance *perf; |
214 | struct drv_cmd cmd; | |
1da177e4 | 215 | |
4d8bb537 | 216 | if (unlikely(cpumask_empty(mask))) |
fe27cb35 | 217 | return 0; |
1da177e4 | 218 | |
f1625066 | 219 | switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) { |
dde9f7ba VP |
220 | case SYSTEM_INTEL_MSR_CAPABLE: |
221 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
222 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
223 | break; | |
224 | case SYSTEM_IO_CAPABLE: | |
225 | cmd.type = SYSTEM_IO_CAPABLE; | |
f1625066 | 226 | perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data; |
dde9f7ba VP |
227 | cmd.addr.io.port = perf->control_register.address; |
228 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
229 | break; | |
230 | default: | |
231 | return 0; | |
232 | } | |
233 | ||
bfa318ad | 234 | cmd.mask = mask; |
fe27cb35 | 235 | drv_read(&cmd); |
1da177e4 | 236 | |
fe27cb35 VP |
237 | dprintk("get_cur_val = %u\n", cmd.val); |
238 | ||
239 | return cmd.val; | |
240 | } | |
1da177e4 | 241 | |
01599fca AM |
242 | /* Called via smp_call_function_single(), on the target CPU */ |
243 | static void read_measured_perf_ctrs(void *_cur) | |
e39ad415 | 244 | { |
5cbc19a9 | 245 | struct aperfmperf *am = _cur; |
e39ad415 | 246 | |
5cbc19a9 | 247 | get_aperfmperf(am); |
e39ad415 MT |
248 | } |
249 | ||
dfde5d62 VP |
250 | /* |
251 | * Return the measured active (C0) frequency on this CPU since last call | |
252 | * to this function. | |
253 | * Input: cpu number | |
254 | * Return: Average CPU frequency in terms of max frequency (zero on error) | |
255 | * | |
256 | * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance | |
257 | * over a period of time, while CPU is in C0 state. | |
258 | * IA32_MPERF counts at the rate of max advertised frequency | |
259 | * IA32_APERF counts at the rate of actual CPU frequency | |
260 | * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and | |
261 | * no meaning should be associated with absolute values of these MSRs. | |
262 | */ | |
bf0b90e3 | 263 | static unsigned int get_measured_perf(struct cpufreq_policy *policy, |
264 | unsigned int cpu) | |
dfde5d62 | 265 | { |
5cbc19a9 PZ |
266 | struct aperfmperf perf; |
267 | unsigned long ratio; | |
dfde5d62 VP |
268 | unsigned int retval; |
269 | ||
5cbc19a9 | 270 | if (smp_call_function_single(cpu, read_measured_perf_ctrs, &perf, 1)) |
dfde5d62 | 271 | return 0; |
dfde5d62 | 272 | |
f1625066 TH |
273 | ratio = calc_aperfmperf_ratio(&per_cpu(acfreq_old_perf, cpu), &perf); |
274 | per_cpu(acfreq_old_perf, cpu) = perf; | |
dfde5d62 | 275 | |
5cbc19a9 | 276 | retval = (policy->cpuinfo.max_freq * ratio) >> APERFMPERF_SHIFT; |
dfde5d62 | 277 | |
dfde5d62 VP |
278 | return retval; |
279 | } | |
280 | ||
fe27cb35 VP |
281 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
282 | { | |
f1625066 | 283 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu); |
64be7eed | 284 | unsigned int freq; |
e56a727b | 285 | unsigned int cached_freq; |
fe27cb35 VP |
286 | |
287 | dprintk("get_cur_freq_on_cpu (%d)\n", cpu); | |
288 | ||
289 | if (unlikely(data == NULL || | |
64be7eed | 290 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 | 291 | return 0; |
1da177e4 LT |
292 | } |
293 | ||
e56a727b | 294 | cached_freq = data->freq_table[data->acpi_data->state].frequency; |
e39ad415 | 295 | freq = extract_freq(get_cur_val(cpumask_of(cpu)), data); |
e56a727b VP |
296 | if (freq != cached_freq) { |
297 | /* | |
298 | * The dreaded BIOS frequency change behind our back. | |
299 | * Force set the frequency on next target call. | |
300 | */ | |
301 | data->resume = 1; | |
302 | } | |
303 | ||
fe27cb35 | 304 | dprintk("cur freq = %u\n", freq); |
1da177e4 | 305 | |
fe27cb35 | 306 | return freq; |
1da177e4 LT |
307 | } |
308 | ||
72859081 | 309 | static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq, |
64be7eed | 310 | struct acpi_cpufreq_data *data) |
fe27cb35 | 311 | { |
64be7eed VP |
312 | unsigned int cur_freq; |
313 | unsigned int i; | |
1da177e4 | 314 | |
3a58df35 | 315 | for (i = 0; i < 100; i++) { |
fe27cb35 VP |
316 | cur_freq = extract_freq(get_cur_val(mask), data); |
317 | if (cur_freq == freq) | |
318 | return 1; | |
319 | udelay(10); | |
320 | } | |
321 | return 0; | |
322 | } | |
323 | ||
324 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
64be7eed | 325 | unsigned int target_freq, unsigned int relation) |
1da177e4 | 326 | { |
f1625066 | 327 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
64be7eed VP |
328 | struct acpi_processor_performance *perf; |
329 | struct cpufreq_freqs freqs; | |
64be7eed | 330 | struct drv_cmd cmd; |
8edc59d9 VP |
331 | unsigned int next_state = 0; /* Index into freq_table */ |
332 | unsigned int next_perf_state = 0; /* Index into perf table */ | |
64be7eed VP |
333 | unsigned int i; |
334 | int result = 0; | |
fe27cb35 VP |
335 | |
336 | dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); | |
337 | ||
338 | if (unlikely(data == NULL || | |
95dd7227 | 339 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 VP |
340 | return -ENODEV; |
341 | } | |
1da177e4 | 342 | |
fe27cb35 | 343 | perf = data->acpi_data; |
1da177e4 | 344 | result = cpufreq_frequency_table_target(policy, |
64be7eed VP |
345 | data->freq_table, |
346 | target_freq, | |
347 | relation, &next_state); | |
4d8bb537 MT |
348 | if (unlikely(result)) { |
349 | result = -ENODEV; | |
350 | goto out; | |
351 | } | |
1da177e4 | 352 | |
fe27cb35 | 353 | next_perf_state = data->freq_table[next_state].index; |
7650b281 | 354 | if (perf->state == next_perf_state) { |
fe27cb35 | 355 | if (unlikely(data->resume)) { |
64be7eed VP |
356 | dprintk("Called after resume, resetting to P%d\n", |
357 | next_perf_state); | |
fe27cb35 VP |
358 | data->resume = 0; |
359 | } else { | |
64be7eed VP |
360 | dprintk("Already at target state (P%d)\n", |
361 | next_perf_state); | |
4d8bb537 | 362 | goto out; |
fe27cb35 | 363 | } |
09b4d1ee VP |
364 | } |
365 | ||
61613521 | 366 | trace_power_frequency(POWER_PSTATE, data->freq_table[next_state].frequency); |
f3f47a67 | 367 | |
64be7eed VP |
368 | switch (data->cpu_feature) { |
369 | case SYSTEM_INTEL_MSR_CAPABLE: | |
370 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
371 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
13424f65 | 372 | cmd.val = (u32) perf->states[next_perf_state].control; |
64be7eed VP |
373 | break; |
374 | case SYSTEM_IO_CAPABLE: | |
375 | cmd.type = SYSTEM_IO_CAPABLE; | |
376 | cmd.addr.io.port = perf->control_register.address; | |
377 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
378 | cmd.val = (u32) perf->states[next_perf_state].control; | |
379 | break; | |
380 | default: | |
4d8bb537 MT |
381 | result = -ENODEV; |
382 | goto out; | |
64be7eed | 383 | } |
09b4d1ee | 384 | |
4d8bb537 | 385 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
fe27cb35 | 386 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
bfa318ad | 387 | cmd.mask = policy->cpus; |
fe27cb35 | 388 | else |
bfa318ad | 389 | cmd.mask = cpumask_of(policy->cpu); |
09b4d1ee | 390 | |
8edc59d9 VP |
391 | freqs.old = perf->states[perf->state].core_frequency * 1000; |
392 | freqs.new = data->freq_table[next_state].frequency; | |
4d8bb537 | 393 | for_each_cpu(i, cmd.mask) { |
fe27cb35 VP |
394 | freqs.cpu = i; |
395 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 396 | } |
1da177e4 | 397 | |
fe27cb35 | 398 | drv_write(&cmd); |
09b4d1ee | 399 | |
fe27cb35 | 400 | if (acpi_pstate_strict) { |
4d8bb537 | 401 | if (!check_freqs(cmd.mask, freqs.new, data)) { |
fe27cb35 | 402 | dprintk("acpi_cpufreq_target failed (%d)\n", |
64be7eed | 403 | policy->cpu); |
4d8bb537 MT |
404 | result = -EAGAIN; |
405 | goto out; | |
09b4d1ee VP |
406 | } |
407 | } | |
408 | ||
4d8bb537 | 409 | for_each_cpu(i, cmd.mask) { |
fe27cb35 VP |
410 | freqs.cpu = i; |
411 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
412 | } | |
413 | perf->state = next_perf_state; | |
414 | ||
4d8bb537 | 415 | out: |
fe27cb35 | 416 | return result; |
1da177e4 LT |
417 | } |
418 | ||
64be7eed | 419 | static int acpi_cpufreq_verify(struct cpufreq_policy *policy) |
1da177e4 | 420 | { |
f1625066 | 421 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
1da177e4 LT |
422 | |
423 | dprintk("acpi_cpufreq_verify\n"); | |
424 | ||
fe27cb35 | 425 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
426 | } |
427 | ||
1da177e4 | 428 | static unsigned long |
64be7eed | 429 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 430 | { |
64be7eed | 431 | struct acpi_processor_performance *perf = data->acpi_data; |
09b4d1ee | 432 | |
1da177e4 LT |
433 | if (cpu_khz) { |
434 | /* search the closest match to cpu_khz */ | |
435 | unsigned int i; | |
436 | unsigned long freq; | |
09b4d1ee | 437 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 438 | |
3a58df35 | 439 | for (i = 0; i < (perf->state_count-1); i++) { |
1da177e4 | 440 | freq = freqn; |
95dd7227 | 441 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 442 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 443 | perf->state = i; |
64be7eed | 444 | return freq; |
1da177e4 LT |
445 | } |
446 | } | |
95dd7227 | 447 | perf->state = perf->state_count-1; |
64be7eed | 448 | return freqn; |
09b4d1ee | 449 | } else { |
1da177e4 | 450 | /* assume CPU is at P0... */ |
09b4d1ee VP |
451 | perf->state = 0; |
452 | return perf->states[0].core_frequency * 1000; | |
453 | } | |
1da177e4 LT |
454 | } |
455 | ||
2fdf66b4 RR |
456 | static void free_acpi_perf_data(void) |
457 | { | |
458 | unsigned int i; | |
459 | ||
460 | /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ | |
461 | for_each_possible_cpu(i) | |
462 | free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) | |
463 | ->shared_cpu_map); | |
464 | free_percpu(acpi_perf_data); | |
465 | } | |
466 | ||
09b4d1ee VP |
467 | /* |
468 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
469 | * | |
470 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
471 | * in order to determine correct frequency and voltage pairings. We can | |
472 | * do _PDC and _PSD and find out the processor dependency for the | |
473 | * actual init that will happen later... | |
474 | */ | |
50109292 | 475 | static int __init acpi_cpufreq_early_init(void) |
09b4d1ee | 476 | { |
2fdf66b4 | 477 | unsigned int i; |
09b4d1ee VP |
478 | dprintk("acpi_cpufreq_early_init\n"); |
479 | ||
50109292 FY |
480 | acpi_perf_data = alloc_percpu(struct acpi_processor_performance); |
481 | if (!acpi_perf_data) { | |
482 | dprintk("Memory allocation error for acpi_perf_data.\n"); | |
483 | return -ENOMEM; | |
09b4d1ee | 484 | } |
2fdf66b4 | 485 | for_each_possible_cpu(i) { |
eaa95840 | 486 | if (!zalloc_cpumask_var_node( |
80855f73 MT |
487 | &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, |
488 | GFP_KERNEL, cpu_to_node(i))) { | |
2fdf66b4 RR |
489 | |
490 | /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ | |
491 | free_acpi_perf_data(); | |
492 | return -ENOMEM; | |
493 | } | |
494 | } | |
09b4d1ee VP |
495 | |
496 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
497 | acpi_processor_preregister_performance(acpi_perf_data); |
498 | return 0; | |
09b4d1ee VP |
499 | } |
500 | ||
95625b8f | 501 | #ifdef CONFIG_SMP |
8adcc0c6 VP |
502 | /* |
503 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
504 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
505 | * detected, this has a side effect of making CPU run at a different speed | |
506 | * than OS intended it to run at. Detect it and handle it cleanly. | |
507 | */ | |
508 | static int bios_with_sw_any_bug; | |
509 | ||
1855256c | 510 | static int sw_any_bug_found(const struct dmi_system_id *d) |
8adcc0c6 VP |
511 | { |
512 | bios_with_sw_any_bug = 1; | |
513 | return 0; | |
514 | } | |
515 | ||
1855256c | 516 | static const struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
517 | { |
518 | .callback = sw_any_bug_found, | |
519 | .ident = "Supermicro Server X6DLP", | |
520 | .matches = { | |
521 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
522 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
523 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
524 | }, | |
525 | }, | |
526 | { } | |
527 | }; | |
1a8e42fa PB |
528 | |
529 | static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) | |
530 | { | |
293afe44 JV |
531 | /* Intel Xeon Processor 7100 Series Specification Update |
532 | * http://www.intel.com/Assets/PDF/specupdate/314554.pdf | |
1a8e42fa PB |
533 | * AL30: A Machine Check Exception (MCE) Occurring during an |
534 | * Enhanced Intel SpeedStep Technology Ratio Change May Cause | |
293afe44 | 535 | * Both Processor Cores to Lock Up. */ |
1a8e42fa PB |
536 | if (c->x86_vendor == X86_VENDOR_INTEL) { |
537 | if ((c->x86 == 15) && | |
538 | (c->x86_model == 6) && | |
293afe44 JV |
539 | (c->x86_mask == 8)) { |
540 | printk(KERN_INFO "acpi-cpufreq: Intel(R) " | |
541 | "Xeon(R) 7100 Errata AL30, processors may " | |
542 | "lock up on frequency changes: disabling " | |
543 | "acpi-cpufreq.\n"); | |
1a8e42fa | 544 | return -ENODEV; |
293afe44 | 545 | } |
1a8e42fa PB |
546 | } |
547 | return 0; | |
548 | } | |
95625b8f | 549 | #endif |
8adcc0c6 | 550 | |
64be7eed | 551 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 552 | { |
64be7eed VP |
553 | unsigned int i; |
554 | unsigned int valid_states = 0; | |
555 | unsigned int cpu = policy->cpu; | |
556 | struct acpi_cpufreq_data *data; | |
64be7eed | 557 | unsigned int result = 0; |
92cb7612 | 558 | struct cpuinfo_x86 *c = &cpu_data(policy->cpu); |
64be7eed | 559 | struct acpi_processor_performance *perf; |
293afe44 JV |
560 | #ifdef CONFIG_SMP |
561 | static int blacklisted; | |
562 | #endif | |
1da177e4 | 563 | |
1da177e4 | 564 | dprintk("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 565 | |
1a8e42fa | 566 | #ifdef CONFIG_SMP |
293afe44 JV |
567 | if (blacklisted) |
568 | return blacklisted; | |
569 | blacklisted = acpi_cpufreq_blacklist(c); | |
570 | if (blacklisted) | |
571 | return blacklisted; | |
1a8e42fa PB |
572 | #endif |
573 | ||
fe27cb35 | 574 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 | 575 | if (!data) |
64be7eed | 576 | return -ENOMEM; |
1da177e4 | 577 | |
b36128c8 | 578 | data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu); |
f1625066 | 579 | per_cpu(acfreq_data, cpu) = data; |
1da177e4 | 580 | |
95dd7227 | 581 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
fe27cb35 | 582 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
1da177e4 | 583 | |
fe27cb35 | 584 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
585 | if (result) |
586 | goto err_free; | |
587 | ||
09b4d1ee | 588 | perf = data->acpi_data; |
09b4d1ee | 589 | policy->shared_type = perf->shared_type; |
95dd7227 | 590 | |
46f18e3a | 591 | /* |
95dd7227 | 592 | * Will let policy->cpus know about dependency only when software |
46f18e3a VP |
593 | * coordination is required. |
594 | */ | |
595 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 596 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
835481d9 | 597 | cpumask_copy(policy->cpus, perf->shared_cpu_map); |
8adcc0c6 | 598 | } |
835481d9 | 599 | cpumask_copy(policy->related_cpus, perf->shared_cpu_map); |
8adcc0c6 VP |
600 | |
601 | #ifdef CONFIG_SMP | |
602 | dmi_check_system(sw_any_bug_dmi_table); | |
835481d9 | 603 | if (bios_with_sw_any_bug && cpumask_weight(policy->cpus) == 1) { |
8adcc0c6 | 604 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; |
835481d9 | 605 | cpumask_copy(policy->cpus, cpu_core_mask(cpu)); |
8adcc0c6 VP |
606 | } |
607 | #endif | |
09b4d1ee | 608 | |
1da177e4 | 609 | /* capability check */ |
09b4d1ee | 610 | if (perf->state_count <= 1) { |
1da177e4 LT |
611 | dprintk("No P-States\n"); |
612 | result = -ENODEV; | |
613 | goto err_unreg; | |
614 | } | |
09b4d1ee | 615 | |
fe27cb35 VP |
616 | if (perf->control_register.space_id != perf->status_register.space_id) { |
617 | result = -ENODEV; | |
618 | goto err_unreg; | |
619 | } | |
620 | ||
621 | switch (perf->control_register.space_id) { | |
64be7eed | 622 | case ACPI_ADR_SPACE_SYSTEM_IO: |
fe27cb35 | 623 | dprintk("SYSTEM IO addr space\n"); |
dde9f7ba VP |
624 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
625 | break; | |
64be7eed | 626 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
dde9f7ba VP |
627 | dprintk("HARDWARE addr space\n"); |
628 | if (!check_est_cpu(cpu)) { | |
629 | result = -ENODEV; | |
630 | goto err_unreg; | |
631 | } | |
632 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 | 633 | break; |
64be7eed | 634 | default: |
fe27cb35 | 635 | dprintk("Unknown addr space %d\n", |
64be7eed | 636 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
637 | result = -ENODEV; |
638 | goto err_unreg; | |
639 | } | |
640 | ||
95dd7227 DJ |
641 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * |
642 | (perf->state_count+1), GFP_KERNEL); | |
1da177e4 LT |
643 | if (!data->freq_table) { |
644 | result = -ENOMEM; | |
645 | goto err_unreg; | |
646 | } | |
647 | ||
648 | /* detect transition latency */ | |
649 | policy->cpuinfo.transition_latency = 0; | |
3a58df35 | 650 | for (i = 0; i < perf->state_count; i++) { |
64be7eed VP |
651 | if ((perf->states[i].transition_latency * 1000) > |
652 | policy->cpuinfo.transition_latency) | |
653 | policy->cpuinfo.transition_latency = | |
654 | perf->states[i].transition_latency * 1000; | |
1da177e4 | 655 | } |
1da177e4 | 656 | |
a59d1637 PV |
657 | /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ |
658 | if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && | |
659 | policy->cpuinfo.transition_latency > 20 * 1000) { | |
a59d1637 | 660 | policy->cpuinfo.transition_latency = 20 * 1000; |
61c8c67e JP |
661 | printk_once(KERN_INFO |
662 | "P-state transition latency capped at 20 uS\n"); | |
a59d1637 PV |
663 | } |
664 | ||
1da177e4 | 665 | /* table init */ |
3a58df35 DJ |
666 | for (i = 0; i < perf->state_count; i++) { |
667 | if (i > 0 && perf->states[i].core_frequency >= | |
3cdf552b | 668 | data->freq_table[valid_states-1].frequency / 1000) |
fe27cb35 VP |
669 | continue; |
670 | ||
671 | data->freq_table[valid_states].index = i; | |
672 | data->freq_table[valid_states].frequency = | |
64be7eed | 673 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 674 | valid_states++; |
1da177e4 | 675 | } |
3d4a7ef3 | 676 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
8edc59d9 | 677 | perf->state = 0; |
1da177e4 LT |
678 | |
679 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
95dd7227 | 680 | if (result) |
1da177e4 | 681 | goto err_freqfree; |
1da177e4 | 682 | |
d876dfbb TR |
683 | if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) |
684 | printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n"); | |
685 | ||
a507ac4b | 686 | switch (perf->control_register.space_id) { |
64be7eed | 687 | case ACPI_ADR_SPACE_SYSTEM_IO: |
dde9f7ba VP |
688 | /* Current speed is unknown and not detectable by IO port */ |
689 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
690 | break; | |
64be7eed | 691 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 692 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
a507ac4b | 693 | policy->cur = get_cur_freq_on_cpu(cpu); |
dde9f7ba | 694 | break; |
64be7eed | 695 | default: |
dde9f7ba VP |
696 | break; |
697 | } | |
698 | ||
1da177e4 LT |
699 | /* notify BIOS that we exist */ |
700 | acpi_processor_notify_smm(THIS_MODULE); | |
701 | ||
dfde5d62 | 702 | /* Check for APERF/MPERF support in hardware */ |
a8303aaf PZ |
703 | if (cpu_has(c, X86_FEATURE_APERFMPERF)) |
704 | acpi_cpufreq_driver.getavg = get_measured_perf; | |
dfde5d62 | 705 | |
fe27cb35 | 706 | dprintk("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 707 | for (i = 0; i < perf->state_count; i++) |
1da177e4 | 708 | dprintk(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 709 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
710 | (u32) perf->states[i].core_frequency, |
711 | (u32) perf->states[i].power, | |
712 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
713 | |
714 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
64be7eed | 715 | |
4b31e774 DB |
716 | /* |
717 | * the first call to ->target() should result in us actually | |
718 | * writing something to the appropriate registers. | |
719 | */ | |
720 | data->resume = 1; | |
64be7eed | 721 | |
fe27cb35 | 722 | return result; |
1da177e4 | 723 | |
95dd7227 | 724 | err_freqfree: |
1da177e4 | 725 | kfree(data->freq_table); |
95dd7227 | 726 | err_unreg: |
09b4d1ee | 727 | acpi_processor_unregister_performance(perf, cpu); |
95dd7227 | 728 | err_free: |
1da177e4 | 729 | kfree(data); |
f1625066 | 730 | per_cpu(acfreq_data, cpu) = NULL; |
1da177e4 | 731 | |
64be7eed | 732 | return result; |
1da177e4 LT |
733 | } |
734 | ||
64be7eed | 735 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 736 | { |
f1625066 | 737 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
1da177e4 | 738 | |
1da177e4 LT |
739 | dprintk("acpi_cpufreq_cpu_exit\n"); |
740 | ||
741 | if (data) { | |
742 | cpufreq_frequency_table_put_attr(policy->cpu); | |
f1625066 | 743 | per_cpu(acfreq_data, policy->cpu) = NULL; |
64be7eed VP |
744 | acpi_processor_unregister_performance(data->acpi_data, |
745 | policy->cpu); | |
1da177e4 LT |
746 | kfree(data); |
747 | } | |
748 | ||
64be7eed | 749 | return 0; |
1da177e4 LT |
750 | } |
751 | ||
64be7eed | 752 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 753 | { |
f1625066 | 754 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
1da177e4 | 755 | |
1da177e4 LT |
756 | dprintk("acpi_cpufreq_resume\n"); |
757 | ||
758 | data->resume = 1; | |
759 | ||
64be7eed | 760 | return 0; |
1da177e4 LT |
761 | } |
762 | ||
64be7eed | 763 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 LT |
764 | &cpufreq_freq_attr_scaling_available_freqs, |
765 | NULL, | |
766 | }; | |
767 | ||
768 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
e2f74f35 TR |
769 | .verify = acpi_cpufreq_verify, |
770 | .target = acpi_cpufreq_target, | |
771 | .bios_limit = acpi_processor_get_bios_limit, | |
772 | .init = acpi_cpufreq_cpu_init, | |
773 | .exit = acpi_cpufreq_cpu_exit, | |
774 | .resume = acpi_cpufreq_resume, | |
775 | .name = "acpi-cpufreq", | |
776 | .owner = THIS_MODULE, | |
777 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
778 | }; |
779 | ||
64be7eed | 780 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 781 | { |
50109292 FY |
782 | int ret; |
783 | ||
ee297533 YL |
784 | if (acpi_disabled) |
785 | return 0; | |
786 | ||
1da177e4 LT |
787 | dprintk("acpi_cpufreq_init\n"); |
788 | ||
50109292 FY |
789 | ret = acpi_cpufreq_early_init(); |
790 | if (ret) | |
791 | return ret; | |
09b4d1ee | 792 | |
847aef6f AM |
793 | ret = cpufreq_register_driver(&acpi_cpufreq_driver); |
794 | if (ret) | |
2fdf66b4 | 795 | free_acpi_perf_data(); |
847aef6f AM |
796 | |
797 | return ret; | |
1da177e4 LT |
798 | } |
799 | ||
64be7eed | 800 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 LT |
801 | { |
802 | dprintk("acpi_cpufreq_exit\n"); | |
803 | ||
804 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
805 | ||
50109292 | 806 | free_percpu(acpi_perf_data); |
1da177e4 LT |
807 | } |
808 | ||
d395bf12 | 809 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed | 810 | MODULE_PARM_DESC(acpi_pstate_strict, |
95dd7227 DJ |
811 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
812 | "performed during frequency changes."); | |
1da177e4 LT |
813 | |
814 | late_initcall(acpi_cpufreq_init); | |
815 | module_exit(acpi_cpufreq_exit); | |
816 | ||
817 | MODULE_ALIAS("acpi"); |