x86, x2apic: Remove duplicate code for IPI mask routines
[linux-2.6-block.git] / arch / x86 / kernel / apic / x2apic_phys.c
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1#include <linux/threads.h>
2#include <linux/cpumask.h>
3#include <linux/string.h>
4#include <linux/kernel.h>
5#include <linux/ctype.h>
6#include <linux/init.h>
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7#include <linux/dmar.h>
8
2d9579a1 9#include <asm/smp.h>
7b6aa335 10#include <asm/apic.h>
c1eeb2de 11#include <asm/ipi.h>
2d9579a1 12
ef1f87aa 13int x2apic_phys;
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14
15static int set_x2apic_phys_mode(char *arg)
16{
17 x2apic_phys = 1;
18 return 0;
19}
20early_param("x2apic_phys", set_x2apic_phys_mode);
21
3cfba089 22static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
1b9b89e7 23{
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24 if (x2apic_phys)
25 return x2apic_enabled();
26 else
27 return 0;
1b9b89e7 28}
2d9579a1 29
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30/*
31 * need to use more than cpu 0, because we need more vectors when
32 * MSI-X are used.
33 */
bcda016e 34static const struct cpumask *x2apic_target_cpus(void)
2d9579a1 35{
087d7e56 36 return cpu_online_mask;
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37}
38
bcda016e 39static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
2d9579a1 40{
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41 cpumask_clear(retmask);
42 cpumask_set_cpu(cpu, retmask);
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43}
44
45static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
46 unsigned int dest)
47{
48 unsigned long cfg;
49
50 cfg = __prepare_ICR(0, vector, dest);
51
52 /*
53 * send the IPI.
54 */
c1eeb2de 55 native_x2apic_icr_write(cfg, apicid);
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56}
57
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58static void
59__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
2d9579a1 60{
2d9579a1 61 unsigned long query_cpu;
a27d0b5e 62 unsigned long this_cpu;
dac5f412 63 unsigned long flags;
2d9579a1 64
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65 x2apic_wrmsr_fence();
66
2d9579a1 67 local_irq_save(flags);
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68
69 this_cpu = smp_processor_id();
bcda016e 70 for_each_cpu(query_cpu, mask) {
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71 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
72 continue;
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73 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
74 vector, APIC_DEST_PHYSICAL);
75 }
76 local_irq_restore(flags);
77}
78
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79static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
80{
81 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
82}
83
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84static void
85 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
2d9579a1 86{
a27d0b5e 87 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
e7986739 88}
2d9579a1 89
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90static void x2apic_send_IPI_allbutself(int vector)
91{
a27d0b5e 92 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
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93}
94
95static void x2apic_send_IPI_all(int vector)
96{
a27d0b5e 97 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
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98}
99
100static int x2apic_apic_id_registered(void)
101{
102 return 1;
103}
104
bcda016e 105static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
2d9579a1 106{
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107 /*
108 * We're using fixed IRQ delivery, can only return one phys APIC ID.
109 * May as well be the first.
110 */
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111 int cpu = cpumask_first(cpumask);
112
e7986739 113 if ((unsigned)cpu < nr_cpu_ids)
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114 return per_cpu(x86_cpu_to_apicid, cpu);
115 else
116 return BAD_APICID;
117}
118
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119static unsigned int
120x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
121 const struct cpumask *andmask)
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122{
123 int cpu;
124
125 /*
126 * We're using fixed IRQ delivery, can only return one phys APIC ID.
127 * May as well be the first.
128 */
debccb3e 129 for_each_cpu_and(cpu, cpumask, andmask) {
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130 if (cpumask_test_cpu(cpu, cpu_online_mask))
131 break;
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132 }
133
18374d89 134 return per_cpu(x86_cpu_to_apicid, cpu);
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135}
136
ca6c8ed4 137static unsigned int x2apic_phys_get_apic_id(unsigned long x)
f910a9dc 138{
dac5f412 139 return x;
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140}
141
142static unsigned long set_apic_id(unsigned int id)
143{
dac5f412 144 return id;
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145}
146
d4c9a9f3 147static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
2d9579a1 148{
d8c7eb34 149 return initial_apicid >> index_msb;
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150}
151
4d08d97f 152static void x2apic_send_IPI_self(int vector)
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153{
154 apic_write(APIC_SELF_IPI, vector);
155}
156
4d08d97f 157static void init_x2apic_ldr(void)
2d9579a1 158{
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159}
160
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161static int x2apic_phys_probe(void)
162{
163 if (x2apic_mode && x2apic_phys)
164 return 1;
165
166 return apic == &apic_x2apic_phys;
167}
168
be163a15 169struct apic apic_x2apic_phys = {
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170
171 .name = "physical x2apic",
9ebd680b 172 .probe = x2apic_phys_probe,
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173 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
174 .apic_id_registered = x2apic_apic_id_registered,
175
f8987a10 176 .irq_delivery_mode = dest_Fixed,
0b06e734 177 .irq_dest_mode = 0, /* physical */
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178
179 .target_cpus = x2apic_target_cpus,
08125d3e 180 .disable_esr = 0,
bdb1a9b6 181 .dest_logical = 0,
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182 .check_apicid_used = NULL,
183 .check_apicid_present = NULL,
184
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185 .vector_allocation_domain = x2apic_vector_allocation_domain,
186 .init_apic_ldr = init_x2apic_ldr,
187
188 .ioapic_phys_id_map = NULL,
189 .setup_apic_routing = NULL,
190 .multi_timer_check = NULL,
a21769a4 191 .cpu_present_to_apicid = default_cpu_present_to_apicid,
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192 .apicid_to_cpu_present = NULL,
193 .setup_portio_remap = NULL,
a27a6210 194 .check_phys_apicid_present = default_check_phys_apicid_present,
05c155c2 195 .enable_apic_mode = NULL,
d4c9a9f3 196 .phys_pkg_id = x2apic_phys_pkg_id,
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197 .mps_oem_check = NULL,
198
ca6c8ed4 199 .get_apic_id = x2apic_phys_get_apic_id,
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200 .set_apic_id = set_apic_id,
201 .apic_id_mask = 0xFFFFFFFFu,
202
203 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
204 .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
205
206 .send_IPI_mask = x2apic_send_IPI_mask,
207 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
208 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
209 .send_IPI_all = x2apic_send_IPI_all,
210 .send_IPI_self = x2apic_send_IPI_self,
211
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212 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
213 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
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214 .wait_for_init_deassert = NULL,
215 .smp_callin_clear_local_apic = NULL,
05c155c2 216 .inquire_remote_apic = NULL,
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217
218 .read = native_apic_msr_read,
219 .write = native_apic_msr_write,
220 .icr_read = native_x2apic_icr_read,
221 .icr_write = native_x2apic_icr_write,
222 .wait_icr_idle = native_x2apic_wait_icr_idle,
223 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
2d9579a1 224};