x86/apic: Consolidate the apic local headers
[linux-2.6-block.git] / arch / x86 / kernel / apic / x2apic_cluster.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
521b82fe
TG
2
3#include <linux/cpuhotplug.h>
12a67cf6 4#include <linux/cpumask.h>
521b82fe
TG
5#include <linux/slab.h>
6#include <linux/mm.h>
7
8#include <asm/apic.h>
1b9b89e7 9
c94f0718 10#include "local.h"
12a67cf6 11
023a6117
TG
12struct cluster_mask {
13 unsigned int clusterid;
14 int node;
15 struct cpumask mask;
16};
17
2de1f33e 18static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
9d0fa6c5 19static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
023a6117
TG
20static DEFINE_PER_CPU(struct cluster_mask *, cluster_masks);
21static struct cluster_mask *cluster_hotplug_mask;
12a67cf6 22
2caa3715 23static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
1b9b89e7 24{
ef1f87aa 25 return x2apic_enabled();
1b9b89e7
YL
26}
27
7b6ce46c
LT
28static void x2apic_send_IPI(int cpu, int vector)
29{
30 u32 dest = per_cpu(x86_cpu_to_logical_apicid, cpu);
31
32 x2apic_wrmsr_fence();
33 __x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
34}
35
a27d0b5e
SS
36static void
37__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
12a67cf6 38{
023a6117
TG
39 unsigned int cpu, clustercpu;
40 struct cpumask *tmpmsk;
dac5f412 41 unsigned long flags;
9d0fa6c5 42 u32 dest;
12a67cf6 43
ce4e240c 44 x2apic_wrmsr_fence();
12a67cf6 45 local_irq_save(flags);
a27d0b5e 46
023a6117
TG
47 tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
48 cpumask_copy(tmpmsk, mask);
49 /* If IPI should not be sent to self, clear current CPU */
50 if (apic_dest != APIC_DEST_ALLINC)
dde3626f 51 __cpumask_clear_cpu(smp_processor_id(), tmpmsk);
9d0fa6c5 52
023a6117
TG
53 /* Collapse cpus in a cluster so a single IPI per cluster is sent */
54 for_each_cpu(cpu, tmpmsk) {
55 struct cluster_mask *cmsk = per_cpu(cluster_masks, cpu);
9d0fa6c5 56
9d0fa6c5 57 dest = 0;
023a6117
TG
58 for_each_cpu_and(clustercpu, tmpmsk, &cmsk->mask)
59 dest |= per_cpu(x86_cpu_to_logical_apicid, clustercpu);
9d0fa6c5
CG
60
61 if (!dest)
a27d0b5e 62 continue;
9d0fa6c5
CG
63
64 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
023a6117
TG
65 /* Remove cluster CPUs from tmpmask */
66 cpumask_andnot(tmpmsk, tmpmsk, &cmsk->mask);
dac5f412 67 }
a27d0b5e 68
12a67cf6
SS
69 local_irq_restore(flags);
70}
71
a27d0b5e
SS
72static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
73{
74 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
75}
76
dac5f412 77static void
49d0c7a0 78x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
12a67cf6 79{
a27d0b5e 80 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
e7986739 81}
12a67cf6 82
e7986739
MT
83static void x2apic_send_IPI_allbutself(int vector)
84{
a27d0b5e 85 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
12a67cf6
SS
86}
87
88static void x2apic_send_IPI_all(int vector)
89{
a27d0b5e 90 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
12a67cf6
SS
91}
92
9f9e3bb1
TG
93static u32 x2apic_calc_apicid(unsigned int cpu)
94{
95 return per_cpu(x86_cpu_to_logical_apicid, cpu);
96}
97
12a67cf6 98static void init_x2apic_ldr(void)
a39d1f3f 99{
023a6117
TG
100 struct cluster_mask *cmsk = this_cpu_read(cluster_masks);
101 u32 cluster, apicid = apic_read(APIC_LDR);
a39d1f3f
CG
102 unsigned int cpu;
103
023a6117 104 this_cpu_write(x86_cpu_to_logical_apicid, apicid);
a39d1f3f 105
023a6117
TG
106 if (cmsk)
107 goto update;
108
109 cluster = apicid >> 16;
a39d1f3f 110 for_each_online_cpu(cpu) {
023a6117
TG
111 cmsk = per_cpu(cluster_masks, cpu);
112 /* Matching cluster found. Link and update it. */
113 if (cmsk && cmsk->clusterid == cluster)
114 goto update;
a39d1f3f 115 }
023a6117 116 cmsk = cluster_hotplug_mask;
fed71f7d 117 cmsk->clusterid = cluster;
023a6117
TG
118 cluster_hotplug_mask = NULL;
119update:
120 this_cpu_write(cluster_masks, cmsk);
121 cpumask_set_cpu(smp_processor_id(), &cmsk->mask);
a39d1f3f
CG
122}
123
023a6117 124static int alloc_clustermask(unsigned int cpu, int node)
a39d1f3f 125{
023a6117
TG
126 if (per_cpu(cluster_masks, cpu))
127 return 0;
128 /*
129 * If a hotplug spare mask exists, check whether it's on the right
130 * node. If not, free it and allocate a new one.
131 */
132 if (cluster_hotplug_mask) {
133 if (cluster_hotplug_mask->node == node)
134 return 0;
135 kfree(cluster_hotplug_mask);
136 }
6b2c2847 137
023a6117
TG
138 cluster_hotplug_mask = kzalloc_node(sizeof(*cluster_hotplug_mask),
139 GFP_KERNEL, node);
140 if (!cluster_hotplug_mask)
6b2c2847 141 return -ENOMEM;
023a6117
TG
142 cluster_hotplug_mask->node = node;
143 return 0;
144}
a39d1f3f 145
023a6117
TG
146static int x2apic_prepare_cpu(unsigned int cpu)
147{
148 if (alloc_clustermask(cpu, cpu_to_node(cpu)) < 0)
149 return -ENOMEM;
150 if (!zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL))
151 return -ENOMEM;
6b2c2847 152 return 0;
a39d1f3f
CG
153}
154
023a6117 155static int x2apic_dead_cpu(unsigned int dead_cpu)
12a67cf6 156{
023a6117 157 struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu);
a39d1f3f 158
1e66e2b8 159 cpumask_clear_cpu(dead_cpu, &cmsk->mask);
023a6117 160 free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
6b2c2847 161 return 0;
12a67cf6
SS
162}
163
9ebd680b
SS
164static int x2apic_cluster_probe(void)
165{
6b2c2847 166 if (!x2apic_mode)
a39d1f3f 167 return 0;
6b2c2847 168
023a6117
TG
169 if (cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "x86/x2apic:prepare",
170 x2apic_prepare_cpu, x2apic_dead_cpu) < 0) {
d52c0569
SAS
171 pr_err("Failed to register X2APIC_PREPARE\n");
172 return 0;
173 }
023a6117 174 init_x2apic_ldr();
6b2c2847 175 return 1;
9ebd680b
SS
176}
177
404f6aac 178static struct apic apic_x2apic_cluster __ro_after_init = {
504a3c3a
IM
179
180 .name = "cluster x2apic",
9ebd680b 181 .probe = x2apic_cluster_probe,
504a3c3a 182 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
b7157acf 183 .apic_id_valid = x2apic_apic_id_valid,
504a3c3a
IM
184 .apic_id_registered = x2apic_apic_id_registered,
185
a31e58e1 186 .irq_delivery_mode = dest_Fixed,
0b06e734 187 .irq_dest_mode = 1, /* logical */
504a3c3a 188
08125d3e 189 .disable_esr = 0,
bdb1a9b6 190 .dest_logical = APIC_DEST_LOGICAL,
504a3c3a 191 .check_apicid_used = NULL,
504a3c3a 192
504a3c3a
IM
193 .init_apic_ldr = init_x2apic_ldr,
194
195 .ioapic_phys_id_map = NULL,
196 .setup_apic_routing = NULL,
a21769a4 197 .cpu_present_to_apicid = default_cpu_present_to_apicid,
504a3c3a 198 .apicid_to_cpu_present = NULL,
a27a6210 199 .check_phys_apicid_present = default_check_phys_apicid_present,
79deb8e5 200 .phys_pkg_id = x2apic_phys_pkg_id,
504a3c3a 201
79deb8e5
CG
202 .get_apic_id = x2apic_get_apic_id,
203 .set_apic_id = x2apic_set_apic_id,
504a3c3a 204
9f9e3bb1 205 .calc_dest_apicid = x2apic_calc_apicid,
504a3c3a 206
7b6ce46c 207 .send_IPI = x2apic_send_IPI,
504a3c3a
IM
208 .send_IPI_mask = x2apic_send_IPI_mask,
209 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
210 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
211 .send_IPI_all = x2apic_send_IPI_all,
212 .send_IPI_self = x2apic_send_IPI_self,
213
504a3c3a 214 .inquire_remote_apic = NULL,
c1eeb2de
YL
215
216 .read = native_apic_msr_read,
217 .write = native_apic_msr_write,
0ab711ae 218 .eoi_write = native_apic_msr_eoi_write,
c1eeb2de
YL
219 .icr_read = native_x2apic_icr_read,
220 .icr_write = native_x2apic_icr_write,
221 .wait_icr_idle = native_x2apic_wait_icr_idle,
222 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
12a67cf6 223};
107e0e0c
SS
224
225apic_driver(apic_x2apic_cluster);