Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Written by: Garry Forsgren, Unisys Corporation | |
3 | * Natalie Protasevich, Unisys Corporation | |
7da18ed9 | 4 | * |
1da177e4 LT |
5 | * This file contains the code to configure and interface |
6 | * with Unisys ES7000 series hardware system manager. | |
7 | * | |
7da18ed9 IM |
8 | * Copyright (c) 2003 Unisys Corporation. |
9 | * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar | |
10 | * | |
11 | * All Rights Reserved. | |
1da177e4 LT |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of version 2 of the GNU General Public License as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed in the hope that it would be useful, but | |
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write the Free Software Foundation, Inc., 59 | |
23 | * Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
24 | * | |
25 | * Contact information: Unisys Corporation, Township Line & Union Meeting | |
26 | * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: | |
27 | * | |
28 | * http://www.unisys.com | |
29 | */ | |
2c4ce18c IM |
30 | #include <linux/notifier.h> |
31 | #include <linux/spinlock.h> | |
32 | #include <linux/cpumask.h> | |
33 | #include <linux/threads.h> | |
1da177e4 | 34 | #include <linux/kernel.h> |
2c4ce18c IM |
35 | #include <linux/module.h> |
36 | #include <linux/reboot.h> | |
1da177e4 | 37 | #include <linux/string.h> |
2c4ce18c | 38 | #include <linux/types.h> |
1da177e4 | 39 | #include <linux/errno.h> |
1da177e4 | 40 | #include <linux/acpi.h> |
2c4ce18c | 41 | #include <linux/init.h> |
7da18ed9 | 42 | #include <linux/nmi.h> |
2c4ce18c | 43 | #include <linux/smp.h> |
7da18ed9 | 44 | #include <linux/io.h> |
2c4ce18c | 45 | |
1da177e4 | 46 | #include <asm/apicdef.h> |
2c4ce18c IM |
47 | #include <asm/atomic.h> |
48 | #include <asm/fixmap.h> | |
49 | #include <asm/mpspec.h> | |
569712b2 | 50 | #include <asm/setup.h> |
2c4ce18c IM |
51 | #include <asm/apic.h> |
52 | #include <asm/ipi.h> | |
1da177e4 | 53 | |
1625324d YL |
54 | /* |
55 | * ES7000 chipsets | |
56 | */ | |
57 | ||
2c4ce18c IM |
58 | #define NON_UNISYS 0 |
59 | #define ES7000_CLASSIC 1 | |
60 | #define ES7000_ZORRO 2 | |
1625324d | 61 | |
2c4ce18c IM |
62 | #define MIP_REG 1 |
63 | #define MIP_PSAI_REG 4 | |
1625324d | 64 | |
2c4ce18c IM |
65 | #define MIP_BUSY 1 |
66 | #define MIP_SPIN 0xf0000 | |
67 | #define MIP_VALID 0x0100000000000000ULL | |
352887d1 | 68 | #define MIP_SW_APIC 0x1020b |
1625324d | 69 | |
2c4ce18c | 70 | #define MIP_PORT(val) ((val >> 32) & 0xffff) |
1625324d | 71 | |
2c4ce18c | 72 | #define MIP_RD_LO(val) (val & 0xffffffff) |
1625324d | 73 | |
352887d1 IM |
74 | struct mip_reg { |
75 | unsigned long long off_0x00; | |
76 | unsigned long long off_0x08; | |
77 | unsigned long long off_0x10; | |
78 | unsigned long long off_0x18; | |
79 | unsigned long long off_0x20; | |
80 | unsigned long long off_0x28; | |
81 | unsigned long long off_0x30; | |
82 | unsigned long long off_0x38; | |
83 | }; | |
84 | ||
1625324d | 85 | struct mip_reg_info { |
2c4ce18c IM |
86 | unsigned long long mip_info; |
87 | unsigned long long delivery_info; | |
88 | unsigned long long host_reg; | |
89 | unsigned long long mip_reg; | |
1625324d YL |
90 | }; |
91 | ||
1625324d | 92 | struct psai { |
2c4ce18c IM |
93 | unsigned long long entry_type; |
94 | unsigned long long addr; | |
95 | unsigned long long bep_addr; | |
1625324d YL |
96 | }; |
97 | ||
1625324d | 98 | #ifdef CONFIG_ACPI |
7da18ed9 | 99 | |
352887d1 | 100 | struct es7000_oem_table { |
2c4ce18c IM |
101 | struct acpi_table_header Header; |
102 | u32 OEMTableAddr; | |
103 | u32 OEMTableSize; | |
1625324d | 104 | }; |
7da18ed9 IM |
105 | |
106 | static unsigned long oem_addrX; | |
107 | static unsigned long oem_size; | |
108 | ||
1625324d YL |
109 | #endif |
110 | ||
1da177e4 LT |
111 | /* |
112 | * ES7000 Globals | |
113 | */ | |
114 | ||
7da18ed9 | 115 | static volatile unsigned long *psai; |
2c4ce18c IM |
116 | static struct mip_reg *mip_reg; |
117 | static struct mip_reg *host_reg; | |
118 | static int mip_port; | |
7da18ed9 IM |
119 | static unsigned long mip_addr; |
120 | static unsigned long host_addr; | |
1da177e4 | 121 | |
2c4ce18c | 122 | int es7000_plat; |
32c50612 | 123 | |
1da177e4 LT |
124 | /* |
125 | * GSI override for ES7000 platforms. | |
126 | */ | |
127 | ||
2c4ce18c | 128 | static unsigned int base; |
1da177e4 LT |
129 | |
130 | static int | |
131 | es7000_rename_gsi(int ioapic, int gsi) | |
132 | { | |
9338316c NP |
133 | if (es7000_plat == ES7000_ZORRO) |
134 | return gsi; | |
135 | ||
1da177e4 LT |
136 | if (!base) { |
137 | int i; | |
138 | for (i = 0; i < nr_ioapics; i++) | |
139 | base += nr_ioapic_registers[i]; | |
140 | } | |
141 | ||
c7e7964c | 142 | if (!ioapic && (gsi < 16)) |
1da177e4 | 143 | gsi += base; |
2c4ce18c | 144 | |
1da177e4 LT |
145 | return gsi; |
146 | } | |
147 | ||
569712b2 YL |
148 | static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) |
149 | { | |
150 | unsigned long vect = 0, psaival = 0; | |
151 | ||
152 | if (psai == NULL) | |
153 | return -1; | |
154 | ||
155 | vect = ((unsigned long)__pa(eip)/0x1000) << 16; | |
156 | psaival = (0x1000000 | vect | cpu); | |
157 | ||
158 | while (*psai & 0x1000000) | |
159 | ; | |
160 | ||
161 | *psai = psaival; | |
162 | ||
163 | return 0; | |
164 | } | |
54ac14a8 | 165 | |
2b6163bf | 166 | static int __init es7000_apic_is_cluster(void) |
54ac14a8 | 167 | { |
b5fe363b YL |
168 | /* MPENTIUMIII */ |
169 | if (boot_cpu_data.x86 == 6 && | |
2b6163bf YL |
170 | (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) |
171 | return 1; | |
b5fe363b | 172 | |
54ac14a8 YL |
173 | return 0; |
174 | } | |
569712b2 | 175 | |
d3185b37 | 176 | static void __init setup_unisys(void) |
56f1d5d5 NP |
177 | { |
178 | /* | |
179 | * Determine the generation of the ES7000 currently running. | |
180 | * | |
181 | * es7000_plat = 1 if the machine is a 5xx ES7000 box | |
182 | * es7000_plat = 2 if the machine is a x86_64 ES7000 box | |
183 | * | |
184 | */ | |
185 | if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2)) | |
9338316c | 186 | es7000_plat = ES7000_ZORRO; |
56f1d5d5 | 187 | else |
9338316c | 188 | es7000_plat = ES7000_CLASSIC; |
56f1d5d5 NP |
189 | ioapic_renumber_irq = es7000_rename_gsi; |
190 | } | |
191 | ||
1da177e4 | 192 | /* |
d3185b37 | 193 | * Parse the OEM Table: |
1da177e4 | 194 | */ |
352887d1 | 195 | static int __init parse_unisys_oem(char *oemptr) |
1da177e4 | 196 | { |
352887d1 | 197 | int i; |
1da177e4 | 198 | int success = 0; |
352887d1 IM |
199 | unsigned char type, size; |
200 | unsigned long val; | |
201 | char *tp = NULL; | |
202 | struct psai *psaip = NULL; | |
1da177e4 LT |
203 | struct mip_reg_info *mi; |
204 | struct mip_reg *host, *mip; | |
205 | ||
206 | tp = oemptr; | |
207 | ||
208 | tp += 8; | |
209 | ||
352887d1 | 210 | for (i = 0; i <= 6; i++) { |
1da177e4 LT |
211 | type = *tp++; |
212 | size = *tp++; | |
213 | tp -= 2; | |
214 | switch (type) { | |
215 | case MIP_REG: | |
216 | mi = (struct mip_reg_info *)tp; | |
217 | val = MIP_RD_LO(mi->host_reg); | |
218 | host_addr = val; | |
219 | host = (struct mip_reg *)val; | |
220 | host_reg = __va(host); | |
221 | val = MIP_RD_LO(mi->mip_reg); | |
222 | mip_port = MIP_PORT(mi->mip_info); | |
223 | mip_addr = val; | |
224 | mip = (struct mip_reg *)val; | |
225 | mip_reg = __va(mip); | |
5171c304 TG |
226 | pr_debug("es7000_mipcfg: host_reg = 0x%lx \n", |
227 | (unsigned long)host_reg); | |
228 | pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n", | |
229 | (unsigned long)mip_reg); | |
1da177e4 LT |
230 | success++; |
231 | break; | |
232 | case MIP_PSAI_REG: | |
233 | psaip = (struct psai *)tp; | |
234 | if (tp != NULL) { | |
235 | if (psaip->addr) | |
236 | psai = __va(psaip->addr); | |
237 | else | |
238 | psai = NULL; | |
239 | success++; | |
240 | } | |
241 | break; | |
242 | default: | |
243 | break; | |
244 | } | |
1da177e4 LT |
245 | tp += size; |
246 | } | |
247 | ||
d3185b37 | 248 | if (success < 2) |
9338316c | 249 | es7000_plat = NON_UNISYS; |
d3185b37 | 250 | else |
56f1d5d5 | 251 | setup_unisys(); |
2c4ce18c | 252 | |
1da177e4 LT |
253 | return es7000_plat; |
254 | } | |
255 | ||
e5428ede | 256 | #ifdef CONFIG_ACPI |
d3185b37 | 257 | static int __init find_unisys_acpi_oem_table(unsigned long *oem_addr) |
1da177e4 | 258 | { |
ceb6c468 | 259 | struct acpi_table_header *header = NULL; |
7da18ed9 | 260 | struct es7000_oem_table *table; |
b825e6cc | 261 | acpi_size tbl_size; |
7da18ed9 IM |
262 | acpi_status ret; |
263 | int i = 0; | |
a73aaedd | 264 | |
7da18ed9 IM |
265 | for (;;) { |
266 | ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size); | |
267 | if (!ACPI_SUCCESS(ret)) | |
268 | return -1; | |
a73aaedd | 269 | |
7da18ed9 IM |
270 | if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) |
271 | break; | |
a73aaedd | 272 | |
b825e6cc | 273 | early_acpi_os_unmap_memory(header, tbl_size); |
1da177e4 | 274 | } |
7da18ed9 IM |
275 | |
276 | table = (void *)header; | |
277 | ||
278 | oem_addrX = table->OEMTableAddr; | |
279 | oem_size = table->OEMTableSize; | |
280 | ||
281 | early_acpi_os_unmap_memory(header, tbl_size); | |
282 | ||
283 | *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, oem_size); | |
284 | ||
285 | return 0; | |
1da177e4 | 286 | } |
a73aaedd | 287 | |
d3185b37 | 288 | static void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr) |
a73aaedd | 289 | { |
b825e6cc YL |
290 | if (!oem_addr) |
291 | return; | |
292 | ||
293 | __acpi_unmap_table((char *)oem_addr, oem_size); | |
a73aaedd | 294 | } |
7da18ed9 IM |
295 | |
296 | static int es7000_check_dsdt(void) | |
297 | { | |
298 | struct acpi_table_header header; | |
299 | ||
300 | if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) && | |
301 | !strncmp(header.oem_id, "UNISYS", 6)) | |
302 | return 1; | |
303 | return 0; | |
304 | } | |
305 | ||
2b6163bf YL |
306 | static int __initdata es7000_acpi_ret; |
307 | ||
7da18ed9 IM |
308 | /* Hook from generic ACPI tables.c */ |
309 | static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |
310 | { | |
311 | unsigned long oem_addr = 0; | |
312 | int check_dsdt; | |
313 | int ret = 0; | |
314 | ||
315 | /* check dsdt at first to avoid clear fix_map for oem_addr */ | |
316 | check_dsdt = es7000_check_dsdt(); | |
317 | ||
318 | if (!find_unisys_acpi_oem_table(&oem_addr)) { | |
319 | if (check_dsdt) { | |
320 | ret = parse_unisys_oem((char *)oem_addr); | |
321 | } else { | |
322 | setup_unisys(); | |
323 | ret = 1; | |
324 | } | |
325 | /* | |
326 | * we need to unmap it | |
327 | */ | |
328 | unmap_unisys_acpi_oem_table(oem_addr); | |
329 | } | |
2b6163bf YL |
330 | |
331 | es7000_acpi_ret = ret; | |
332 | ||
333 | return ret && !es7000_apic_is_cluster(); | |
7da18ed9 | 334 | } |
2b6163bf YL |
335 | static int __init es7000_acpi_madt_oem_check_cluster(char *oem_id, |
336 | char *oem_table_id) | |
337 | { | |
338 | int ret = es7000_acpi_ret; | |
339 | ||
340 | return ret && es7000_apic_is_cluster(); | |
341 | } | |
342 | ||
7da18ed9 IM |
343 | #else /* !CONFIG_ACPI: */ |
344 | static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |
345 | { | |
346 | return 0; | |
347 | } | |
348 | #endif /* !CONFIG_ACPI */ | |
1da177e4 | 349 | |
2c4ce18c | 350 | static void es7000_spin(int n) |
1da177e4 LT |
351 | { |
352 | int i = 0; | |
353 | ||
354 | while (i++ < n) | |
355 | rep_nop(); | |
356 | } | |
357 | ||
358 | static int __init | |
359 | es7000_mip_write(struct mip_reg *mip_reg) | |
360 | { | |
2c4ce18c IM |
361 | int status = 0; |
362 | int spin; | |
1da177e4 LT |
363 | |
364 | spin = MIP_SPIN; | |
2c4ce18c IM |
365 | while ((host_reg->off_0x38 & MIP_VALID) != 0) { |
366 | if (--spin <= 0) { | |
7da18ed9 | 367 | WARN(1, "Timeout waiting for Host Valid Flag\n"); |
2c4ce18c IM |
368 | return -1; |
369 | } | |
1da177e4 LT |
370 | es7000_spin(MIP_SPIN); |
371 | } | |
372 | ||
373 | memcpy(host_reg, mip_reg, sizeof(struct mip_reg)); | |
374 | outb(1, mip_port); | |
375 | ||
376 | spin = MIP_SPIN; | |
377 | ||
2c4ce18c | 378 | while ((mip_reg->off_0x38 & MIP_VALID) == 0) { |
1da177e4 | 379 | if (--spin <= 0) { |
7da18ed9 | 380 | WARN(1, "Timeout waiting for MIP Valid Flag\n"); |
1da177e4 LT |
381 | return -1; |
382 | } | |
383 | es7000_spin(MIP_SPIN); | |
384 | } | |
385 | ||
2c4ce18c IM |
386 | status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48; |
387 | mip_reg->off_0x38 &= ~MIP_VALID; | |
388 | ||
1da177e4 LT |
389 | return status; |
390 | } | |
391 | ||
d3185b37 | 392 | static void __init es7000_enable_apic_mode(void) |
1da177e4 | 393 | { |
b0b20e5a IM |
394 | struct mip_reg es7000_mip_reg; |
395 | int mip_status; | |
396 | ||
397 | if (!es7000_plat) | |
1da177e4 | 398 | return; |
b0b20e5a | 399 | |
7da18ed9 | 400 | printk(KERN_INFO "ES7000: Enabling APIC mode.\n"); |
352887d1 IM |
401 | memset(&es7000_mip_reg, 0, sizeof(struct mip_reg)); |
402 | es7000_mip_reg.off_0x00 = MIP_SW_APIC; | |
403 | es7000_mip_reg.off_0x38 = MIP_VALID; | |
b0b20e5a | 404 | |
7da18ed9 IM |
405 | while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) |
406 | WARN(1, "Command failed, status = %x\n", mip_status); | |
1da177e4 | 407 | } |
2e096df8 | 408 | |
2e096df8 IM |
409 | static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask) |
410 | { | |
411 | /* Careful. Some cpus do not strictly honor the set of cpus | |
412 | * specified in the interrupt destination when using lowest | |
413 | * priority interrupt delivery mode. | |
414 | * | |
415 | * In particular there was a hyperthreading cpu observed to | |
416 | * deliver interrupts to the wrong hyperthread when only one | |
417 | * hyperthread was specified in the interrupt desitination. | |
418 | */ | |
419 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | |
420 | } | |
421 | ||
422 | ||
423 | static void es7000_wait_for_init_deassert(atomic_t *deassert) | |
424 | { | |
2e096df8 IM |
425 | while (!atomic_read(deassert)) |
426 | cpu_relax(); | |
2e096df8 IM |
427 | } |
428 | ||
429 | static unsigned int es7000_get_apic_id(unsigned long x) | |
430 | { | |
431 | return (x >> 24) & 0xFF; | |
432 | } | |
433 | ||
2e096df8 IM |
434 | static void es7000_send_IPI_mask(const struct cpumask *mask, int vector) |
435 | { | |
43f39890 | 436 | default_send_IPI_mask_sequence_phys(mask, vector); |
2e096df8 IM |
437 | } |
438 | ||
439 | static void es7000_send_IPI_allbutself(int vector) | |
440 | { | |
43f39890 | 441 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); |
2e096df8 IM |
442 | } |
443 | ||
444 | static void es7000_send_IPI_all(int vector) | |
445 | { | |
446 | es7000_send_IPI_mask(cpu_online_mask, vector); | |
447 | } | |
448 | ||
449 | static int es7000_apic_id_registered(void) | |
450 | { | |
352887d1 | 451 | return 1; |
2e096df8 IM |
452 | } |
453 | ||
454 | static const cpumask_t *target_cpus_cluster(void) | |
455 | { | |
456 | return &CPU_MASK_ALL; | |
457 | } | |
458 | ||
459 | static const cpumask_t *es7000_target_cpus(void) | |
460 | { | |
461 | return &cpumask_of_cpu(smp_processor_id()); | |
462 | } | |
463 | ||
464 | static unsigned long | |
465 | es7000_check_apicid_used(physid_mask_t bitmap, int apicid) | |
466 | { | |
467 | return 0; | |
468 | } | |
469 | static unsigned long es7000_check_apicid_present(int bit) | |
470 | { | |
471 | return physid_isset(bit, phys_cpu_present_map); | |
472 | } | |
473 | ||
474 | static unsigned long calculate_ldr(int cpu) | |
475 | { | |
2c4ce18c | 476 | unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu); |
2e096df8 | 477 | |
2c4ce18c | 478 | return SET_APIC_LOGICAL_ID(id); |
2e096df8 IM |
479 | } |
480 | ||
481 | /* | |
482 | * Set up the logical destination ID. | |
483 | * | |
484 | * Intel recommends to set DFR, LdR and TPR before enabling | |
485 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
486 | * document number 292116). So here it goes... | |
487 | */ | |
488 | static void es7000_init_apic_ldr_cluster(void) | |
489 | { | |
490 | unsigned long val; | |
491 | int cpu = smp_processor_id(); | |
492 | ||
352887d1 | 493 | apic_write(APIC_DFR, APIC_DFR_CLUSTER); |
2e096df8 IM |
494 | val = calculate_ldr(cpu); |
495 | apic_write(APIC_LDR, val); | |
496 | } | |
497 | ||
498 | static void es7000_init_apic_ldr(void) | |
499 | { | |
500 | unsigned long val; | |
501 | int cpu = smp_processor_id(); | |
502 | ||
352887d1 | 503 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
2e096df8 IM |
504 | val = calculate_ldr(cpu); |
505 | apic_write(APIC_LDR, val); | |
506 | } | |
507 | ||
508 | static void es7000_setup_apic_routing(void) | |
509 | { | |
510 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | |
7da18ed9 IM |
511 | |
512 | printk(KERN_INFO | |
513 | "Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", | |
2e096df8 IM |
514 | (apic_version[apic] == 0x14) ? |
515 | "Physical Cluster" : "Logical Cluster", | |
7da18ed9 | 516 | nr_ioapics, cpus_addr(*es7000_target_cpus())[0]); |
2e096df8 IM |
517 | } |
518 | ||
519 | static int es7000_apicid_to_node(int logical_apicid) | |
520 | { | |
521 | return 0; | |
522 | } | |
523 | ||
524 | ||
525 | static int es7000_cpu_present_to_apicid(int mps_cpu) | |
526 | { | |
527 | if (!mps_cpu) | |
528 | return boot_cpu_physical_apicid; | |
529 | else if (mps_cpu < nr_cpu_ids) | |
2c4ce18c | 530 | return per_cpu(x86_bios_cpu_apicid, mps_cpu); |
2e096df8 IM |
531 | else |
532 | return BAD_APICID; | |
533 | } | |
534 | ||
7da18ed9 IM |
535 | static int cpu_id; |
536 | ||
2e096df8 IM |
537 | static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid) |
538 | { | |
2e096df8 IM |
539 | physid_mask_t mask; |
540 | ||
7da18ed9 IM |
541 | mask = physid_mask_of_physid(cpu_id); |
542 | ++cpu_id; | |
2e096df8 IM |
543 | |
544 | return mask; | |
545 | } | |
546 | ||
547 | /* Mapping from cpu number to logical apicid */ | |
548 | static int es7000_cpu_to_logical_apicid(int cpu) | |
549 | { | |
550 | #ifdef CONFIG_SMP | |
551 | if (cpu >= nr_cpu_ids) | |
552 | return BAD_APICID; | |
2f205bc4 | 553 | return cpu_2_logical_apicid[cpu]; |
2e096df8 IM |
554 | #else |
555 | return logical_smp_processor_id(); | |
556 | #endif | |
557 | } | |
558 | ||
559 | static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map) | |
560 | { | |
561 | /* For clustered we don't have a good way to do this yet - hack */ | |
562 | return physids_promote(0xff); | |
563 | } | |
564 | ||
565 | static int es7000_check_phys_apicid_present(int cpu_physical_apicid) | |
566 | { | |
567 | boot_cpu_physical_apicid = read_apic_id(); | |
2c4ce18c | 568 | return 1; |
2e096df8 IM |
569 | } |
570 | ||
571 | static unsigned int | |
572 | es7000_cpu_mask_to_apicid_cluster(const struct cpumask *cpumask) | |
573 | { | |
574 | int cpus_found = 0; | |
575 | int num_bits_set; | |
576 | int apicid; | |
577 | int cpu; | |
578 | ||
579 | num_bits_set = cpumask_weight(cpumask); | |
580 | /* Return id to all */ | |
581 | if (num_bits_set == nr_cpu_ids) | |
582 | return 0xFF; | |
583 | /* | |
584 | * The cpus in the mask must all be on the apic cluster. If are not | |
585 | * on the same apicid cluster return default value of target_cpus(): | |
586 | */ | |
587 | cpu = cpumask_first(cpumask); | |
588 | apicid = es7000_cpu_to_logical_apicid(cpu); | |
589 | ||
590 | while (cpus_found < num_bits_set) { | |
591 | if (cpumask_test_cpu(cpu, cpumask)) { | |
592 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
593 | ||
b9e0d1aa | 594 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
7da18ed9 | 595 | WARN(1, "Not a valid mask!"); |
2e096df8 IM |
596 | |
597 | return 0xFF; | |
598 | } | |
599 | apicid = new_apicid; | |
600 | cpus_found++; | |
601 | } | |
602 | cpu++; | |
603 | } | |
604 | return apicid; | |
605 | } | |
606 | ||
607 | static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask) | |
608 | { | |
609 | int cpus_found = 0; | |
610 | int num_bits_set; | |
611 | int apicid; | |
612 | int cpu; | |
613 | ||
614 | num_bits_set = cpus_weight(*cpumask); | |
615 | /* Return id to all */ | |
616 | if (num_bits_set == nr_cpu_ids) | |
617 | return es7000_cpu_to_logical_apicid(0); | |
618 | /* | |
619 | * The cpus in the mask must all be on the apic cluster. If are not | |
620 | * on the same apicid cluster return default value of target_cpus(): | |
621 | */ | |
622 | cpu = first_cpu(*cpumask); | |
623 | apicid = es7000_cpu_to_logical_apicid(cpu); | |
624 | while (cpus_found < num_bits_set) { | |
625 | if (cpu_isset(cpu, *cpumask)) { | |
626 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
627 | ||
b9e0d1aa | 628 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
352887d1 | 629 | printk("%s: Not a valid mask!\n", __func__); |
2e096df8 IM |
630 | |
631 | return es7000_cpu_to_logical_apicid(0); | |
632 | } | |
633 | apicid = new_apicid; | |
634 | cpus_found++; | |
635 | } | |
636 | cpu++; | |
637 | } | |
638 | return apicid; | |
639 | } | |
640 | ||
641 | static unsigned int | |
642 | es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask, | |
643 | const struct cpumask *andmask) | |
644 | { | |
645 | int apicid = es7000_cpu_to_logical_apicid(0); | |
646 | cpumask_var_t cpumask; | |
647 | ||
648 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | |
649 | return apicid; | |
650 | ||
651 | cpumask_and(cpumask, inmask, andmask); | |
652 | cpumask_and(cpumask, cpumask, cpu_online_mask); | |
653 | apicid = es7000_cpu_mask_to_apicid(cpumask); | |
654 | ||
655 | free_cpumask_var(cpumask); | |
656 | ||
657 | return apicid; | |
658 | } | |
659 | ||
660 | static int es7000_phys_pkg_id(int cpuid_apic, int index_msb) | |
661 | { | |
662 | return cpuid_apic >> index_msb; | |
663 | } | |
664 | ||
2e096df8 IM |
665 | static int probe_es7000(void) |
666 | { | |
667 | /* probed later in mptable/ACPI hooks */ | |
668 | return 0; | |
669 | } | |
670 | ||
2b6163bf | 671 | static int __initdata es7000_mps_ret; |
2e096df8 IM |
672 | static __init int |
673 | es7000_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | |
674 | { | |
2b6163bf YL |
675 | int ret = 0; |
676 | ||
2e096df8 IM |
677 | if (mpc->oemptr) { |
678 | struct mpc_oemtable *oem_table = | |
679 | (struct mpc_oemtable *)mpc->oemptr; | |
680 | ||
681 | if (!strncmp(oem, "UNISYS", 6)) | |
2b6163bf | 682 | ret = parse_unisys_oem((char *)oem_table); |
2e096df8 | 683 | } |
2b6163bf YL |
684 | |
685 | es7000_mps_ret = ret; | |
686 | ||
687 | return ret && !es7000_apic_is_cluster(); | |
688 | } | |
689 | ||
690 | static __init int | |
691 | es7000_mps_oem_check_cluster(struct mpc_table *mpc, char *oem, char *productid) | |
692 | { | |
693 | int ret = es7000_mps_ret; | |
694 | ||
695 | return ret && es7000_apic_is_cluster(); | |
2e096df8 IM |
696 | } |
697 | ||
2b6163bf YL |
698 | struct apic apic_es7000_cluster = { |
699 | ||
700 | .name = "es7000", | |
701 | .probe = probe_es7000, | |
702 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check_cluster, | |
703 | .apic_id_registered = es7000_apic_id_registered, | |
704 | ||
705 | .irq_delivery_mode = dest_LowestPrio, | |
706 | /* logical delivery broadcast to all procs: */ | |
707 | .irq_dest_mode = 1, | |
708 | ||
709 | .target_cpus = target_cpus_cluster, | |
710 | .disable_esr = 1, | |
711 | .dest_logical = 0, | |
712 | .check_apicid_used = es7000_check_apicid_used, | |
713 | .check_apicid_present = es7000_check_apicid_present, | |
714 | ||
715 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
716 | .init_apic_ldr = es7000_init_apic_ldr_cluster, | |
717 | ||
718 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
719 | .setup_apic_routing = es7000_setup_apic_routing, | |
720 | .multi_timer_check = NULL, | |
721 | .apicid_to_node = es7000_apicid_to_node, | |
722 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
723 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
724 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
725 | .setup_portio_remap = NULL, | |
726 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
727 | .enable_apic_mode = es7000_enable_apic_mode, | |
728 | .phys_pkg_id = es7000_phys_pkg_id, | |
729 | .mps_oem_check = es7000_mps_oem_check_cluster, | |
730 | ||
731 | .get_apic_id = es7000_get_apic_id, | |
732 | .set_apic_id = NULL, | |
733 | .apic_id_mask = 0xFF << 24, | |
734 | ||
735 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid_cluster, | |
736 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | |
737 | ||
738 | .send_IPI_mask = es7000_send_IPI_mask, | |
739 | .send_IPI_mask_allbutself = NULL, | |
740 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
741 | .send_IPI_all = es7000_send_IPI_all, | |
742 | .send_IPI_self = default_send_IPI_self, | |
743 | ||
744 | .wakeup_cpu = wakeup_secondary_cpu_via_mip, | |
745 | ||
746 | .trampoline_phys_low = 0x467, | |
747 | .trampoline_phys_high = 0x469, | |
748 | ||
749 | .wait_for_init_deassert = NULL, | |
750 | ||
751 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
752 | .smp_callin_clear_local_apic = NULL, | |
753 | .inquire_remote_apic = default_inquire_remote_apic, | |
754 | ||
755 | .read = native_apic_mem_read, | |
756 | .write = native_apic_mem_write, | |
757 | .icr_read = native_apic_icr_read, | |
758 | .icr_write = native_apic_icr_write, | |
759 | .wait_icr_idle = native_apic_wait_icr_idle, | |
760 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
761 | }; | |
2e096df8 | 762 | |
be163a15 | 763 | struct apic apic_es7000 = { |
2e096df8 IM |
764 | |
765 | .name = "es7000", | |
766 | .probe = probe_es7000, | |
767 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check, | |
768 | .apic_id_registered = es7000_apic_id_registered, | |
769 | ||
770 | .irq_delivery_mode = dest_Fixed, | |
771 | /* phys delivery to target CPUs: */ | |
772 | .irq_dest_mode = 0, | |
773 | ||
774 | .target_cpus = es7000_target_cpus, | |
775 | .disable_esr = 1, | |
776 | .dest_logical = 0, | |
777 | .check_apicid_used = es7000_check_apicid_used, | |
778 | .check_apicid_present = es7000_check_apicid_present, | |
779 | ||
780 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
781 | .init_apic_ldr = es7000_init_apic_ldr, | |
782 | ||
783 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
784 | .setup_apic_routing = es7000_setup_apic_routing, | |
785 | .multi_timer_check = NULL, | |
786 | .apicid_to_node = es7000_apicid_to_node, | |
787 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
788 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
789 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
790 | .setup_portio_remap = NULL, | |
791 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
792 | .enable_apic_mode = es7000_enable_apic_mode, | |
793 | .phys_pkg_id = es7000_phys_pkg_id, | |
794 | .mps_oem_check = es7000_mps_oem_check, | |
795 | ||
796 | .get_apic_id = es7000_get_apic_id, | |
797 | .set_apic_id = NULL, | |
798 | .apic_id_mask = 0xFF << 24, | |
799 | ||
800 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, | |
801 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | |
802 | ||
803 | .send_IPI_mask = es7000_send_IPI_mask, | |
804 | .send_IPI_mask_allbutself = NULL, | |
805 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
806 | .send_IPI_all = es7000_send_IPI_all, | |
6b64ee02 | 807 | .send_IPI_self = default_send_IPI_self, |
2e096df8 | 808 | |
2b6163bf | 809 | .wakeup_cpu = wakeup_secondary_cpu_via_init, |
2e096df8 IM |
810 | |
811 | .trampoline_phys_low = 0x467, | |
812 | .trampoline_phys_high = 0x469, | |
813 | ||
814 | .wait_for_init_deassert = es7000_wait_for_init_deassert, | |
815 | ||
816 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
817 | .smp_callin_clear_local_apic = NULL, | |
2e096df8 | 818 | .inquire_remote_apic = default_inquire_remote_apic, |
c1eeb2de YL |
819 | |
820 | .read = native_apic_mem_read, | |
821 | .write = native_apic_mem_write, | |
822 | .icr_read = native_apic_icr_read, | |
823 | .icr_write = native_apic_icr_write, | |
824 | .wait_icr_idle = native_apic_wait_icr_idle, | |
825 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
2e096df8 | 826 | }; |