Commit | Line | Data |
---|---|---|
637cba02 | 1 | /* |
77313190 IM |
2 | * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs. |
3 | * | |
1da177e4 LT |
4 | * Drives the local APIC in "clustered mode". |
5 | */ | |
1da177e4 LT |
6 | #include <linux/threads.h> |
7 | #include <linux/cpumask.h> | |
1da177e4 | 8 | #include <linux/kernel.h> |
1da177e4 LT |
9 | #include <linux/init.h> |
10 | #include <linux/dmi.h> | |
4696ca5b | 11 | #include <linux/smp.h> |
9f4187f0 | 12 | |
77313190 IM |
13 | #include <asm/apicdef.h> |
14 | #include <asm/fixmap.h> | |
15 | #include <asm/mpspec.h> | |
16 | #include <asm/apic.h> | |
17 | #include <asm/ipi.h> | |
9f4187f0 | 18 | |
9694cd6c | 19 | static unsigned bigsmp_get_apic_id(unsigned long x) |
9f4187f0 IM |
20 | { |
21 | return (x >> 24) & 0xFF; | |
22 | } | |
23 | ||
9694cd6c | 24 | static int bigsmp_apic_id_registered(void) |
9f4187f0 IM |
25 | { |
26 | return 1; | |
27 | } | |
28 | ||
4f062896 | 29 | static const struct cpumask *bigsmp_target_cpus(void) |
9f4187f0 IM |
30 | { |
31 | #ifdef CONFIG_SMP | |
4f062896 | 32 | return cpu_online_mask; |
9f4187f0 | 33 | #else |
4f062896 | 34 | return cpumask_of(0); |
9f4187f0 IM |
35 | #endif |
36 | } | |
37 | ||
7abc0753 | 38 | static unsigned long bigsmp_check_apicid_used(physid_mask_t *map, int apicid) |
9f4187f0 IM |
39 | { |
40 | return 0; | |
41 | } | |
42 | ||
9694cd6c | 43 | static unsigned long bigsmp_check_apicid_present(int bit) |
9f4187f0 IM |
44 | { |
45 | return 1; | |
46 | } | |
47 | ||
12bf24a4 TH |
48 | static int bigsmp_early_logical_apicid(int cpu) |
49 | { | |
50 | /* on bigsmp, logical apicid is the same as physical */ | |
51 | return early_per_cpu(x86_cpu_to_apicid, cpu); | |
52 | } | |
53 | ||
9f4187f0 IM |
54 | static inline unsigned long calculate_ldr(int cpu) |
55 | { | |
56 | unsigned long val, id; | |
77313190 | 57 | |
9f4187f0 | 58 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
77313190 | 59 | id = per_cpu(x86_bios_cpu_apicid, cpu); |
9f4187f0 | 60 | val |= SET_APIC_LOGICAL_ID(id); |
77313190 | 61 | |
9f4187f0 IM |
62 | return val; |
63 | } | |
64 | ||
65 | /* | |
66 | * Set up the logical destination ID. | |
67 | * | |
68 | * Intel recommends to set DFR, LDR and TPR before enabling | |
69 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
70 | * document number 292116). So here it goes... | |
71 | */ | |
9694cd6c | 72 | static void bigsmp_init_apic_ldr(void) |
9f4187f0 IM |
73 | { |
74 | unsigned long val; | |
75 | int cpu = smp_processor_id(); | |
76 | ||
77313190 | 77 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
9f4187f0 IM |
78 | val = calculate_ldr(cpu); |
79 | apic_write(APIC_LDR, val); | |
80 | } | |
81 | ||
9694cd6c | 82 | static void bigsmp_setup_apic_routing(void) |
9f4187f0 | 83 | { |
77313190 IM |
84 | printk(KERN_INFO |
85 | "Enabling APIC mode: Physflat. Using %d I/O APICs\n", | |
86 | nr_ioapics); | |
9f4187f0 IM |
87 | } |
88 | ||
9694cd6c | 89 | static int bigsmp_cpu_present_to_apicid(int mps_cpu) |
9f4187f0 IM |
90 | { |
91 | if (mps_cpu < nr_cpu_ids) | |
92 | return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); | |
93 | ||
94 | return BAD_APICID; | |
95 | } | |
96 | ||
7abc0753 | 97 | static void bigsmp_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) |
9f4187f0 IM |
98 | { |
99 | /* For clustered we don't have a good way to do this yet - hack */ | |
7abc0753 | 100 | physids_promote(0xFFL, retmap); |
9f4187f0 IM |
101 | } |
102 | ||
e11dadab | 103 | static int bigsmp_check_phys_apicid_present(int phys_apicid) |
9f4187f0 IM |
104 | { |
105 | return 1; | |
106 | } | |
107 | ||
108 | /* As we are using single CPU as destination, pick only one CPU here */ | |
4f062896 | 109 | static unsigned int bigsmp_cpu_mask_to_apicid(const struct cpumask *cpumask) |
9f4187f0 | 110 | { |
7632611f TH |
111 | int cpu = cpumask_first(cpumask); |
112 | ||
113 | if (cpu < nr_cpu_ids) | |
114 | return cpu_physical_id(cpu); | |
115 | return BAD_APICID; | |
9f4187f0 IM |
116 | } |
117 | ||
9694cd6c | 118 | static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
9f4187f0 IM |
119 | const struct cpumask *andmask) |
120 | { | |
121 | int cpu; | |
122 | ||
123 | /* | |
124 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | |
125 | * May as well be the first. | |
126 | */ | |
127 | for_each_cpu_and(cpu, cpumask, andmask) { | |
128 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | |
7632611f | 129 | return cpu_physical_id(cpu); |
9f4187f0 | 130 | } |
7632611f | 131 | return BAD_APICID; |
9f4187f0 IM |
132 | } |
133 | ||
9694cd6c | 134 | static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb) |
9f4187f0 IM |
135 | { |
136 | return cpuid_apic >> index_msb; | |
137 | } | |
138 | ||
9f4187f0 IM |
139 | static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector) |
140 | { | |
43f39890 | 141 | default_send_IPI_mask_sequence_phys(mask, vector); |
9f4187f0 IM |
142 | } |
143 | ||
9694cd6c | 144 | static void bigsmp_send_IPI_allbutself(int vector) |
9f4187f0 | 145 | { |
43f39890 | 146 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); |
9f4187f0 IM |
147 | } |
148 | ||
9694cd6c | 149 | static void bigsmp_send_IPI_all(int vector) |
9f4187f0 IM |
150 | { |
151 | bigsmp_send_IPI_mask(cpu_online_mask, vector); | |
152 | } | |
1da177e4 LT |
153 | |
154 | static int dmi_bigsmp; /* can be set by dmi scanners */ | |
155 | ||
1855256c | 156 | static int hp_ht_bigsmp(const struct dmi_system_id *d) |
1da177e4 | 157 | { |
1da177e4 LT |
158 | printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident); |
159 | dmi_bigsmp = 1; | |
77313190 | 160 | |
1da177e4 LT |
161 | return 0; |
162 | } | |
163 | ||
164 | ||
1855256c | 165 | static const struct dmi_system_id bigsmp_dmi_table[] = { |
637cba02 | 166 | { hp_ht_bigsmp, "HP ProLiant DL760 G2", |
77313190 IM |
167 | { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), |
168 | DMI_MATCH(DMI_BIOS_VERSION, "P44-"), | |
169 | } | |
637cba02 PC |
170 | }, |
171 | ||
172 | { hp_ht_bigsmp, "HP ProLiant DL740", | |
77313190 IM |
173 | { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), |
174 | DMI_MATCH(DMI_BIOS_VERSION, "P47-"), | |
175 | } | |
637cba02 | 176 | }, |
77313190 | 177 | { } /* NULL entry stops DMI scanning */ |
1da177e4 LT |
178 | }; |
179 | ||
4f062896 | 180 | static void bigsmp_vector_allocation_domain(int cpu, struct cpumask *retmask) |
497c9a19 | 181 | { |
4f062896 RR |
182 | cpumask_clear(retmask); |
183 | cpumask_set_cpu(cpu, retmask); | |
497c9a19 | 184 | } |
1da177e4 | 185 | |
af669c97 | 186 | static int probe_bigsmp(void) |
637cba02 | 187 | { |
911a62d4 | 188 | if (def_to_bigsmp) |
e0da3364 | 189 | dmi_bigsmp = 1; |
911a62d4 VP |
190 | else |
191 | dmi_check_system(bigsmp_dmi_table); | |
77313190 | 192 | |
637cba02 PC |
193 | return dmi_bigsmp; |
194 | } | |
1da177e4 | 195 | |
be163a15 | 196 | struct apic apic_bigsmp = { |
d26b6d66 IM |
197 | |
198 | .name = "bigsmp", | |
199 | .probe = probe_bigsmp, | |
306db03b | 200 | .acpi_madt_oem_check = NULL, |
7ed248da | 201 | .apic_id_registered = bigsmp_apic_id_registered, |
d26b6d66 | 202 | |
d8a3539e IM |
203 | .irq_delivery_mode = dest_Fixed, |
204 | /* phys delivery to target CPU: */ | |
205 | .irq_dest_mode = 0, | |
d26b6d66 | 206 | |
0a9cc20b | 207 | .target_cpus = bigsmp_target_cpus, |
08125d3e | 208 | .disable_esr = 1, |
bdb1a9b6 | 209 | .dest_logical = 0, |
d1d7cae8 IM |
210 | .check_apicid_used = bigsmp_check_apicid_used, |
211 | .check_apicid_present = bigsmp_check_apicid_present, | |
d26b6d66 | 212 | |
e2d40b18 | 213 | .vector_allocation_domain = bigsmp_vector_allocation_domain, |
a5c43296 | 214 | .init_apic_ldr = bigsmp_init_apic_ldr, |
d26b6d66 | 215 | |
d190cb87 | 216 | .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, |
72ce0165 | 217 | .setup_apic_routing = bigsmp_setup_apic_routing, |
33a201fa | 218 | .multi_timer_check = NULL, |
a21769a4 | 219 | .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid, |
7abc0753 | 220 | .apicid_to_cpu_present = physid_set_mask_of_physid, |
d83093b5 | 221 | .setup_portio_remap = NULL, |
a27a6210 | 222 | .check_phys_apicid_present = bigsmp_check_phys_apicid_present, |
49040333 | 223 | .enable_apic_mode = NULL, |
cb8cc442 | 224 | .phys_pkg_id = bigsmp_phys_pkg_id, |
9c764247 | 225 | .mps_oem_check = NULL, |
d26b6d66 | 226 | |
ca6c8ed4 | 227 | .get_apic_id = bigsmp_get_apic_id, |
d26b6d66 | 228 | .set_apic_id = NULL, |
94af1875 | 229 | .apic_id_mask = 0xFF << 24, |
d26b6d66 | 230 | |
debccb3e IM |
231 | .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid, |
232 | .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and, | |
d26b6d66 | 233 | |
9f4187f0 | 234 | .send_IPI_mask = bigsmp_send_IPI_mask, |
d26b6d66 | 235 | .send_IPI_mask_allbutself = NULL, |
dac5f412 IM |
236 | .send_IPI_allbutself = bigsmp_send_IPI_allbutself, |
237 | .send_IPI_all = bigsmp_send_IPI_all, | |
6b64ee02 | 238 | .send_IPI_self = default_send_IPI_self, |
d26b6d66 | 239 | |
6f177c01 IM |
240 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, |
241 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | |
a9659366 IM |
242 | |
243 | .wait_for_init_deassert = default_wait_for_init_deassert, | |
244 | ||
333344d9 | 245 | .smp_callin_clear_local_apic = NULL, |
25dc0049 | 246 | .inquire_remote_apic = default_inquire_remote_apic, |
c1eeb2de YL |
247 | |
248 | .read = native_apic_mem_read, | |
249 | .write = native_apic_mem_write, | |
250 | .icr_read = native_apic_icr_read, | |
251 | .icr_write = native_apic_icr_write, | |
252 | .wait_icr_idle = native_apic_wait_icr_idle, | |
253 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
acb8bc09 | 254 | |
12bf24a4 | 255 | .x86_32_early_logical_apicid = bigsmp_early_logical_apicid, |
d26b6d66 | 256 | }; |
107e0e0c SS |
257 | |
258 | apic_driver(apic_bigsmp); |