Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Copyright 2004 James Cleverdon, IBM. | |
3 | * Subject to the GNU Public License, v.2 | |
4 | * | |
f8d31193 | 5 | * Flat APIC subarch code. |
1da177e4 LT |
6 | * |
7 | * Hacked for x86-64 by James Cleverdon from i386 architecture code by | |
8 | * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and | |
9 | * James Cleverdon. | |
10 | */ | |
f19cccf3 | 11 | #include <linux/errno.h> |
1da177e4 LT |
12 | #include <linux/threads.h> |
13 | #include <linux/cpumask.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/ctype.h> | |
17 | #include <linux/init.h> | |
0c81c746 | 18 | #include <linux/hardirq.h> |
1da177e4 | 19 | #include <asm/smp.h> |
7b6aa335 | 20 | #include <asm/apic.h> |
c1eeb2de | 21 | #include <asm/ipi.h> |
1da177e4 | 22 | |
1b9b89e7 YL |
23 | #ifdef CONFIG_ACPI |
24 | #include <acpi/acpi_bus.h> | |
25 | #endif | |
26 | ||
983f91ff | 27 | static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
1b9b89e7 YL |
28 | { |
29 | return 1; | |
30 | } | |
31 | ||
bcda016e | 32 | static const struct cpumask *flat_target_cpus(void) |
1da177e4 | 33 | { |
bcda016e | 34 | return cpu_online_mask; |
1da177e4 LT |
35 | } |
36 | ||
bcda016e | 37 | static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask) |
c7111c13 EB |
38 | { |
39 | /* Careful. Some cpus do not strictly honor the set of cpus | |
40 | * specified in the interrupt destination when using lowest | |
41 | * priority interrupt delivery mode. | |
42 | * | |
43 | * In particular there was a hyperthreading cpu observed to | |
44 | * deliver interrupts to the wrong hyperthread when only one | |
45 | * hyperthread was specified in the interrupt desitination. | |
46 | */ | |
bcda016e MT |
47 | cpumask_clear(retmask); |
48 | cpumask_bits(retmask)[0] = APIC_ALL_CPUS; | |
c7111c13 EB |
49 | } |
50 | ||
1da177e4 LT |
51 | /* |
52 | * Set up the logical destination ID. | |
53 | * | |
54 | * Intel recommends to set DFR, LDR and TPR before enabling | |
55 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
56 | * document number 292116). So here it goes... | |
57 | */ | |
58 | static void flat_init_apic_ldr(void) | |
59 | { | |
60 | unsigned long val; | |
61 | unsigned long num, id; | |
62 | ||
63 | num = smp_processor_id(); | |
64 | id = 1UL << num; | |
eddfb4ed | 65 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
1da177e4 LT |
66 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
67 | val |= SET_APIC_LOGICAL_ID(id); | |
eddfb4ed | 68 | apic_write(APIC_LDR, val); |
1da177e4 LT |
69 | } |
70 | ||
e7986739 | 71 | static inline void _flat_send_IPI_mask(unsigned long mask, int vector) |
1da177e4 | 72 | { |
1da177e4 LT |
73 | unsigned long flags; |
74 | ||