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dc1e35c6 SS |
1 | #ifndef __ASM_X86_XSAVE_H |
2 | #define __ASM_X86_XSAVE_H | |
3 | ||
6152e4b1 | 4 | #include <linux/types.h> |
dc1e35c6 | 5 | #include <asm/processor.h> |
dc1e35c6 | 6 | |
ee813d53 | 7 | #define XSTATE_CPUID 0x0000000d |
dc1e35c6 SS |
8 | |
9 | #define XSTATE_FP 0x1 | |
10 | #define XSTATE_SSE 0x2 | |
a30469e7 | 11 | #define XSTATE_YMM 0x4 |
dc1e35c6 SS |
12 | |
13 | #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE) | |
14 | ||
15 | #define FXSAVE_SIZE 512 | |
16 | ||
2d5b5a66 SY |
17 | #define XSAVE_HDR_SIZE 64 |
18 | #define XSAVE_HDR_OFFSET FXSAVE_SIZE | |
19 | ||
20 | #define XSAVE_YMM_SIZE 256 | |
21 | #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET) | |
5ee481da | 22 | |
dc1e35c6 SS |
23 | /* |
24 | * These are the features that the OS can handle currently. | |
25 | */ | |
a30469e7 | 26 | #define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) |
dc1e35c6 | 27 | |
b359e8a4 SS |
28 | #ifdef CONFIG_X86_64 |
29 | #define REX_PREFIX "0x48, " | |
30 | #else | |
31 | #define REX_PREFIX | |
32 | #endif | |
33 | ||
6152e4b1 PA |
34 | extern unsigned int xstate_size; |
35 | extern u64 pcntxt_mask; | |
5b3efd50 | 36 | extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS]; |
dc1e35c6 | 37 | |
dc1e35c6 | 38 | extern void xsave_init(void); |
5b3efd50 | 39 | extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask); |
b359e8a4 | 40 | extern int init_fpu(struct task_struct *child); |
c37b5efe SS |
41 | extern int check_for_xstate(struct i387_fxsave_struct __user *buf, |
42 | void __user *fpstate, | |
43 | struct _fpx_sw_bytes *sw); | |
b359e8a4 | 44 | |
0ca5bd0d | 45 | static inline int fpu_xrstor_checking(struct xsave_struct *fx) |
b359e8a4 SS |
46 | { |
47 | int err; | |
48 | ||
49 | asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t" | |
50 | "2:\n" | |
51 | ".section .fixup,\"ax\"\n" | |
52 | "3: movl $-1,%[err]\n" | |
53 | " jmp 2b\n" | |
54 | ".previous\n" | |
55 | _ASM_EXTABLE(1b, 3b) | |
56 | : [err] "=r" (err) | |
57 | : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0) | |
58 | : "memory"); | |
59 | ||
60 | return err; | |
61 | } | |
62 | ||
c37b5efe | 63 | static inline int xsave_user(struct xsave_struct __user *buf) |
9dc89c0f SS |
64 | { |
65 | int err; | |
8e221b6d SS |
66 | |
67 | /* | |
68 | * Clear the xsave header first, so that reserved fields are | |
69 | * initialized to zero. | |
70 | */ | |
71 | err = __clear_user(&buf->xsave_hdr, | |
72 | sizeof(struct xsave_hdr_struct)); | |
73 | if (unlikely(err)) | |
74 | return -EFAULT; | |
75 | ||
9dc89c0f SS |
76 | __asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n" |
77 | "2:\n" | |
78 | ".section .fixup,\"ax\"\n" | |
79 | "3: movl $-1,%[err]\n" | |
80 | " jmp 2b\n" | |
81 | ".previous\n" | |
7a040a43 | 82 | _ASM_EXTABLE(1b,3b) |
9dc89c0f SS |
83 | : [err] "=r" (err) |
84 | : "D" (buf), "a" (-1), "d" (-1), "0" (0) | |
85 | : "memory"); | |
9dc89c0f SS |
86 | return err; |
87 | } | |
88 | ||
6152e4b1 | 89 | static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask) |
9dc89c0f SS |
90 | { |
91 | int err; | |
92 | struct xsave_struct *xstate = ((__force struct xsave_struct *)buf); | |
6152e4b1 PA |
93 | u32 lmask = mask; |
94 | u32 hmask = mask >> 32; | |
9dc89c0f SS |
95 | |
96 | __asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n" | |
97 | "2:\n" | |
98 | ".section .fixup,\"ax\"\n" | |
99 | "3: movl $-1,%[err]\n" | |
100 | " jmp 2b\n" | |
101 | ".previous\n" | |
7a040a43 | 102 | _ASM_EXTABLE(1b,3b) |
9dc89c0f SS |
103 | : [err] "=r" (err) |
104 | : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0) | |
105 | : "memory"); /* memory required? */ | |
106 | return err; | |
107 | } | |
108 | ||
6152e4b1 | 109 | static inline void xrstor_state(struct xsave_struct *fx, u64 mask) |
9dc89c0f | 110 | { |
6152e4b1 PA |
111 | u32 lmask = mask; |
112 | u32 hmask = mask >> 32; | |
113 | ||
9dc89c0f SS |
114 | asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t" |
115 | : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) | |
116 | : "memory"); | |
117 | } | |
118 | ||
29104e10 SS |
119 | static inline void xsave_state(struct xsave_struct *fx, u64 mask) |
120 | { | |
121 | u32 lmask = mask; | |
122 | u32 hmask = mask >> 32; | |
123 | ||
124 | asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t" | |
125 | : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) | |
126 | : "memory"); | |
127 | } | |
128 | ||
86603283 | 129 | static inline void fpu_xsave(struct fpu *fpu) |
b359e8a4 SS |
130 | { |
131 | /* This, however, we can work around by forcing the compiler to select | |
132 | an addressing mode that doesn't require extended registers. */ | |
6bad06b7 SS |
133 | alternative_input( |
134 | ".byte " REX_PREFIX "0x0f,0xae,0x27", | |
135 | ".byte " REX_PREFIX "0x0f,0xae,0x37", | |
136 | X86_FEATURE_XSAVEOPT, | |
137 | [fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) : | |
138 | "memory"); | |
b359e8a4 | 139 | } |
dc1e35c6 | 140 | #endif |