Merge tag 'pull-nios2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux-2.6-block.git] / arch / x86 / include / asm / x86_init.h
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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2#ifndef _ASM_X86_PLATFORM_H
3#define _ASM_X86_PLATFORM_H
4
47a3d5da 5#include <asm/bootparam.h>
030cb6c0 6
f6a9f8a4 7struct ghcb;
52fdb568 8struct mpc_bus;
fd6c6661 9struct mpc_cpu;
f6a9f8a4 10struct pt_regs;
72302142 11struct mpc_table;
64be4c1c 12struct cpuinfo_x86;
6b15ffa0 13struct irq_domain;
fd6c6661 14
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15/**
16 * struct x86_init_mpparse - platform specific mpparse ops
de934103 17 * @setup_ioapic_ids: platform specific ioapic id override
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18 * @find_smp_config: find the smp configuration
19 * @get_smp_config: get the smp configuration
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20 */
21struct x86_init_mpparse {
de934103 22 void (*setup_ioapic_ids)(void);
b24c2a92 23 void (*find_smp_config)(void);
b3f1b617 24 void (*get_smp_config)(unsigned int early);
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25};
26
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27/**
28 * struct x86_init_resources - platform specific resource related ops
29 * @probe_roms: probe BIOS roms
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30 * @reserve_resources: reserve the standard resources for the
31 * platform
6b18ae3e 32 * @memory_setup: platform specific memory setup
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33 *
34 */
35struct x86_init_resources {
36 void (*probe_roms)(void);
8fee697d 37 void (*reserve_resources)(void);
6b18ae3e 38 char *(*memory_setup)(void);
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39};
40
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41/**
42 * struct x86_init_irqs - platform specific interrupt setup
43 * @pre_vector_init: init code to run before interrupt vectors
44 * are set up.
66bcaf0b 45 * @intr_init: interrupt init code
97992387 46 * @intr_mode_select: interrupt delivery mode selection
34fba3e6 47 * @intr_mode_init: interrupt delivery mode setup
6b15ffa0 48 * @create_pci_msi_domain: Create the PCI/MSI interrupt domain
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49 */
50struct x86_init_irqs {
51 void (*pre_vector_init)(void);
66bcaf0b 52 void (*intr_init)(void);
97992387 53 void (*intr_mode_select)(void);
34fba3e6 54 void (*intr_mode_init)(void);
6b15ffa0 55 struct irq_domain *(*create_pci_msi_domain)(void);
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56};
57
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58/**
59 * struct x86_init_oem - oem platform specific customizing functions
22d3c0d6 60 * @arch_setup: platform specific architecture setup
6f30c1ac 61 * @banner: print a platform specific banner
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62 */
63struct x86_init_oem {
64 void (*arch_setup)(void);
6f30c1ac 65 void (*banner)(void);
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66};
67
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68/**
69 * struct x86_init_paging - platform specific paging functions
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70 * @pagetable_init: platform specific paging initialization call to setup
71 * the kernel pagetables and prepare accessors functions.
72 * Callback must call paging_init(). Called once after the
73 * direct mapping for phys memory is available.
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74 */
75struct x86_init_paging {
7737b215 76 void (*pagetable_init)(void);
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77};
78
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79/**
80 * struct x86_init_timers - platform specific timer setup
81 * @setup_perpcu_clockev: set up the per cpu clock event device for the
82 * boot cpu
845b3944 83 * @timer_init: initialize the platform timer (default PIT/HPET)
6b617e22 84 * @wallclock_init: init the wallclock device
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85 */
86struct x86_init_timers {
87 void (*setup_percpu_clockev)(void);
845b3944 88 void (*timer_init)(void);
6b617e22 89 void (*wallclock_init)(void);
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90};
91
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92/**
93 * struct x86_init_iommu - platform specific iommu setup
94 * @iommu_init: platform specific iommu setup
95 */
96struct x86_init_iommu {
97 int (*iommu_init)(void);
98};
99
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100/**
101 * struct x86_init_pci - platform specific pci init functions
102 * @arch_init: platform specific pci arch init call
103 * @init: platform specific pci subsystem init
ab3b3793 104 * @init_irq: platform specific pci irq init
9325a28c 105 * @fixup_irqs: platform specific pci irq fixup
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106 */
107struct x86_init_pci {
4fb6088a 108 int (*arch_init)(void);
b72d0db9 109 int (*init)(void);
ab3b3793 110 void (*init_irq)(void);
9325a28c 111 void (*fixup_irqs)(void);
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112};
113
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114/**
115 * struct x86_hyper_init - x86 hypervisor init functions
116 * @init_platform: platform setup
f3614646 117 * @guest_late_init: guest late init
f72e38e8 118 * @x2apic_available: X2APIC detection
ab0f59c6 119 * @msi_ext_dest_id: MSI supports 15-bit APIC IDs
f72e38e8 120 * @init_mem_mapping: setup early mappings during init_mem_mapping()
6f84f8d1 121 * @init_after_bootmem: guest init after boot allocator is finished
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122 */
123struct x86_hyper_init {
124 void (*init_platform)(void);
f3614646 125 void (*guest_late_init)(void);
f72e38e8 126 bool (*x2apic_available)(void);
ab0f59c6 127 bool (*msi_ext_dest_id)(void);
f72e38e8 128 void (*init_mem_mapping)(void);
6f84f8d1 129 void (*init_after_bootmem)(void);
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130};
131
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132/**
133 * struct x86_init_acpi - x86 ACPI init functions
41fa1ee9 134 * @set_root_poitner: set RSDP address
038bac2b 135 * @get_root_pointer: get RSDP address
81b53e5f 136 * @reduced_hw_early_init: hardware reduced platform early init
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137 */
138struct x86_init_acpi {
41fa1ee9 139 void (*set_root_pointer)(u64 addr);
038bac2b 140 u64 (*get_root_pointer)(void);
81b53e5f 141 void (*reduced_hw_early_init)(void);
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142};
143
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144/**
145 * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc.
146 *
147 * @enc_status_change_prepare Notify HV before the encryption status of a range is changed
148 * @enc_status_change_finish Notify HV after the encryption status of a range is changed
149 * @enc_tlb_flush_required Returns true if a TLB flush is needed before changing page encryption status
150 * @enc_cache_flush_required Returns true if a cache flush is needed before changing page encryption status
151 */
152struct x86_guest {
153 void (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc);
154 bool (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc);
155 bool (*enc_tlb_flush_required)(bool enc);
156 bool (*enc_cache_flush_required)(void);
157};
158
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159/**
160 * struct x86_init_ops - functions for platform specific setup
161 *
162 */
163struct x86_init_ops {
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164 struct x86_init_resources resources;
165 struct x86_init_mpparse mpparse;
d9112f43 166 struct x86_init_irqs irqs;
42bbdb43 167 struct x86_init_oem oem;
030cb6c0 168 struct x86_init_paging paging;
736decac 169 struct x86_init_timers timers;
d07c1be0 170 struct x86_init_iommu iommu;
b72d0db9 171 struct x86_init_pci pci;
f72e38e8 172 struct x86_hyper_init hyper;
038bac2b 173 struct x86_init_acpi acpi;
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174};
175
176/**
177 * struct x86_cpuinit_ops - platform specific cpu hotplug setups
178 * @setup_percpu_clockev: set up the per cpu clock event device
df156f90 179 * @early_percpu_clock_init: early init of the per cpu clock event device
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180 */
181struct x86_cpuinit_ops {
182 void (*setup_percpu_clockev)(void);
df156f90 183 void (*early_percpu_clock_init)(void);
64be4c1c 184 void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
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185};
186
e27c4929 187struct timespec64;
3565184e 188
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189/**
190 * struct x86_legacy_devices - legacy x86 devices
191 *
192 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
193 * is known to never have a PNPBIOS.
194 *
195 * These are devices known to require LPC or ISA bus. The definition of legacy
196 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
197 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
198 * the LPC or ISA bus. User visible devices are devices that have end-user
199 * accessible connectors (for example, LPT parallel port). Legacy devices on
200 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
201 * / mouse, and the floppy disk controller. A system that lacks all known
202 * legacy devices can assume all devices can be detected exclusively via
203 * standard device enumeration mechanisms including the ACPI namespace.
204 *
205 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
206 * have any of the legacy devices enumerated below present.
207 */
208struct x86_legacy_devices {
209 int pnpbios;
210};
211
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212/**
213 * enum x86_legacy_i8042_state - i8042 keyboard controller state
214 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
215 * given platform/subarch.
216 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
217 * is absent.
218 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
219 * present, the i8042 driver should probe for controller existence.
220 */
221enum x86_legacy_i8042_state {
222 X86_LEGACY_I8042_PLATFORM_ABSENT,
223 X86_LEGACY_I8042_FIRMWARE_ABSENT,
224 X86_LEGACY_I8042_EXPECTED_PRESENT,
225};
226
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227/**
228 * struct x86_legacy_features - legacy x86 features
229 *
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230 * @i8042: indicated if we expect the device to have i8042 controller
231 * present.
8d152e7a 232 * @rtc: this device has a CMOS real-time clock present
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233 * @reserve_bios_regions: boot code will search for the EBDA address and the
234 * start of the 640k - 1M BIOS region. If false, the platform must
235 * ensure that its memory map correctly reserves sub-1MB regions as needed.
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236 * @devices: legacy x86 devices, refer to struct x86_legacy_devices
237 * documentation for further details.
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238 */
239struct x86_legacy_features {
93ffa9a4 240 enum x86_legacy_i8042_state i8042;
8d152e7a 241 int rtc;
e348caef 242 int warm_reset;
6d730525 243 int no_vga;
edce2121 244 int reserve_bios_regions;
80dfd83d 245 struct x86_legacy_devices devices;
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246};
247
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248/**
249 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
250 *
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251 * @pin_vcpu: pin current vcpu to specified physical
252 * cpu (run rarely)
253 * @sev_es_hcall_prepare: Load additional hypervisor-specific
254 * state into the GHCB when doing a VMMCALL under
255 * SEV-ES. Called from the #VC exception handler.
256 * @sev_es_hcall_finish: Copies state from the GHCB back into the
257 * processor (or pt_regs). Also runs checks on the
258 * state returned from the hypervisor after a
259 * VMMCALL under SEV-ES. Needs to return 'false'
260 * if the checks fail. Called from the #VC
261 * exception handler.
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262 */
263struct x86_hyper_runtime {
264 void (*pin_vcpu)(int cpu);
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265 void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs);
266 bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs);
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267};
268
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269/**
270 * struct x86_platform_ops - platform specific runtime functions
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271 * @calibrate_cpu: calibrate CPU
272 * @calibrate_tsc: calibrate TSC, if different from CPU
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273 * @get_wallclock: get time from HW clock like RTC etc.
274 * @set_wallclock: set time back to HW clock
eb41c8be 275 * @is_untracked_pat_range exclude from PAT logic
78c06176 276 * @nmi_init enable NMI on cpus
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277 * @save_sched_clock_state: save state for sched_clock() on suspend
278 * @restore_sched_clock_state: restore state for sched_clock() on resume
22d3c0d6 279 * @apic_post_init: adjust apic if needed
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280 * @legacy: legacy features
281 * @set_legacy_features: override legacy features. Use of this callback
282 * is highly discouraged. You should only need
283 * this if your hardware platform requires further
22d3c0d6 284 * custom fine tuning far beyond what may be
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285 * possible in x86_early_init_platform_quirks() by
286 * only using the current x86_hardware_subarch
287 * semantics.
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288 * @realmode_reserve: reserve memory for realmode trampoline
289 * @realmode_init: initialize realmode trampoline
f72e38e8 290 * @hyper: x86 hypervisor specific runtime callbacks
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291 */
292struct x86_platform_ops {
aa297292 293 unsigned long (*calibrate_cpu)(void);
2d826404 294 unsigned long (*calibrate_tsc)(void);
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295 void (*get_wallclock)(struct timespec64 *ts);
296 int (*set_wallclock)(const struct timespec64 *ts);
338bac52 297 void (*iommu_shutdown)(void);
eb41c8be 298 bool (*is_untracked_pat_range)(u64 start, u64 end);
78c06176 299 void (*nmi_init)(void);
064a59b6 300 unsigned char (*get_nmi_reason)(void);
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301 void (*save_sched_clock_state)(void);
302 void (*restore_sched_clock_state)(void);
7db971b2 303 void (*apic_post_init)(void);
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304 struct x86_legacy_features legacy;
305 void (*set_legacy_features)(void);
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306 void (*realmode_reserve)(void);
307 void (*realmode_init)(void);
f72e38e8 308 struct x86_hyper_runtime hyper;
1e8c5971 309 struct x86_guest guest;
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310};
311
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312struct x86_apic_ops {
313 unsigned int (*io_apic_read) (unsigned int apic, unsigned int reg);
314 void (*restore)(void);
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315};
316
57844a8f 317extern struct x86_init_ops x86_init;
736decac 318extern struct x86_cpuinit_ops x86_cpuinit;
2d826404 319extern struct x86_platform_ops x86_platform;
294ee6f8 320extern struct x86_msi_ops x86_msi;
51b146c5 321extern struct x86_apic_ops x86_apic_ops;
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322
323extern void x86_early_init_platform_quirks(void);
57844a8f 324extern void x86_init_noop(void);
f4848472 325extern void x86_init_uint_noop(unsigned int unused);
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326extern bool bool_x86_init_noop(void);
327extern void x86_op_int_noop(int cpu);
f79b1c57 328extern bool x86_pnpbios_disabled(void);
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329
330#endif