Merge patch series "Prepare for upstreaming Pixel 6 and 7 UFS support"
[linux-2.6-block.git] / arch / x86 / include / asm / smp.h
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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2#ifndef _ASM_X86_SMP_H
3#define _ASM_X86_SMP_H
c27cfeff 4#ifndef __ASSEMBLY__
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5#include <linux/cpumask.h>
6
fb8fd077 7#include <asm/cpumask.h>
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8#include <asm/current.h>
9#include <asm/thread_info.h>
b23dab08 10
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11extern int smp_num_siblings;
12extern unsigned int num_processors;
c27cfeff 13
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14DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
15DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map);
2e4c54da 16DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_die_map);
b3d7336d 17/* cpus sharing the last level cache: */
0816b0f0 18DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);
66558b73 19DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_l2c_shared_map);
0816b0f0 20DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id);
66558b73 21DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_l2c_id);
23ca4bba 22
0816b0f0 23DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid);
3e9e57fa 24DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid);
0816b0f0 25DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);
4e62445b 26#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
0816b0f0 27DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid);
4c321ff8 28#endif
7e1efc0c 29
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30struct task_struct;
31
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32struct smp_ops {
33 void (*smp_prepare_boot_cpu)(void);
34 void (*smp_prepare_cpus)(unsigned max_cpus);
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35 void (*smp_cpus_done)(unsigned max_cpus);
36
76fac077 37 void (*stop_other_cpus)(int wait);
0ee59413 38 void (*crash_stop_other_cpus)(void);
16694024 39 void (*smp_send_reschedule)(int cpu);
3b16cf87 40
5cdaf183 41 int (*cpu_up)(unsigned cpu, struct task_struct *tidle);
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42 int (*cpu_disable)(void);
43 void (*cpu_die)(unsigned int cpu);
44 void (*play_dead)(void);
45
bcda016e 46 void (*send_call_func_ipi)(const struct cpumask *mask);
3b16cf87 47 void (*send_call_func_single_ipi)(int cpu);
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48};
49
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50/* Globals due to paravirt */
51extern void set_cpu_sibling_map(int cpu);
52
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53#ifdef CONFIG_SMP
54extern struct smp_ops smp_ops;
8678969e 55
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56static inline void smp_send_stop(void)
57{
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58 smp_ops.stop_other_cpus(0);
59}
60
61static inline void stop_other_cpus(void)
62{
63 smp_ops.stop_other_cpus(1);
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64}
65
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66static inline void smp_prepare_boot_cpu(void)
67{
68 smp_ops.smp_prepare_boot_cpu();
69}
70
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71static inline void smp_prepare_cpus(unsigned int max_cpus)
72{
73 smp_ops.smp_prepare_cpus(max_cpus);
74}
75
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76static inline void smp_cpus_done(unsigned int max_cpus)
77{
78 smp_ops.smp_cpus_done(max_cpus);
79}
80
8239c25f 81static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle)
71d19549 82{
5cdaf183 83 return smp_ops.cpu_up(cpu, tidle);
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84}
85
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86static inline int __cpu_disable(void)
87{
88 return smp_ops.cpu_disable();
89}
90
91static inline void __cpu_die(unsigned int cpu)
92{
93 smp_ops.cpu_die(cpu);
94}
95
96static inline void play_dead(void)
97{
98 smp_ops.play_dead();
99}
100
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101static inline void smp_send_reschedule(int cpu)
102{
103 smp_ops.smp_send_reschedule(cpu);
104}
64b1a21e 105
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106static inline void arch_send_call_function_single_ipi(int cpu)
107{
108 smp_ops.send_call_func_single_ipi(cpu);
109}
110
b643deca 111static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
64b1a21e 112{
b643deca 113 smp_ops.send_call_func_ipi(mask);
64b1a21e 114}
71d19549 115
8227dce7 116void cpu_disable_common(void);
1e3fac83 117void native_smp_prepare_boot_cpu(void);
ce2612b6 118void smp_prepare_cpus_common(void);
7557da67 119void native_smp_prepare_cpus(unsigned int max_cpus);
63e708f8 120void calculate_max_logical_packages(void);
c5597649 121void native_smp_cpus_done(unsigned int max_cpus);
66c7ceb4 122int common_cpu_up(unsigned int cpunum, struct task_struct *tidle);
5cdaf183 123int native_cpu_up(unsigned int cpunum, struct task_struct *tidle);
93be71b6 124int native_cpu_disable(void);
2a442c9c 125int common_cpu_die(unsigned int cpu);
93be71b6 126void native_cpu_die(unsigned int cpu);
406f992e 127void hlt_play_dead(void);
93be71b6 128void native_play_dead(void);
a21f5d88 129void play_dead_common(void);
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130void wbinvd_on_cpu(int cpu);
131int wbinvd_on_all_cpus(void);
fa26d0c7 132void cond_wakeup_cpu0(void);
93be71b6 133
d0a7166b 134void native_smp_send_reschedule(int cpu);
bcda016e 135void native_send_call_func_ipi(const struct cpumask *mask);
3b16cf87 136void native_send_call_func_single_ipi(int cpu);
7eb43a6d 137void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle);
93b016f8 138
30106c17 139void smp_store_boot_cpu_info(void);
1d89a7f0 140void smp_store_cpu_info(int id);
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141
142asmlinkage __visible void smp_reboot_interrupt(void);
143__visible void smp_reschedule_interrupt(struct pt_regs *regs);
144__visible void smp_call_function_interrupt(struct pt_regs *regs);
145__visible void smp_call_function_single_interrupt(struct pt_regs *r);
146
c70dcb74 147#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
3e9e57fa 148#define cpu_acpi_id(cpu) per_cpu(x86_cpu_to_acpiid, cpu)
a9c057c1 149
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150/*
151 * This function is needed by all SMP systems. It must _always_ be valid
7443b296 152 * from the initial startup.
0f08c3b2 153 */
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154#define raw_smp_processor_id() this_cpu_read(pcpu_hot.cpu_number)
155#define __smp_processor_id() __this_cpu_read(pcpu_hot.cpu_number)
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156
157#ifdef CONFIG_X86_32
158extern int safe_smp_processor_id(void);
159#else
160# define safe_smp_processor_id() smp_processor_id()
161#endif
162
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163static inline struct cpumask *cpu_llc_shared_mask(int cpu)
164{
165 return per_cpu(cpu_llc_shared_map, cpu);
166}
167
168static inline struct cpumask *cpu_l2c_shared_mask(int cpu)
169{
170 return per_cpu(cpu_l2c_shared_map, cpu);
171}
172
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173#else /* !CONFIG_SMP */
174#define wbinvd_on_cpu(cpu) wbinvd()
175static inline int wbinvd_on_all_cpus(void)
176{
177 wbinvd();
178 return 0;
179}
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180
181static inline struct cpumask *cpu_llc_shared_mask(int cpu)
182{
183 return (struct cpumask *)cpumask_of(0);
184}
14adf855 185#endif /* CONFIG_SMP */
a9c057c1 186
148f9bb8 187extern unsigned disabled_cpus;
2fe60147 188
1b000843 189#ifdef CONFIG_X86_LOCAL_APIC
1b000843 190extern int hard_smp_processor_id(void);
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191
192#else /* CONFIG_X86_LOCAL_APIC */
7b6e1062 193#define hard_smp_processor_id() 0
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194#endif /* CONFIG_X86_LOCAL_APIC */
195
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196#ifdef CONFIG_DEBUG_NMI_SELFTEST
197extern void nmi_selftest(void);
198#else
199#define nmi_selftest() do { } while (0)
200#endif
201
c27cfeff 202#endif /* __ASSEMBLY__ */
1965aae3 203#endif /* _ASM_X86_SMP_H */