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29dcc60f JR |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * AMD Encrypted Register State Support | |
4 | * | |
5 | * Author: Joerg Roedel <jroedel@suse.de> | |
6 | */ | |
7 | ||
8 | #ifndef __ASM_ENCRYPTED_STATE_H | |
9 | #define __ASM_ENCRYPTED_STATE_H | |
10 | ||
11 | #include <linux/types.h> | |
0144e3b8 DG |
12 | #include <linux/sev-guest.h> |
13 | ||
597cfe48 | 14 | #include <asm/insn.h> |
b81fc74d | 15 | #include <asm/sev-common.h> |
c01fce9c | 16 | #include <asm/bootparam.h> |
f710ac54 | 17 | #include <asm/coco.h> |
29dcc60f | 18 | |
2ea29c5a | 19 | #define GHCB_PROTOCOL_MIN 1ULL |
cbd3d4f7 | 20 | #define GHCB_PROTOCOL_MAX 2ULL |
b81fc74d | 21 | #define GHCB_DEFAULT_USAGE 0ULL |
29dcc60f | 22 | |
29dcc60f JR |
23 | #define VMGEXIT() { asm volatile("rep; vmmcall\n\r"); } |
24 | ||
597cfe48 JR |
25 | enum es_result { |
26 | ES_OK, /* All good */ | |
27 | ES_UNSUPPORTED, /* Requested operation not supported */ | |
28 | ES_VMM_ERROR, /* Unexpected state from the VMM */ | |
29 | ES_DECODE_FAILED, /* Instruction decoding failed */ | |
30 | ES_EXCEPTION, /* Instruction caused exception */ | |
31 | ES_RETRY, /* Retry instruction emulation */ | |
32 | }; | |
33 | ||
34 | struct es_fault_info { | |
35 | unsigned long vector; | |
36 | unsigned long error_code; | |
37 | unsigned long cr2; | |
38 | }; | |
39 | ||
40 | struct pt_regs; | |
41 | ||
42 | /* ES instruction emulation context */ | |
43 | struct es_em_ctxt { | |
44 | struct pt_regs *regs; | |
45 | struct insn insn; | |
46 | struct es_fault_info fi; | |
47 | }; | |
48 | ||
5ea98e01 BS |
49 | /* |
50 | * AMD SEV Confidential computing blob structure. The structure is | |
51 | * defined in OVMF UEFI firmware header: | |
52 | * https://github.com/tianocore/edk2/blob/master/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h | |
53 | */ | |
54 | #define CC_BLOB_SEV_HDR_MAGIC 0x45444d41 | |
55 | struct cc_blob_sev_info { | |
56 | u32 magic; | |
57 | u16 version; | |
58 | u16 reserved; | |
59 | u64 secrets_phys; | |
60 | u32 secrets_len; | |
61 | u32 rsvd1; | |
62 | u64 cpuid_phys; | |
63 | u32 cpuid_len; | |
64 | u32 rsvd2; | |
65 | } __packed; | |
66 | ||
29dcc60f JR |
67 | void do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code); |
68 | ||
69 | static inline u64 lower_bits(u64 val, unsigned int bits) | |
70 | { | |
71 | u64 mask = (1ULL << bits) - 1; | |
72 | ||
73 | return (val & mask); | |
74 | } | |
75 | ||
8940ac9c TL |
76 | struct real_mode_header; |
77 | enum stack_type; | |
78 | ||
74d8d9d5 JR |
79 | /* Early IDT entry points for #VC handler */ |
80 | extern void vc_no_ghcb(void); | |
1aa9aa8e JR |
81 | extern void vc_boot_ghcb(void); |
82 | extern bool handle_vc_boot_ghcb(struct pt_regs *regs); | |
74d8d9d5 | 83 | |
15d90887 TL |
84 | /* PVALIDATE return codes */ |
85 | #define PVALIDATE_FAIL_SIZEMISMATCH 6 | |
86 | ||
0bd6f1e5 BS |
87 | /* Software defined (when rFlags.CF = 1) */ |
88 | #define PVALIDATE_FAIL_NOUPDATE 255 | |
89 | ||
2c35819e BS |
90 | /* RMUPDATE detected 4K page and 2MB page overlap. */ |
91 | #define RMPUPDATE_FAIL_OVERLAP 4 | |
92 | ||
81cc3df9 BS |
93 | /* RMP page size */ |
94 | #define RMP_PG_SIZE_4K 0 | |
15d90887 | 95 | #define RMP_PG_SIZE_2M 1 |
94b36bc2 | 96 | #define RMP_TO_PG_LEVEL(level) (((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M) |
2c35819e BS |
97 | #define PG_LEVEL_TO_RMP(level) (((level) == PG_LEVEL_4K) ? RMP_PG_SIZE_4K : RMP_PG_SIZE_2M) |
98 | ||
99 | struct rmp_state { | |
100 | u64 gpa; | |
101 | u8 assigned; | |
102 | u8 pagesize; | |
103 | u8 immutable; | |
104 | u8 rsvd; | |
105 | u32 asid; | |
106 | } __packed; | |
81cc3df9 | 107 | |
0afb6b66 TL |
108 | #define RMPADJUST_VMSA_PAGE_BIT BIT(16) |
109 | ||
d5af44dd BS |
110 | /* SNP Guest message request */ |
111 | struct snp_req_data { | |
112 | unsigned long req_gpa; | |
113 | unsigned long resp_gpa; | |
114 | unsigned long data_gpa; | |
115 | unsigned int data_npages; | |
116 | }; | |
117 | ||
2bf93ffb | 118 | struct sev_guest_platform_data { |
3a45b375 BS |
119 | u64 secrets_gpa; |
120 | }; | |
121 | ||
c2106a23 BS |
122 | /* |
123 | * The secrets page contains 96-bytes of reserved field that can be used by | |
124 | * the guest OS. The guest OS uses the area to save the message sequence | |
125 | * number for each VMPCK. | |
126 | * | |
127 | * See the GHCB spec section Secret page layout for the format for this area. | |
128 | */ | |
129 | struct secrets_os_area { | |
130 | u32 msg_seqno_0; | |
131 | u32 msg_seqno_1; | |
132 | u32 msg_seqno_2; | |
133 | u32 msg_seqno_3; | |
134 | u64 ap_jump_table_pa; | |
135 | u8 rsvd[40]; | |
136 | u8 guest_usage[32]; | |
137 | } __packed; | |
138 | ||
139 | #define VMPCK_KEY_LEN 32 | |
140 | ||
141 | /* See the SNP spec version 0.9 for secrets page format */ | |
142 | struct snp_secrets_page_layout { | |
143 | u32 version; | |
144 | u32 imien : 1, | |
145 | rsvd1 : 31; | |
146 | u32 fms; | |
147 | u32 rsvd2; | |
148 | u8 gosvw[16]; | |
149 | u8 vmpck0[VMPCK_KEY_LEN]; | |
150 | u8 vmpck1[VMPCK_KEY_LEN]; | |
151 | u8 vmpck2[VMPCK_KEY_LEN]; | |
152 | u8 vmpck3[VMPCK_KEY_LEN]; | |
153 | struct secrets_os_area os_area; | |
154 | u8 rsvd3[3840]; | |
155 | } __packed; | |
156 | ||
315562c9 | 157 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
315562c9 JR |
158 | extern void __sev_es_ist_enter(struct pt_regs *regs); |
159 | extern void __sev_es_ist_exit(void); | |
160 | static __always_inline void sev_es_ist_enter(struct pt_regs *regs) | |
161 | { | |
f710ac54 BPA |
162 | if (cc_vendor == CC_VENDOR_AMD && |
163 | cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) | |
315562c9 JR |
164 | __sev_es_ist_enter(regs); |
165 | } | |
166 | static __always_inline void sev_es_ist_exit(void) | |
167 | { | |
f710ac54 BPA |
168 | if (cc_vendor == CC_VENDOR_AMD && |
169 | cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) | |
315562c9 JR |
170 | __sev_es_ist_exit(); |
171 | } | |
8940ac9c | 172 | extern int sev_es_setup_ap_jump_table(struct real_mode_header *rmh); |
4ca68e02 JR |
173 | extern void __sev_es_nmi_complete(void); |
174 | static __always_inline void sev_es_nmi_complete(void) | |
175 | { | |
f710ac54 BPA |
176 | if (cc_vendor == CC_VENDOR_AMD && |
177 | cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) | |
4ca68e02 JR |
178 | __sev_es_nmi_complete(); |
179 | } | |
39336f4f | 180 | extern int __init sev_es_efi_map_ghcbs(pgd_t *pgd); |
a1b87d54 | 181 | extern void sev_enable(struct boot_params *bp); |
5bb6c1d1 | 182 | |
81cc3df9 BS |
183 | static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) |
184 | { | |
185 | int rc; | |
186 | ||
187 | /* "rmpadjust" mnemonic support in binutils 2.36 and newer */ | |
188 | asm volatile(".byte 0xF3,0x0F,0x01,0xFE\n\t" | |
189 | : "=a"(rc) | |
190 | : "a"(vaddr), "c"(rmp_psize), "d"(attrs) | |
191 | : "memory", "cc"); | |
192 | ||
193 | return rc; | |
194 | } | |
0bd6f1e5 BS |
195 | static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) |
196 | { | |
197 | bool no_rmpupdate; | |
198 | int rc; | |
199 | ||
200 | /* "pvalidate" mnemonic support in binutils 2.36 and newer */ | |
201 | asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t" | |
202 | CC_SET(c) | |
203 | : CC_OUT(c) (no_rmpupdate), "=a"(rc) | |
204 | : "a"(vaddr), "c"(rmp_psize), "d"(validate) | |
205 | : "memory", "cc"); | |
206 | ||
207 | if (no_rmpupdate) | |
208 | return PVALIDATE_FAIL_NOUPDATE; | |
209 | ||
210 | return rc; | |
211 | } | |
0144e3b8 DG |
212 | |
213 | struct snp_guest_request_ioctl; | |
214 | ||
95d33bfa | 215 | void setup_ghcb(void); |
5e5ccff6 | 216 | void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, |
5dee19b6 | 217 | unsigned long npages); |
5e5ccff6 | 218 | void __init early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, |
5dee19b6 | 219 | unsigned long npages); |
5e5ccff6 | 220 | void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op); |
5dee19b6 TL |
221 | void snp_set_memory_shared(unsigned long vaddr, unsigned long npages); |
222 | void snp_set_memory_private(unsigned long vaddr, unsigned long npages); | |
0afb6b66 | 223 | void snp_set_wakeup_secondary_cpu(void); |
c01fce9c | 224 | bool snp_init(struct boot_params *bp); |
c93c296f | 225 | void __init __noreturn snp_abort(void); |
0144e3b8 | 226 | int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio); |
6c321179 | 227 | void snp_accept_memory(phys_addr_t start, phys_addr_t end); |
31c77a50 AB |
228 | u64 snp_get_unsupported_features(u64 status); |
229 | u64 sev_get_status(void); | |
315562c9 JR |
230 | #else |
231 | static inline void sev_es_ist_enter(struct pt_regs *regs) { } | |
232 | static inline void sev_es_ist_exit(void) { } | |
8940ac9c | 233 | static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; } |
4ca68e02 | 234 | static inline void sev_es_nmi_complete(void) { } |
39336f4f | 235 | static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; } |
a1b87d54 | 236 | static inline void sev_enable(struct boot_params *bp) { } |
0bd6f1e5 | 237 | static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; } |
81cc3df9 | 238 | static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) { return 0; } |
95d33bfa | 239 | static inline void setup_ghcb(void) { } |
5e5ccff6 | 240 | static inline void __init |
5dee19b6 | 241 | early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, unsigned long npages) { } |
5e5ccff6 | 242 | static inline void __init |
5dee19b6 | 243 | early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, unsigned long npages) { } |
5e5ccff6 | 244 | static inline void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op) { } |
5dee19b6 TL |
245 | static inline void snp_set_memory_shared(unsigned long vaddr, unsigned long npages) { } |
246 | static inline void snp_set_memory_private(unsigned long vaddr, unsigned long npages) { } | |
0afb6b66 | 247 | static inline void snp_set_wakeup_secondary_cpu(void) { } |
c01fce9c | 248 | static inline bool snp_init(struct boot_params *bp) { return false; } |
b190a043 | 249 | static inline void snp_abort(void) { } |
0144e3b8 | 250 | static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio) |
d5af44dd BS |
251 | { |
252 | return -ENOTTY; | |
253 | } | |
6c321179 TL |
254 | |
255 | static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) { } | |
31c77a50 AB |
256 | static inline u64 snp_get_unsupported_features(u64 status) { return 0; } |
257 | static inline u64 sev_get_status(void) { return 0; } | |
315562c9 JR |
258 | #endif |
259 | ||
216d106c BS |
260 | #ifdef CONFIG_KVM_AMD_SEV |
261 | bool snp_probe_rmptable_info(void); | |
94b36bc2 | 262 | int snp_lookup_rmpentry(u64 pfn, bool *assigned, int *level); |
1f568d36 | 263 | void snp_dump_hva_rmpentry(unsigned long address); |
2c35819e BS |
264 | int psmash(u64 pfn); |
265 | int rmp_make_private(u64 pfn, u64 gpa, enum pg_level level, u32 asid, bool immutable); | |
266 | int rmp_make_shared(u64 pfn, enum pg_level level); | |
8dac6429 | 267 | void snp_leak_pages(u64 pfn, unsigned int npages); |
216d106c BS |
268 | #else |
269 | static inline bool snp_probe_rmptable_info(void) { return false; } | |
94b36bc2 | 270 | static inline int snp_lookup_rmpentry(u64 pfn, bool *assigned, int *level) { return -ENODEV; } |
1f568d36 | 271 | static inline void snp_dump_hva_rmpentry(unsigned long address) {} |
2c35819e BS |
272 | static inline int psmash(u64 pfn) { return -ENODEV; } |
273 | static inline int rmp_make_private(u64 pfn, u64 gpa, enum pg_level level, u32 asid, | |
274 | bool immutable) | |
275 | { | |
276 | return -ENODEV; | |
277 | } | |
278 | static inline int rmp_make_shared(u64 pfn, enum pg_level level) { return -ENODEV; } | |
8dac6429 | 279 | static inline void snp_leak_pages(u64 pfn, unsigned int npages) {} |
216d106c BS |
280 | #endif |
281 | ||
29dcc60f | 282 | #endif |