[linux-2.6-block.git] / arch / x86 / include / asm / sev.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * AMD Encrypted Register State Support
 *
 * Author: Joerg Roedel <jroedel@suse.de>
 */

#ifndef __ASM_ENCRYPTED_STATE_H
#define __ASM_ENCRYPTED_STATE_H

#include <linux/types.h>
#include <linux/sev-guest.h>

#include <asm/insn.h>
#include <asm/sev-common.h>
#include <asm/bootparam.h>
#include <asm/coco.h>

#define GHCB_PROTOCOL_MIN	1ULL
#define GHCB_PROTOCOL_MAX	2ULL
#define GHCB_DEFAULT_USAGE	0ULL

#define	VMGEXIT()			{ asm volatile("rep; vmmcall\n\r"); }

enum es_result {
	ES_OK,			/* All good */
	ES_UNSUPPORTED,		/* Requested operation not supported */
	ES_VMM_ERROR,		/* Unexpected state from the VMM */
	ES_DECODE_FAILED,	/* Instruction decoding failed */
	ES_EXCEPTION,		/* Instruction caused exception */
	ES_RETRY,		/* Retry instruction emulation */
};

struct es_fault_info {
	unsigned long vector;
	unsigned long error_code;
	unsigned long cr2;
};

struct pt_regs;

/* ES instruction emulation context */
struct es_em_ctxt {
	struct pt_regs *regs;
	struct insn insn;
	struct es_fault_info fi;
};

/*
 * AMD SEV Confidential computing blob structure. The structure is
 * defined in OVMF UEFI firmware header:
 * https://github.com/tianocore/edk2/blob/master/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
 */
#define CC_BLOB_SEV_HDR_MAGIC	0x45444d41
struct cc_blob_sev_info {
	u32 magic;
	u16 version;
	u16 reserved;
	u64 secrets_phys;
	u32 secrets_len;
	u32 rsvd1;
	u64 cpuid_phys;
	u32 cpuid_len;
	u32 rsvd2;
} __packed;

void do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code);

static inline u64 lower_bits(u64 val, unsigned int bits)
{
	u64 mask = (1ULL << bits) - 1;

	return (val & mask);
}

struct real_mode_header;
enum stack_type;

/* Early IDT entry points for #VC handler */
extern void vc_no_ghcb(void);
extern void vc_boot_ghcb(void);
extern bool handle_vc_boot_ghcb(struct pt_regs *regs);

/* PVALIDATE return codes */
#define PVALIDATE_FAIL_SIZEMISMATCH	6

/* Software defined (when rFlags.CF = 1) */
#define PVALIDATE_FAIL_NOUPDATE		255

/* RMP page size */
#define RMP_PG_SIZE_4K			0
#define RMP_PG_SIZE_2M			1
#define RMP_TO_PG_LEVEL(level)		(((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M)

#define RMPADJUST_VMSA_PAGE_BIT		BIT(16)

/* SNP Guest message request */
struct snp_req_data {
	unsigned long req_gpa;
	unsigned long resp_gpa;
	unsigned long data_gpa;
	unsigned int data_npages;
};

struct sev_guest_platform_data {
	u64 secrets_gpa;
};

/*
 * The secrets page contains 96-bytes of reserved field that can be used by
 * the guest OS. The guest OS uses the area to save the message sequence
 * number for each VMPCK.
 *
 * See the GHCB spec section Secret page layout for the format for this area.
 */
struct secrets_os_area {
	u32 msg_seqno_0;
	u32 msg_seqno_1;
	u32 msg_seqno_2;
	u32 msg_seqno_3;
	u64 ap_jump_table_pa;
	u8 rsvd[40];
	u8 guest_usage[32];
} __packed;

#define VMPCK_KEY_LEN		32

/* See the SNP spec version 0.9 for secrets page format */
struct snp_secrets_page_layout {
	u32 version;
	u32 imien	: 1,
	    rsvd1	: 31;
	u32 fms;
	u32 rsvd2;
	u8 gosvw[16];
	u8 vmpck0[VMPCK_KEY_LEN];
	u8 vmpck1[VMPCK_KEY_LEN];
	u8 vmpck2[VMPCK_KEY_LEN];
	u8 vmpck3[VMPCK_KEY_LEN];
	struct secrets_os_area os_area;
	u8 rsvd3[3840];
} __packed;

#ifdef CONFIG_AMD_MEM_ENCRYPT
extern void __sev_es_ist_enter(struct pt_regs *regs);
extern void __sev_es_ist_exit(void);
static __always_inline void sev_es_ist_enter(struct pt_regs *regs)
{
	if (cc_vendor == CC_VENDOR_AMD &&
	    cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
		__sev_es_ist_enter(regs);
}
static __always_inline void sev_es_ist_exit(void)
{
	if (cc_vendor == CC_VENDOR_AMD &&
	    cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
		__sev_es_ist_exit();
}
extern int sev_es_setup_ap_jump_table(struct real_mode_header *rmh);
extern void __sev_es_nmi_complete(void);
static __always_inline void sev_es_nmi_complete(void)
{
	if (cc_vendor == CC_VENDOR_AMD &&
	    cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
		__sev_es_nmi_complete();
}
extern int __init sev_es_efi_map_ghcbs(pgd_t *pgd);
extern void sev_enable(struct boot_params *bp);

static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs)
{
	int rc;

	/* "rmpadjust" mnemonic support in binutils 2.36 and newer */
	asm volatile(".byte 0xF3,0x0F,0x01,0xFE\n\t"
		     : "=a"(rc)
		     : "a"(vaddr), "c"(rmp_psize), "d"(attrs)
		     : "memory", "cc");

	return rc;
}
static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate)
{
	bool no_rmpupdate;
	int rc;

	/* "pvalidate" mnemonic support in binutils 2.36 and newer */
	asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t"
		     CC_SET(c)
		     : CC_OUT(c) (no_rmpupdate), "=a"(rc)
		     : "a"(vaddr), "c"(rmp_psize), "d"(validate)
		     : "memory", "cc");

	if (no_rmpupdate)
		return PVALIDATE_FAIL_NOUPDATE;

	return rc;
}

struct snp_guest_request_ioctl;

void setup_ghcb(void);
void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,
					 unsigned long npages);
void __init early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr,
					unsigned long npages);
void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op);
void snp_set_memory_shared(unsigned long vaddr, unsigned long npages);
void snp_set_memory_private(unsigned long vaddr, unsigned long npages);
void snp_set_wakeup_secondary_cpu(void);
bool snp_init(struct boot_params *bp);
void __init __noreturn snp_abort(void);
int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio);
void snp_accept_memory(phys_addr_t start, phys_addr_t end);
u64 snp_get_unsupported_features(u64 status);
u64 sev_get_status(void);
#else
static inline void sev_es_ist_enter(struct pt_regs *regs) { }
static inline void sev_es_ist_exit(void) { }
static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; }
static inline void sev_es_nmi_complete(void) { }
static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; }
static inline void sev_enable(struct boot_params *bp) { }
static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; }
static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) { return 0; }
static inline void setup_ghcb(void) { }
static inline void __init
early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, unsigned long npages) { }
static inline void __init
early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, unsigned long npages) { }
static inline void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op) { }
static inline void snp_set_memory_shared(unsigned long vaddr, unsigned long npages) { }
static inline void snp_set_memory_private(unsigned long vaddr, unsigned long npages) { }
static inline void snp_set_wakeup_secondary_cpu(void) { }
static inline bool snp_init(struct boot_params *bp) { return false; }
static inline void snp_abort(void) { }
static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio)
{
	return -ENOTTY;
}

static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) { }
static inline u64 snp_get_unsupported_features(u64 status) { return 0; }
static inline u64 sev_get_status(void) { return 0; }
#endif

#ifdef CONFIG_KVM_AMD_SEV
bool snp_probe_rmptable_info(void);
int snp_lookup_rmpentry(u64 pfn, bool *assigned, int *level);
void snp_dump_hva_rmpentry(unsigned long address);
#else
static inline bool snp_probe_rmptable_info(void) { return false; }
static inline int snp_lookup_rmpentry(u64 pfn, bool *assigned, int *level) { return -ENODEV; }
static inline void snp_dump_hva_rmpentry(unsigned long address) {}
#endif

#endif
Commit	Line	Data
29dcc60f JR	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/*
	3	* AMD Encrypted Register State Support
	4	*
	5	* Author: Joerg Roedel <jroedel@suse.de>
	6	*/
	7
	8	#ifndef __ASM_ENCRYPTED_STATE_H
	9	#define __ASM_ENCRYPTED_STATE_H
	10
	11	#include <linux/types.h>
0144e3b8 DG	12	#include <linux/sev-guest.h>
0144e3b8 DG	13
597cfe48	14	#include <asm/insn.h>
b81fc74d	15	#include <asm/sev-common.h>
c01fce9c	16	#include <asm/bootparam.h>
f710ac54	17	#include <asm/coco.h>
29dcc60f	18
2ea29c5a	19	#define GHCB_PROTOCOL_MIN 1ULL
cbd3d4f7	20	#define GHCB_PROTOCOL_MAX 2ULL
b81fc74d	21	#define GHCB_DEFAULT_USAGE 0ULL
29dcc60f	22
29dcc60f JR	23	#define VMGEXIT() { asm volatile("rep; vmmcall\n\r"); }
29dcc60f JR	24
597cfe48 JR	25	enum es_result {
	26	ES_OK, /* All good */
	27	ES_UNSUPPORTED, /* Requested operation not supported */
	28	ES_VMM_ERROR, /* Unexpected state from the VMM */
	29	ES_DECODE_FAILED, /* Instruction decoding failed */
	30	ES_EXCEPTION, /* Instruction caused exception */
	31	ES_RETRY, /* Retry instruction emulation */
	32	};
	33
	34	struct es_fault_info {
	35	unsigned long vector;
	36	unsigned long error_code;
	37	unsigned long cr2;
	38	};
	39
	40	struct pt_regs;
	41
	42	/* ES instruction emulation context */
	43	struct es_em_ctxt {
	44	struct pt_regs *regs;
	45	struct insn insn;
	46	struct es_fault_info fi;
	47	};
	48
5ea98e01 BS	49	/*
	50	* AMD SEV Confidential computing blob structure. The structure is
	51	* defined in OVMF UEFI firmware header:
	52	* https://github.com/tianocore/edk2/blob/master/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h
	53	*/
	54	#define CC_BLOB_SEV_HDR_MAGIC 0x45444d41
	55	struct cc_blob_sev_info {
	56	u32 magic;
	57	u16 version;
	58	u16 reserved;
	59	u64 secrets_phys;
	60	u32 secrets_len;
	61	u32 rsvd1;
	62	u64 cpuid_phys;
	63	u32 cpuid_len;
	64	u32 rsvd2;
	65	} __packed;
	66
29dcc60f JR	67	void do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code);
	68
	69	static inline u64 lower_bits(u64 val, unsigned int bits)
	70	{
	71	u64 mask = (1ULL << bits) - 1;
	72
	73	return (val & mask);
	74	}
	75
8940ac9c TL	76	struct real_mode_header;
	77	enum stack_type;
	78
74d8d9d5 JR	79	/* Early IDT entry points for #VC handler */
74d8d9d5 JR	80	extern void vc_no_ghcb(void);
1aa9aa8e JR	81	extern void vc_boot_ghcb(void);
1aa9aa8e JR	82	extern bool handle_vc_boot_ghcb(struct pt_regs *regs);
74d8d9d5	83
15d90887 TL	84	/* PVALIDATE return codes */
	85	#define PVALIDATE_FAIL_SIZEMISMATCH 6
	86
0bd6f1e5 BS	87	/* Software defined (when rFlags.CF = 1) */
	88	#define PVALIDATE_FAIL_NOUPDATE 255
	89
81cc3df9 BS	90	/* RMP page size */
81cc3df9 BS	91	#define RMP_PG_SIZE_4K 0
15d90887	92	#define RMP_PG_SIZE_2M 1
94b36bc2	93	#define RMP_TO_PG_LEVEL(level) (((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M)
81cc3df9	94
0afb6b66 TL	95	#define RMPADJUST_VMSA_PAGE_BIT BIT(16)
0afb6b66 TL	96
d5af44dd BS	97	/* SNP Guest message request */
	98	struct snp_req_data {
	99	unsigned long req_gpa;
	100	unsigned long resp_gpa;
	101	unsigned long data_gpa;
	102	unsigned int data_npages;
	103	};
	104
2bf93ffb	105	struct sev_guest_platform_data {
3a45b375 BS	106	u64 secrets_gpa;
	107	};
	108
c2106a23 BS	109	/*
	110	* The secrets page contains 96-bytes of reserved field that can be used by
	111	* the guest OS. The guest OS uses the area to save the message sequence
	112	* number for each VMPCK.
	113	*
	114	* See the GHCB spec section Secret page layout for the format for this area.
	115	*/
	116	struct secrets_os_area {
	117	u32 msg_seqno_0;
	118	u32 msg_seqno_1;
	119	u32 msg_seqno_2;
	120	u32 msg_seqno_3;
	121	u64 ap_jump_table_pa;
	122	u8 rsvd[40];
	123	u8 guest_usage[32];
	124	} __packed;
	125
	126	#define VMPCK_KEY_LEN 32
	127
	128	/* See the SNP spec version 0.9 for secrets page format */
	129	struct snp_secrets_page_layout {
	130	u32 version;
	131	u32 imien : 1,
	132	rsvd1 : 31;
	133	u32 fms;
	134	u32 rsvd2;
	135	u8 gosvw[16];
	136	u8 vmpck0[VMPCK_KEY_LEN];
	137	u8 vmpck1[VMPCK_KEY_LEN];
	138	u8 vmpck2[VMPCK_KEY_LEN];
	139	u8 vmpck3[VMPCK_KEY_LEN];
	140	struct secrets_os_area os_area;
	141	u8 rsvd3[3840];
	142	} __packed;
	143
315562c9	144	#ifdef CONFIG_AMD_MEM_ENCRYPT
315562c9 JR	145	extern void __sev_es_ist_enter(struct pt_regs *regs);
	146	extern void __sev_es_ist_exit(void);
	147	static __always_inline void sev_es_ist_enter(struct pt_regs *regs)
	148	{
f710ac54 BPA	149	if (cc_vendor == CC_VENDOR_AMD &&
f710ac54 BPA	150	cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
315562c9 JR	151	__sev_es_ist_enter(regs);
	152	}
	153	static __always_inline void sev_es_ist_exit(void)
	154	{
f710ac54 BPA	155	if (cc_vendor == CC_VENDOR_AMD &&
f710ac54 BPA	156	cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
315562c9 JR	157	__sev_es_ist_exit();
315562c9 JR	158	}
8940ac9c	159	extern int sev_es_setup_ap_jump_table(struct real_mode_header *rmh);
4ca68e02 JR	160	extern void __sev_es_nmi_complete(void);
	161	static __always_inline void sev_es_nmi_complete(void)
	162	{
f710ac54 BPA	163	if (cc_vendor == CC_VENDOR_AMD &&
f710ac54 BPA	164	cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
4ca68e02 JR	165	__sev_es_nmi_complete();
4ca68e02 JR	166	}
39336f4f	167	extern int __init sev_es_efi_map_ghcbs(pgd_t *pgd);
a1b87d54	168	extern void sev_enable(struct boot_params *bp);
5bb6c1d1	169
81cc3df9 BS	170	static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs)
	171	{
	172	int rc;
	173
	174	/* "rmpadjust" mnemonic support in binutils 2.36 and newer */
	175	asm volatile(".byte 0xF3,0x0F,0x01,0xFE\n\t"
	176	: "=a"(rc)
	177	: "a"(vaddr), "c"(rmp_psize), "d"(attrs)
	178	: "memory", "cc");
	179
	180	return rc;
	181	}
0bd6f1e5 BS	182	static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate)
	183	{
	184	bool no_rmpupdate;
	185	int rc;
	186
	187	/* "pvalidate" mnemonic support in binutils 2.36 and newer */
	188	asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t"
	189	CC_SET(c)
	190	: CC_OUT(c) (no_rmpupdate), "=a"(rc)
	191	: "a"(vaddr), "c"(rmp_psize), "d"(validate)
	192	: "memory", "cc");
	193
	194	if (no_rmpupdate)
	195	return PVALIDATE_FAIL_NOUPDATE;
	196
	197	return rc;
	198	}
0144e3b8 DG	199
	200	struct snp_guest_request_ioctl;
	201
95d33bfa	202	void setup_ghcb(void);
5e5ccff6	203	void __init early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,
5dee19b6	204	unsigned long npages);
5e5ccff6	205	void __init early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr,
5dee19b6	206	unsigned long npages);
5e5ccff6	207	void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op);
5dee19b6 TL	208	void snp_set_memory_shared(unsigned long vaddr, unsigned long npages);
5dee19b6 TL	209	void snp_set_memory_private(unsigned long vaddr, unsigned long npages);
0afb6b66	210	void snp_set_wakeup_secondary_cpu(void);
c01fce9c	211	bool snp_init(struct boot_params *bp);
c93c296f	212	void __init __noreturn snp_abort(void);
0144e3b8	213	int snp_issue_guest_request(u64 exit_code, struct snp_req_data input, struct snp_guest_request_ioctl rio);
6c321179	214	void snp_accept_memory(phys_addr_t start, phys_addr_t end);
31c77a50 AB	215	u64 snp_get_unsupported_features(u64 status);
31c77a50 AB	216	u64 sev_get_status(void);
315562c9 JR	217	#else
	218	static inline void sev_es_ist_enter(struct pt_regs *regs) { }
	219	static inline void sev_es_ist_exit(void) { }
8940ac9c	220	static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; }
4ca68e02	221	static inline void sev_es_nmi_complete(void) { }
39336f4f	222	static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; }
a1b87d54	223	static inline void sev_enable(struct boot_params *bp) { }
0bd6f1e5	224	static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; }
81cc3df9	225	static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) { return 0; }
95d33bfa	226	static inline void setup_ghcb(void) { }
5e5ccff6	227	static inline void __init
5dee19b6	228	early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, unsigned long npages) { }
5e5ccff6	229	static inline void __init
5dee19b6	230	early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, unsigned long npages) { }
5e5ccff6	231	static inline void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op) { }
5dee19b6 TL	232	static inline void snp_set_memory_shared(unsigned long vaddr, unsigned long npages) { }
5dee19b6 TL	233	static inline void snp_set_memory_private(unsigned long vaddr, unsigned long npages) { }
0afb6b66	234	static inline void snp_set_wakeup_secondary_cpu(void) { }
c01fce9c	235	static inline bool snp_init(struct boot_params *bp) { return false; }
b190a043	236	static inline void snp_abort(void) { }
0144e3b8	237	static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data input, struct snp_guest_request_ioctl rio)
d5af44dd BS	238	{
	239	return -ENOTTY;
	240	}
6c321179 TL	241
6c321179 TL	242	static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) { }
31c77a50 AB	243	static inline u64 snp_get_unsupported_features(u64 status) { return 0; }
31c77a50 AB	244	static inline u64 sev_get_status(void) { return 0; }
315562c9 JR	245	#endif
315562c9 JR	246
216d106c BS	247	#ifdef CONFIG_KVM_AMD_SEV
216d106c BS	248	bool snp_probe_rmptable_info(void);
94b36bc2	249	int snp_lookup_rmpentry(u64 pfn, bool assigned, int level);
1f568d36	250	void snp_dump_hva_rmpentry(unsigned long address);
216d106c BS	251	#else
216d106c BS	252	static inline bool snp_probe_rmptable_info(void) { return false; }
94b36bc2	253	static inline int snp_lookup_rmpentry(u64 pfn, bool assigned, int level) { return -ENODEV; }
1f568d36	254	static inline void snp_dump_hva_rmpentry(unsigned long address) {}
216d106c BS	255	#endif
216d106c BS	256
29dcc60f	257	#endif