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29dcc60f JR |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * AMD Encrypted Register State Support | |
4 | * | |
5 | * Author: Joerg Roedel <jroedel@suse.de> | |
6 | */ | |
7 | ||
8 | #ifndef __ASM_ENCRYPTED_STATE_H | |
9 | #define __ASM_ENCRYPTED_STATE_H | |
10 | ||
11 | #include <linux/types.h> | |
0144e3b8 DG |
12 | #include <linux/sev-guest.h> |
13 | ||
597cfe48 | 14 | #include <asm/insn.h> |
b81fc74d | 15 | #include <asm/sev-common.h> |
f710ac54 | 16 | #include <asm/coco.h> |
29dcc60f | 17 | |
2ea29c5a | 18 | #define GHCB_PROTOCOL_MIN 1ULL |
cbd3d4f7 | 19 | #define GHCB_PROTOCOL_MAX 2ULL |
b81fc74d | 20 | #define GHCB_DEFAULT_USAGE 0ULL |
29dcc60f | 21 | |
29dcc60f JR |
22 | #define VMGEXIT() { asm volatile("rep; vmmcall\n\r"); } |
23 | ||
103bf75f TZ |
24 | struct boot_params; |
25 | ||
597cfe48 JR |
26 | enum es_result { |
27 | ES_OK, /* All good */ | |
28 | ES_UNSUPPORTED, /* Requested operation not supported */ | |
29 | ES_VMM_ERROR, /* Unexpected state from the VMM */ | |
30 | ES_DECODE_FAILED, /* Instruction decoding failed */ | |
31 | ES_EXCEPTION, /* Instruction caused exception */ | |
32 | ES_RETRY, /* Retry instruction emulation */ | |
33 | }; | |
34 | ||
35 | struct es_fault_info { | |
36 | unsigned long vector; | |
37 | unsigned long error_code; | |
38 | unsigned long cr2; | |
39 | }; | |
40 | ||
41 | struct pt_regs; | |
42 | ||
43 | /* ES instruction emulation context */ | |
44 | struct es_em_ctxt { | |
45 | struct pt_regs *regs; | |
46 | struct insn insn; | |
47 | struct es_fault_info fi; | |
48 | }; | |
49 | ||
5ea98e01 BS |
50 | /* |
51 | * AMD SEV Confidential computing blob structure. The structure is | |
52 | * defined in OVMF UEFI firmware header: | |
53 | * https://github.com/tianocore/edk2/blob/master/OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h | |
54 | */ | |
55 | #define CC_BLOB_SEV_HDR_MAGIC 0x45444d41 | |
56 | struct cc_blob_sev_info { | |
57 | u32 magic; | |
58 | u16 version; | |
59 | u16 reserved; | |
60 | u64 secrets_phys; | |
61 | u32 secrets_len; | |
62 | u32 rsvd1; | |
63 | u64 cpuid_phys; | |
64 | u32 cpuid_len; | |
65 | u32 rsvd2; | |
66 | } __packed; | |
67 | ||
29dcc60f JR |
68 | void do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code); |
69 | ||
70 | static inline u64 lower_bits(u64 val, unsigned int bits) | |
71 | { | |
72 | u64 mask = (1ULL << bits) - 1; | |
73 | ||
74 | return (val & mask); | |
75 | } | |
76 | ||
8940ac9c TL |
77 | struct real_mode_header; |
78 | enum stack_type; | |
79 | ||
74d8d9d5 JR |
80 | /* Early IDT entry points for #VC handler */ |
81 | extern void vc_no_ghcb(void); | |
1aa9aa8e JR |
82 | extern void vc_boot_ghcb(void); |
83 | extern bool handle_vc_boot_ghcb(struct pt_regs *regs); | |
74d8d9d5 | 84 | |
15d90887 TL |
85 | /* PVALIDATE return codes */ |
86 | #define PVALIDATE_FAIL_SIZEMISMATCH 6 | |
87 | ||
0bd6f1e5 BS |
88 | /* Software defined (when rFlags.CF = 1) */ |
89 | #define PVALIDATE_FAIL_NOUPDATE 255 | |
90 | ||
2c35819e BS |
91 | /* RMUPDATE detected 4K page and 2MB page overlap. */ |
92 | #define RMPUPDATE_FAIL_OVERLAP 4 | |
93 | ||
81cc3df9 BS |
94 | /* RMP page size */ |
95 | #define RMP_PG_SIZE_4K 0 | |
15d90887 | 96 | #define RMP_PG_SIZE_2M 1 |
94b36bc2 | 97 | #define RMP_TO_PG_LEVEL(level) (((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M) |
2c35819e BS |
98 | #define PG_LEVEL_TO_RMP(level) (((level) == PG_LEVEL_4K) ? RMP_PG_SIZE_4K : RMP_PG_SIZE_2M) |
99 | ||
100 | struct rmp_state { | |
101 | u64 gpa; | |
102 | u8 assigned; | |
103 | u8 pagesize; | |
104 | u8 immutable; | |
105 | u8 rsvd; | |
106 | u32 asid; | |
107 | } __packed; | |
81cc3df9 | 108 | |
0afb6b66 TL |
109 | #define RMPADJUST_VMSA_PAGE_BIT BIT(16) |
110 | ||
d5af44dd BS |
111 | /* SNP Guest message request */ |
112 | struct snp_req_data { | |
113 | unsigned long req_gpa; | |
114 | unsigned long resp_gpa; | |
115 | unsigned long data_gpa; | |
116 | unsigned int data_npages; | |
117 | }; | |
118 | ||
2bf93ffb | 119 | struct sev_guest_platform_data { |
3a45b375 BS |
120 | u64 secrets_gpa; |
121 | }; | |
122 | ||
c2106a23 BS |
123 | /* |
124 | * The secrets page contains 96-bytes of reserved field that can be used by | |
125 | * the guest OS. The guest OS uses the area to save the message sequence | |
126 | * number for each VMPCK. | |
127 | * | |
128 | * See the GHCB spec section Secret page layout for the format for this area. | |
129 | */ | |
130 | struct secrets_os_area { | |
131 | u32 msg_seqno_0; | |
132 | u32 msg_seqno_1; | |
133 | u32 msg_seqno_2; | |
134 | u32 msg_seqno_3; | |
135 | u64 ap_jump_table_pa; | |
136 | u8 rsvd[40]; | |
137 | u8 guest_usage[32]; | |
138 | } __packed; | |
139 | ||
140 | #define VMPCK_KEY_LEN 32 | |
141 | ||
142 | /* See the SNP spec version 0.9 for secrets page format */ | |
143 | struct snp_secrets_page_layout { | |
144 | u32 version; | |
145 | u32 imien : 1, | |
146 | rsvd1 : 31; | |
147 | u32 fms; | |
148 | u32 rsvd2; | |
149 | u8 gosvw[16]; | |
150 | u8 vmpck0[VMPCK_KEY_LEN]; | |
151 | u8 vmpck1[VMPCK_KEY_LEN]; | |
152 | u8 vmpck2[VMPCK_KEY_LEN]; | |
153 | u8 vmpck3[VMPCK_KEY_LEN]; | |
154 | struct secrets_os_area os_area; | |
155 | u8 rsvd3[3840]; | |
156 | } __packed; | |
157 | ||
315562c9 | 158 | #ifdef CONFIG_AMD_MEM_ENCRYPT |
315562c9 JR |
159 | extern void __sev_es_ist_enter(struct pt_regs *regs); |
160 | extern void __sev_es_ist_exit(void); | |
161 | static __always_inline void sev_es_ist_enter(struct pt_regs *regs) | |
162 | { | |
f710ac54 BPA |
163 | if (cc_vendor == CC_VENDOR_AMD && |
164 | cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) | |
315562c9 JR |
165 | __sev_es_ist_enter(regs); |
166 | } | |
167 | static __always_inline void sev_es_ist_exit(void) | |
168 | { | |
f710ac54 BPA |
169 | if (cc_vendor == CC_VENDOR_AMD && |
170 | cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) | |
315562c9 JR |
171 | __sev_es_ist_exit(); |
172 | } | |
8940ac9c | 173 | extern int sev_es_setup_ap_jump_table(struct real_mode_header *rmh); |
4ca68e02 JR |
174 | extern void __sev_es_nmi_complete(void); |
175 | static __always_inline void sev_es_nmi_complete(void) | |
176 | { | |
f710ac54 BPA |
177 | if (cc_vendor == CC_VENDOR_AMD && |
178 | cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) | |
4ca68e02 JR |
179 | __sev_es_nmi_complete(); |
180 | } | |
39336f4f | 181 | extern int __init sev_es_efi_map_ghcbs(pgd_t *pgd); |
a1b87d54 | 182 | extern void sev_enable(struct boot_params *bp); |
5bb6c1d1 | 183 | |
81cc3df9 BS |
184 | static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) |
185 | { | |
186 | int rc; | |
187 | ||
188 | /* "rmpadjust" mnemonic support in binutils 2.36 and newer */ | |
189 | asm volatile(".byte 0xF3,0x0F,0x01,0xFE\n\t" | |
190 | : "=a"(rc) | |
191 | : "a"(vaddr), "c"(rmp_psize), "d"(attrs) | |
192 | : "memory", "cc"); | |
193 | ||
194 | return rc; | |
195 | } | |
0bd6f1e5 BS |
196 | static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) |
197 | { | |
198 | bool no_rmpupdate; | |
199 | int rc; | |
200 | ||
201 | /* "pvalidate" mnemonic support in binutils 2.36 and newer */ | |
202 | asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t" | |
203 | CC_SET(c) | |
204 | : CC_OUT(c) (no_rmpupdate), "=a"(rc) | |
205 | : "a"(vaddr), "c"(rmp_psize), "d"(validate) | |
206 | : "memory", "cc"); | |
207 | ||
208 | if (no_rmpupdate) | |
209 | return PVALIDATE_FAIL_NOUPDATE; | |
210 | ||
211 | return rc; | |
212 | } | |
0144e3b8 DG |
213 | |
214 | struct snp_guest_request_ioctl; | |
215 | ||
95d33bfa | 216 | void setup_ghcb(void); |
428080c9 AB |
217 | void early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, |
218 | unsigned long npages); | |
219 | void early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, | |
220 | unsigned long npages); | |
5e5ccff6 | 221 | void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op); |
5dee19b6 TL |
222 | void snp_set_memory_shared(unsigned long vaddr, unsigned long npages); |
223 | void snp_set_memory_private(unsigned long vaddr, unsigned long npages); | |
0afb6b66 | 224 | void snp_set_wakeup_secondary_cpu(void); |
c01fce9c | 225 | bool snp_init(struct boot_params *bp); |
428080c9 | 226 | void __noreturn snp_abort(void); |
0144e3b8 | 227 | int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio); |
6c321179 | 228 | void snp_accept_memory(phys_addr_t start, phys_addr_t end); |
31c77a50 AB |
229 | u64 snp_get_unsupported_features(u64 status); |
230 | u64 sev_get_status(void); | |
8ef97958 | 231 | void kdump_sev_callback(void); |
d7b69b59 | 232 | void sev_show_status(void); |
315562c9 JR |
233 | #else |
234 | static inline void sev_es_ist_enter(struct pt_regs *regs) { } | |
235 | static inline void sev_es_ist_exit(void) { } | |
8940ac9c | 236 | static inline int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) { return 0; } |
4ca68e02 | 237 | static inline void sev_es_nmi_complete(void) { } |
39336f4f | 238 | static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; } |
a1b87d54 | 239 | static inline void sev_enable(struct boot_params *bp) { } |
0bd6f1e5 | 240 | static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; } |
81cc3df9 | 241 | static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) { return 0; } |
95d33bfa | 242 | static inline void setup_ghcb(void) { } |
5e5ccff6 | 243 | static inline void __init |
5dee19b6 | 244 | early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr, unsigned long npages) { } |
5e5ccff6 | 245 | static inline void __init |
5dee19b6 | 246 | early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr, unsigned long npages) { } |
5e5ccff6 | 247 | static inline void __init snp_prep_memory(unsigned long paddr, unsigned int sz, enum psc_op op) { } |
5dee19b6 TL |
248 | static inline void snp_set_memory_shared(unsigned long vaddr, unsigned long npages) { } |
249 | static inline void snp_set_memory_private(unsigned long vaddr, unsigned long npages) { } | |
0afb6b66 | 250 | static inline void snp_set_wakeup_secondary_cpu(void) { } |
c01fce9c | 251 | static inline bool snp_init(struct boot_params *bp) { return false; } |
b190a043 | 252 | static inline void snp_abort(void) { } |
0144e3b8 | 253 | static inline int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, struct snp_guest_request_ioctl *rio) |
d5af44dd BS |
254 | { |
255 | return -ENOTTY; | |
256 | } | |
6c321179 TL |
257 | |
258 | static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) { } | |
31c77a50 AB |
259 | static inline u64 snp_get_unsupported_features(u64 status) { return 0; } |
260 | static inline u64 sev_get_status(void) { return 0; } | |
8ef97958 | 261 | static inline void kdump_sev_callback(void) { } |
d7b69b59 | 262 | static inline void sev_show_status(void) { } |
315562c9 JR |
263 | #endif |
264 | ||
216d106c BS |
265 | #ifdef CONFIG_KVM_AMD_SEV |
266 | bool snp_probe_rmptable_info(void); | |
94b36bc2 | 267 | int snp_lookup_rmpentry(u64 pfn, bool *assigned, int *level); |
1f568d36 | 268 | void snp_dump_hva_rmpentry(unsigned long address); |
2c35819e BS |
269 | int psmash(u64 pfn); |
270 | int rmp_make_private(u64 pfn, u64 gpa, enum pg_level level, u32 asid, bool immutable); | |
271 | int rmp_make_shared(u64 pfn, enum pg_level level); | |
8dac6429 | 272 | void snp_leak_pages(u64 pfn, unsigned int npages); |
216d106c BS |
273 | #else |
274 | static inline bool snp_probe_rmptable_info(void) { return false; } | |
94b36bc2 | 275 | static inline int snp_lookup_rmpentry(u64 pfn, bool *assigned, int *level) { return -ENODEV; } |
1f568d36 | 276 | static inline void snp_dump_hva_rmpentry(unsigned long address) {} |
2c35819e BS |
277 | static inline int psmash(u64 pfn) { return -ENODEV; } |
278 | static inline int rmp_make_private(u64 pfn, u64 gpa, enum pg_level level, u32 asid, | |
279 | bool immutable) | |
280 | { | |
281 | return -ENODEV; | |
282 | } | |
283 | static inline int rmp_make_shared(u64 pfn, enum pg_level level) { return -ENODEV; } | |
8dac6429 | 284 | static inline void snp_leak_pages(u64 pfn, unsigned int npages) {} |
216d106c BS |
285 | #endif |
286 | ||
29dcc60f | 287 | #endif |