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8d19c99f JF |
1 | #ifndef _ASM_X86_PGTABLE_DEFS_H |
2 | #define _ASM_X86_PGTABLE_DEFS_H | |
3 | ||
4 | #include <linux/const.h> | |
e43623b4 | 5 | #include <asm/page_types.h> |
8d19c99f | 6 | |
d016bf7e | 7 | #define FIRST_USER_ADDRESS 0UL |
8d19c99f JF |
8 | |
9 | #define _PAGE_BIT_PRESENT 0 /* is present */ | |
10 | #define _PAGE_BIT_RW 1 /* writeable */ | |
11 | #define _PAGE_BIT_USER 2 /* userspace addressable */ | |
12 | #define _PAGE_BIT_PWT 3 /* page write through */ | |
13 | #define _PAGE_BIT_PCD 4 /* page cache disabled */ | |
14 | #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ | |
15 | #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ | |
16 | #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ | |
17 | #define _PAGE_BIT_PAT 7 /* on 4KB pages */ | |
18 | #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ | |
c46a7c81 MG |
19 | #define _PAGE_BIT_SOFTW1 9 /* available for programmer */ |
20 | #define _PAGE_BIT_SOFTW2 10 /* " */ | |
21 | #define _PAGE_BIT_SOFTW3 11 /* " */ | |
8d19c99f | 22 | #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ |
5c1d90f5 DH |
23 | #define _PAGE_BIT_SOFTW4 58 /* available for programmer */ |
24 | #define _PAGE_BIT_PKEY_BIT0 59 /* Protection Keys, bit 1/4 */ | |
25 | #define _PAGE_BIT_PKEY_BIT1 60 /* Protection Keys, bit 2/4 */ | |
26 | #define _PAGE_BIT_PKEY_BIT2 61 /* Protection Keys, bit 3/4 */ | |
27 | #define _PAGE_BIT_PKEY_BIT3 62 /* Protection Keys, bit 4/4 */ | |
28 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ | |
29 | ||
c46a7c81 MG |
30 | #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1 |
31 | #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1 | |
c46a7c81 MG |
32 | #define _PAGE_BIT_HIDDEN _PAGE_BIT_SOFTW3 /* hidden by kmemcheck */ |
33 | #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */ | |
5c1d90f5 | 34 | #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4 |
8d19c99f JF |
35 | |
36 | /* If _PAGE_BIT_PRESENT is clear, we use these: */ | |
37 | /* - if the user mapped it with PROT_NONE; pte_present gives true */ | |
38 | #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL | |
8d19c99f JF |
39 | |
40 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) | |
41 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) | |
42 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) | |
43 | #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT) | |
44 | #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD) | |
45 | #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED) | |
46 | #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY) | |
47 | #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE) | |
48 | #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL) | |
c46a7c81 | 49 | #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1) |
f955371c | 50 | #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2) |
8d19c99f JF |
51 | #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) |
52 | #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) | |
53 | #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL) | |
54 | #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST) | |
5c1d90f5 DH |
55 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS |
56 | #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT0) | |
57 | #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT1) | |
58 | #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT2) | |
59 | #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT3) | |
60 | #else | |
61 | #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 0)) | |
62 | #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 0)) | |
63 | #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0)) | |
64 | #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0)) | |
65 | #endif | |
8d19c99f JF |
66 | #define __HAVE_ARCH_PTE_SPECIAL |
67 | ||
019132ff DH |
68 | #define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \ |
69 | _PAGE_PKEY_BIT1 | \ | |
70 | _PAGE_PKEY_BIT2 | \ | |
71 | _PAGE_PKEY_BIT3) | |
72 | ||
97e3c602 DH |
73 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
74 | #define _PAGE_KNL_ERRATUM_MASK (_PAGE_DIRTY | _PAGE_ACCESSED) | |
75 | #else | |
76 | #define _PAGE_KNL_ERRATUM_MASK 0 | |
77 | #endif | |
78 | ||
9d31c506 JF |
79 | #ifdef CONFIG_KMEMCHECK |
80 | #define _PAGE_HIDDEN (_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN) | |
81 | #else | |
82 | #define _PAGE_HIDDEN (_AT(pteval_t, 0)) | |
83 | #endif | |
84 | ||
0f8975ec PE |
85 | /* |
86 | * The same hidden bit is used by kmemcheck, but since kmemcheck | |
87 | * works on kernel pages while soft-dirty engine on user space, | |
88 | * they do not conflict with each other. | |
89 | */ | |
90 | ||
91 | #ifdef CONFIG_MEM_SOFT_DIRTY | |
41bb3476 | 92 | #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY) |
0f8975ec PE |
93 | #else |
94 | #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0)) | |
95 | #endif | |
96 | ||
179ef71c CG |
97 | /* |
98 | * Tracking soft dirty bit when a page goes to a swap is tricky. | |
99 | * We need a bit which can be stored in pte _and_ not conflict | |
100 | * with swap entry format. On x86 bits 6 and 7 are *not* involved | |
101 | * into swap entry computation, but bit 6 is used for nonlinear | |
102 | * file mapping, so we borrow bit 7 for soft dirty tracking. | |
fa0f281c CG |
103 | * |
104 | * Please note that this bit must be treated as swap dirty page | |
105 | * mark if and only if the PTE has present bit clear! | |
179ef71c CG |
106 | */ |
107 | #ifdef CONFIG_MEM_SOFT_DIRTY | |
108 | #define _PAGE_SWP_SOFT_DIRTY _PAGE_PSE | |
109 | #else | |
110 | #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0)) | |
111 | #endif | |
112 | ||
8d19c99f JF |
113 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
114 | #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) | |
69660fd7 DW |
115 | #define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP) |
116 | #define __HAVE_ARCH_PTE_DEVMAP | |
8d19c99f JF |
117 | #else |
118 | #define _PAGE_NX (_AT(pteval_t, 0)) | |
69660fd7 | 119 | #define _PAGE_DEVMAP (_AT(pteval_t, 0)) |
8d19c99f JF |
120 | #endif |
121 | ||
8d19c99f JF |
122 | #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) |
123 | ||
124 | #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | |
125 | _PAGE_ACCESSED | _PAGE_DIRTY) | |
126 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \ | |
127 | _PAGE_DIRTY) | |
128 | ||
8f62c883 DH |
129 | /* |
130 | * Set of bits not changed in pte_modify. The pte's | |
131 | * protection key is treated like _PAGE_RW, for | |
132 | * instance, and is *not* included in this mask since | |
133 | * pte_modify() does modify it. | |
134 | */ | |
8d19c99f | 135 | #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ |
24f91eba | 136 | _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \ |
21d9ee3e MG |
137 | _PAGE_SOFT_DIRTY) |
138 | #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE) | |
8d19c99f | 139 | |
281d4078 JG |
140 | /* |
141 | * The cache modes defined here are used to translate between pure SW usage | |
142 | * and the HW defined cache mode bits and/or PAT entries. | |
143 | * | |
144 | * The resulting bits for PWT, PCD and PAT should be chosen in a way | |
145 | * to have the WB mode at index 0 (all bits clear). This is the default | |
146 | * right now and likely would break too much if changed. | |
147 | */ | |
148 | #ifndef __ASSEMBLY__ | |
149 | enum page_cache_mode { | |
150 | _PAGE_CACHE_MODE_WB = 0, | |
151 | _PAGE_CACHE_MODE_WC = 1, | |
152 | _PAGE_CACHE_MODE_UC_MINUS = 2, | |
153 | _PAGE_CACHE_MODE_UC = 3, | |
154 | _PAGE_CACHE_MODE_WT = 4, | |
155 | _PAGE_CACHE_MODE_WP = 5, | |
156 | _PAGE_CACHE_MODE_NUM = 8 | |
157 | }; | |
158 | #endif | |
159 | ||
160 | #define _PAGE_CACHE_MASK (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT) | |
161 | #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC)) | |
162 | ||
8d19c99f JF |
163 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) |
164 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | |
165 | _PAGE_ACCESSED | _PAGE_NX) | |
166 | ||
167 | #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \ | |
168 | _PAGE_USER | _PAGE_ACCESSED) | |
169 | #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | |
170 | _PAGE_ACCESSED | _PAGE_NX) | |
171 | #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | |
172 | _PAGE_ACCESSED) | |
173 | #define PAGE_COPY PAGE_COPY_NOEXEC | |
174 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | |
175 | _PAGE_ACCESSED | _PAGE_NX) | |
176 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | |
177 | _PAGE_ACCESSED) | |
178 | ||
179 | #define __PAGE_KERNEL_EXEC \ | |
180 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL) | |
181 | #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX) | |
182 | ||
183 | #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW) | |
184 | #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) | |
87ad0b71 | 185 | #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_NOCACHE) |
8d19c99f | 186 | #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) |
9fd67b4e | 187 | #define __PAGE_KERNEL_VVAR (__PAGE_KERNEL_RO | _PAGE_USER) |
8d19c99f | 188 | #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) |
8d19c99f JF |
189 | #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE) |
190 | ||
f955371c DV |
191 | #define __PAGE_KERNEL_IO (__PAGE_KERNEL) |
192 | #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE) | |
8d19c99f JF |
193 | |
194 | #define PAGE_KERNEL __pgprot(__PAGE_KERNEL) | |
195 | #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO) | |
196 | #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC) | |
197 | #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX) | |
8d19c99f | 198 | #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE) |
8d19c99f | 199 | #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE) |
8d19c99f JF |
200 | #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC) |
201 | #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL) | |
9fd67b4e | 202 | #define PAGE_KERNEL_VVAR __pgprot(__PAGE_KERNEL_VVAR) |
8d19c99f JF |
203 | |
204 | #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO) | |
205 | #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE) | |
8d19c99f JF |
206 | |
207 | /* xwr */ | |
208 | #define __P000 PAGE_NONE | |
209 | #define __P001 PAGE_READONLY | |
210 | #define __P010 PAGE_COPY | |
211 | #define __P011 PAGE_COPY | |
212 | #define __P100 PAGE_READONLY_EXEC | |
213 | #define __P101 PAGE_READONLY_EXEC | |
214 | #define __P110 PAGE_COPY_EXEC | |
215 | #define __P111 PAGE_COPY_EXEC | |
216 | ||
217 | #define __S000 PAGE_NONE | |
218 | #define __S001 PAGE_READONLY | |
219 | #define __S010 PAGE_SHARED | |
220 | #define __S011 PAGE_SHARED | |
221 | #define __S100 PAGE_READONLY_EXEC | |
222 | #define __S101 PAGE_READONLY_EXEC | |
223 | #define __S110 PAGE_SHARED_EXEC | |
224 | #define __S111 PAGE_SHARED_EXEC | |
225 | ||
226 | /* | |
227 | * early identity mapping pte attrib macros. | |
228 | */ | |
229 | #ifdef CONFIG_X86_64 | |
230 | #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC | |
231 | #else | |
8d19c99f | 232 | #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */ |
7dda0387 | 233 | #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */ |
8d19c99f JF |
234 | #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ |
235 | #endif | |
236 | ||
54321d94 | 237 | #ifdef CONFIG_X86_32 |
a1ce3928 | 238 | # include <asm/pgtable_32_types.h> |
54321d94 | 239 | #else |
a1ce3928 | 240 | # include <asm/pgtable_64_types.h> |
54321d94 JF |
241 | #endif |
242 | ||
8d19c99f JF |
243 | #ifndef __ASSEMBLY__ |
244 | ||
54321d94 JF |
245 | #include <linux/types.h> |
246 | ||
4be4c1fb | 247 | /* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */ |
9b3651cb JF |
248 | #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK) |
249 | ||
8f62c883 DH |
250 | /* |
251 | * Extracts the flags from a (pte|pmd|pud|pgd)val_t | |
252 | * This includes the protection key value. | |
253 | */ | |
9b3651cb JF |
254 | #define PTE_FLAGS_MASK (~PTE_PFN_MASK) |
255 | ||
54321d94 JF |
256 | typedef struct pgprot { pgprotval_t pgprot; } pgprot_t; |
257 | ||
258 | typedef struct { pgdval_t pgd; } pgd_t; | |
259 | ||
260 | static inline pgd_t native_make_pgd(pgdval_t val) | |
261 | { | |
262 | return (pgd_t) { val }; | |
263 | } | |
264 | ||
265 | static inline pgdval_t native_pgd_val(pgd_t pgd) | |
266 | { | |
267 | return pgd.pgd; | |
268 | } | |
269 | ||
270 | static inline pgdval_t pgd_flags(pgd_t pgd) | |
271 | { | |
272 | return native_pgd_val(pgd) & PTE_FLAGS_MASK; | |
273 | } | |
274 | ||
98233368 | 275 | #if CONFIG_PGTABLE_LEVELS > 3 |
54321d94 JF |
276 | typedef struct { pudval_t pud; } pud_t; |
277 | ||
278 | static inline pud_t native_make_pud(pmdval_t val) | |
279 | { | |
280 | return (pud_t) { val }; | |
281 | } | |
282 | ||
283 | static inline pudval_t native_pud_val(pud_t pud) | |
284 | { | |
285 | return pud.pud; | |
286 | } | |
287 | #else | |
288 | #include <asm-generic/pgtable-nopud.h> | |
289 | ||
290 | static inline pudval_t native_pud_val(pud_t pud) | |
291 | { | |
292 | return native_pgd_val(pud.pgd); | |
293 | } | |
294 | #endif | |
295 | ||
98233368 | 296 | #if CONFIG_PGTABLE_LEVELS > 2 |
54321d94 JF |
297 | typedef struct { pmdval_t pmd; } pmd_t; |
298 | ||
299 | static inline pmd_t native_make_pmd(pmdval_t val) | |
300 | { | |
301 | return (pmd_t) { val }; | |
302 | } | |
303 | ||
304 | static inline pmdval_t native_pmd_val(pmd_t pmd) | |
305 | { | |
306 | return pmd.pmd; | |
307 | } | |
308 | #else | |
309 | #include <asm-generic/pgtable-nopmd.h> | |
310 | ||
311 | static inline pmdval_t native_pmd_val(pmd_t pmd) | |
312 | { | |
313 | return native_pgd_val(pmd.pud.pgd); | |
314 | } | |
315 | #endif | |
316 | ||
4be4c1fb TK |
317 | static inline pudval_t pud_pfn_mask(pud_t pud) |
318 | { | |
319 | if (native_pud_val(pud) & _PAGE_PSE) | |
70f15287 | 320 | return PHYSICAL_PUD_PAGE_MASK; |
4be4c1fb TK |
321 | else |
322 | return PTE_PFN_MASK; | |
323 | } | |
324 | ||
325 | static inline pudval_t pud_flags_mask(pud_t pud) | |
326 | { | |
70f15287 | 327 | return ~pud_pfn_mask(pud); |
4be4c1fb TK |
328 | } |
329 | ||
54321d94 JF |
330 | static inline pudval_t pud_flags(pud_t pud) |
331 | { | |
f70abb0f | 332 | return native_pud_val(pud) & pud_flags_mask(pud); |
54321d94 JF |
333 | } |
334 | ||
4be4c1fb TK |
335 | static inline pmdval_t pmd_pfn_mask(pmd_t pmd) |
336 | { | |
337 | if (native_pmd_val(pmd) & _PAGE_PSE) | |
70f15287 | 338 | return PHYSICAL_PMD_PAGE_MASK; |
4be4c1fb TK |
339 | else |
340 | return PTE_PFN_MASK; | |
341 | } | |
342 | ||
343 | static inline pmdval_t pmd_flags_mask(pmd_t pmd) | |
344 | { | |
70f15287 | 345 | return ~pmd_pfn_mask(pmd); |
4be4c1fb TK |
346 | } |
347 | ||
54321d94 JF |
348 | static inline pmdval_t pmd_flags(pmd_t pmd) |
349 | { | |
f70abb0f | 350 | return native_pmd_val(pmd) & pmd_flags_mask(pmd); |
54321d94 JF |
351 | } |
352 | ||
353 | static inline pte_t native_make_pte(pteval_t val) | |
354 | { | |
355 | return (pte_t) { .pte = val }; | |
356 | } | |
357 | ||
358 | static inline pteval_t native_pte_val(pte_t pte) | |
359 | { | |
360 | return pte.pte; | |
361 | } | |
362 | ||
363 | static inline pteval_t pte_flags(pte_t pte) | |
364 | { | |
365 | return native_pte_val(pte) & PTE_FLAGS_MASK; | |
366 | } | |
367 | ||
368 | #define pgprot_val(x) ((x).pgprot) | |
369 | #define __pgprot(x) ((pgprot_t) { (x) } ) | |
370 | ||
281d4078 JG |
371 | extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM]; |
372 | extern uint8_t __pte2cachemode_tbl[8]; | |
373 | ||
374 | #define __pte2cm_idx(cb) \ | |
375 | ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \ | |
376 | (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \ | |
377 | (((cb) >> _PAGE_BIT_PWT) & 1)) | |
bd809af1 JG |
378 | #define __cm_idx2pte(i) \ |
379 | ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \ | |
380 | (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \ | |
381 | (((i) & 1) << _PAGE_BIT_PWT)) | |
281d4078 JG |
382 | |
383 | static inline unsigned long cachemode2protval(enum page_cache_mode pcm) | |
384 | { | |
385 | if (likely(pcm == 0)) | |
386 | return 0; | |
387 | return __cachemode2pte_tbl[pcm]; | |
388 | } | |
389 | static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm) | |
390 | { | |
391 | return __pgprot(cachemode2protval(pcm)); | |
392 | } | |
393 | static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot) | |
394 | { | |
395 | unsigned long masked; | |
396 | ||
397 | masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK; | |
398 | if (likely(masked == 0)) | |
399 | return 0; | |
400 | return __pte2cachemode_tbl[__pte2cm_idx(masked)]; | |
401 | } | |
402 | static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot) | |
403 | { | |
3625c2c2 | 404 | pgprotval_t val = pgprot_val(pgprot); |
281d4078 | 405 | pgprot_t new; |
281d4078 | 406 | |
281d4078 JG |
407 | pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) | |
408 | ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT)); | |
409 | return new; | |
410 | } | |
411 | static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot) | |
412 | { | |
3625c2c2 | 413 | pgprotval_t val = pgprot_val(pgprot); |
281d4078 | 414 | pgprot_t new; |
281d4078 | 415 | |
281d4078 JG |
416 | pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) | |
417 | ((val & _PAGE_PAT_LARGE) >> | |
418 | (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT)); | |
419 | return new; | |
420 | } | |
421 | ||
54321d94 JF |
422 | |
423 | typedef struct page *pgtable_t; | |
424 | ||
8d19c99f | 425 | extern pteval_t __supported_pte_mask; |
c44c9ec0 | 426 | extern void set_nx(void); |
54321d94 | 427 | extern int nx_enabled; |
8d19c99f JF |
428 | |
429 | #define pgprot_writecombine pgprot_writecombine | |
430 | extern pgprot_t pgprot_writecombine(pgprot_t prot); | |
431 | ||
d1b4bfbf TK |
432 | #define pgprot_writethrough pgprot_writethrough |
433 | extern pgprot_t pgprot_writethrough(pgprot_t prot); | |
434 | ||
8d19c99f JF |
435 | /* Indicate that x86 has its own track and untrack pfn vma functions */ |
436 | #define __HAVE_PFNMAP_TRACKING | |
437 | ||
438 | #define __HAVE_PHYS_MEM_ACCESS_PROT | |
439 | struct file; | |
440 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | |
441 | unsigned long size, pgprot_t vma_prot); | |
442 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | |
443 | unsigned long size, pgprot_t *vma_prot); | |
444 | ||
445 | /* Install a pte for a particular vaddr in kernel space. */ | |
446 | void set_pte_vaddr(unsigned long vaddr, pte_t pte); | |
447 | ||
448 | #ifdef CONFIG_X86_32 | |
7737b215 | 449 | extern void native_pagetable_init(void); |
8d19c99f | 450 | #else |
843b8ed2 | 451 | #define native_pagetable_init paging_init |
8d19c99f JF |
452 | #endif |
453 | ||
454 | struct seq_file; | |
455 | extern void arch_report_meminfo(struct seq_file *m); | |
456 | ||
4cbeb51b | 457 | enum pg_level { |
8d19c99f JF |
458 | PG_LEVEL_NONE, |
459 | PG_LEVEL_4K, | |
460 | PG_LEVEL_2M, | |
461 | PG_LEVEL_1G, | |
462 | PG_LEVEL_NUM | |
463 | }; | |
464 | ||
465 | #ifdef CONFIG_PROC_FS | |
466 | extern void update_page_count(int level, unsigned long pages); | |
467 | #else | |
468 | static inline void update_page_count(int level, unsigned long pages) { } | |
469 | #endif | |
470 | ||
471 | /* | |
472 | * Helper function that returns the kernel pagetable entry controlling | |
473 | * the virtual address 'address'. NULL means no pagetable entry present. | |
474 | * NOTE: the return type is pte_t but if the pmd is PSE then we return it | |
475 | * as a pte too. | |
476 | */ | |
477 | extern pte_t *lookup_address(unsigned long address, unsigned int *level); | |
426e34cc MF |
478 | extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, |
479 | unsigned int *level); | |
792230c3 | 480 | extern pmd_t *lookup_pmd_address(unsigned long address); |
d7656534 | 481 | extern phys_addr_t slow_virt_to_phys(void *__address); |
d2f7cbe7 BP |
482 | extern int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address, |
483 | unsigned numpages, unsigned long page_flags); | |
8d19c99f JF |
484 | #endif /* !__ASSEMBLY__ */ |
485 | ||
486 | #endif /* _ASM_X86_PGTABLE_DEFS_H */ |