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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1965aae3 PA |
2 | #ifndef _ASM_X86_PGTABLE_64_H |
3 | #define _ASM_X86_PGTABLE_64_H | |
1da177e4 | 4 | |
6df95fd7 | 5 | #include <linux/const.h> |
fb355149 JF |
6 | #include <asm/pgtable_64_types.h> |
7 | ||
9d291e78 VG |
8 | #ifndef __ASSEMBLY__ |
9 | ||
1da177e4 LT |
10 | /* |
11 | * This file contains the functions and defines necessary to modify and use | |
12 | * the x86-64 page table tree. | |
13 | */ | |
14 | #include <asm/processor.h> | |
1977f032 | 15 | #include <linux/bitops.h> |
1da177e4 | 16 | #include <linux/threads.h> |
05ab1d8a | 17 | #include <asm/fixmap.h> |
1da177e4 | 18 | |
032370b9 KS |
19 | extern p4d_t level4_kernel_pgt[512]; |
20 | extern p4d_t level4_ident_pgt[512]; | |
1da177e4 | 21 | extern pud_t level3_kernel_pgt[512]; |
1da177e4 LT |
22 | extern pud_t level3_ident_pgt[512]; |
23 | extern pmd_t level2_kernel_pgt[512]; | |
084a2a4e JF |
24 | extern pmd_t level2_fixmap_pgt[512]; |
25 | extern pmd_t level2_ident_pgt[512]; | |
05ab1d8a | 26 | extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM]; |
65ade2f8 | 27 | extern pgd_t init_top_pgt[]; |
1da177e4 | 28 | |
65ade2f8 | 29 | #define swapper_pg_dir init_top_pgt |
1da177e4 | 30 | |
1da177e4 | 31 | extern void paging_init(void); |
945fd17a | 32 | static inline void sync_initial_page_table(void) { } |
1da177e4 | 33 | |
7f94401e | 34 | #define pte_ERROR(e) \ |
c767a54b | 35 | pr_err("%s:%d: bad pte %p(%016lx)\n", \ |
7f94401e JP |
36 | __FILE__, __LINE__, &(e), pte_val(e)) |
37 | #define pmd_ERROR(e) \ | |
c767a54b | 38 | pr_err("%s:%d: bad pmd %p(%016lx)\n", \ |
7f94401e JP |
39 | __FILE__, __LINE__, &(e), pmd_val(e)) |
40 | #define pud_ERROR(e) \ | |
c767a54b | 41 | pr_err("%s:%d: bad pud %p(%016lx)\n", \ |
7f94401e | 42 | __FILE__, __LINE__, &(e), pud_val(e)) |
b8504058 KS |
43 | |
44 | #if CONFIG_PGTABLE_LEVELS >= 5 | |
45 | #define p4d_ERROR(e) \ | |
46 | pr_err("%s:%d: bad p4d %p(%016lx)\n", \ | |
47 | __FILE__, __LINE__, &(e), p4d_val(e)) | |
48 | #endif | |
49 | ||
7f94401e | 50 | #define pgd_ERROR(e) \ |
c767a54b | 51 | pr_err("%s:%d: bad pgd %p(%016lx)\n", \ |
7f94401e | 52 | __FILE__, __LINE__, &(e), pgd_val(e)) |
1da177e4 | 53 | |
4891645e JF |
54 | struct mm_struct; |
55 | ||
f2a6a705 | 56 | void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte); |
0814e0ba EH |
57 | void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte); |
58 | ||
9bc4f28a | 59 | static inline void native_set_pte(pte_t *ptep, pte_t pte) |
1da177e4 | 60 | { |
9bc4f28a | 61 | WRITE_ONCE(*ptep, pte); |
4891645e | 62 | } |
1da177e4 | 63 | |
9bc4f28a NA |
64 | static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, |
65 | pte_t *ptep) | |
1da177e4 | 66 | { |
9bc4f28a | 67 | native_set_pte(ptep, native_make_pte(0)); |
4891645e | 68 | } |
1da177e4 | 69 | |
b65e6390 IM |
70 | static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) |
71 | { | |
72 | native_set_pte(ptep, pte); | |
73 | } | |
74 | ||
db3eb96f AA |
75 | static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd) |
76 | { | |
9bc4f28a | 77 | WRITE_ONCE(*pmdp, pmd); |
db3eb96f AA |
78 | } |
79 | ||
80 | static inline void native_pmd_clear(pmd_t *pmd) | |
81 | { | |
82 | native_set_pmd(pmd, native_make_pmd(0)); | |
83 | } | |
84 | ||
4891645e | 85 | static inline pte_t native_ptep_get_and_clear(pte_t *xp) |
1da177e4 | 86 | { |
4891645e JF |
87 | #ifdef CONFIG_SMP |
88 | return native_make_pte(xchg(&xp->pte, 0)); | |
89 | #else | |
7f94401e JP |
90 | /* native_local_ptep_get_and_clear, |
91 | but duplicated because of cyclic dependency */ | |
4891645e JF |
92 | pte_t ret = *xp; |
93 | native_pte_clear(NULL, 0, xp); | |
94 | return ret; | |
95 | #endif | |
1da177e4 LT |
96 | } |
97 | ||
db3eb96f | 98 | static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp) |
1da177e4 | 99 | { |
db3eb96f AA |
100 | #ifdef CONFIG_SMP |
101 | return native_make_pmd(xchg(&xp->pmd, 0)); | |
102 | #else | |
103 | /* native_local_pmdp_get_and_clear, | |
104 | but duplicated because of cyclic dependency */ | |
105 | pmd_t ret = *xp; | |
106 | native_pmd_clear(xp); | |
107 | return ret; | |
108 | #endif | |
4891645e | 109 | } |
1da177e4 | 110 | |
4891645e | 111 | static inline void native_set_pud(pud_t *pudp, pud_t pud) |
1da177e4 | 112 | { |
9bc4f28a | 113 | WRITE_ONCE(*pudp, pud); |
1da177e4 LT |
114 | } |
115 | ||
4891645e JF |
116 | static inline void native_pud_clear(pud_t *pud) |
117 | { | |
118 | native_set_pud(pud, native_make_pud(0)); | |
119 | } | |
61e06037 | 120 | |
a00cc7d9 MW |
121 | static inline pud_t native_pudp_get_and_clear(pud_t *xp) |
122 | { | |
123 | #ifdef CONFIG_SMP | |
124 | return native_make_pud(xchg(&xp->pud, 0)); | |
125 | #else | |
126 | /* native_local_pudp_get_and_clear, | |
127 | * but duplicated because of cyclic dependency | |
128 | */ | |
129 | pud_t ret = *xp; | |
130 | ||
131 | native_pud_clear(xp); | |
132 | return ret; | |
133 | #endif | |
f2a6a705 KS |
134 | } |
135 | ||
b8c1e429 | 136 | static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d) |
f2a6a705 | 137 | { |
91f606a8 KS |
138 | pgd_t pgd; |
139 | ||
ed7588d5 | 140 | if (pgtable_l5_enabled() || !IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) { |
9bc4f28a | 141 | WRITE_ONCE(*p4dp, p4d); |
91f606a8 KS |
142 | return; |
143 | } | |
144 | ||
a5b162b2 | 145 | pgd = native_make_pgd(native_p4d_val(p4d)); |
23b77288 | 146 | pgd = pti_set_user_pgtbl((pgd_t *)p4dp, pgd); |
9bc4f28a | 147 | WRITE_ONCE(*p4dp, native_make_p4d(native_pgd_val(pgd))); |
f2a6a705 KS |
148 | } |
149 | ||
b8c1e429 | 150 | static inline void native_p4d_clear(p4d_t *p4d) |
f2a6a705 | 151 | { |
b8504058 | 152 | native_set_p4d(p4d, native_make_p4d(0)); |
a00cc7d9 MW |
153 | } |
154 | ||
4891645e JF |
155 | static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd) |
156 | { | |
9bc4f28a | 157 | WRITE_ONCE(*pgdp, pti_set_user_pgtbl(pgdp, pgd)); |
4891645e | 158 | } |
8c65b4a6 | 159 | |
7f94401e | 160 | static inline void native_pgd_clear(pgd_t *pgd) |
61e06037 | 161 | { |
4891645e | 162 | native_set_pgd(pgd, native_make_pgd(0)); |
61e06037 ZA |
163 | } |
164 | ||
5372e155 | 165 | extern void sync_global_pgds(unsigned long start, unsigned long end); |
6afb5157 | 166 | |
1da177e4 LT |
167 | /* |
168 | * Conversion functions: convert a page and protection to a page entry, | |
169 | * and a page entry and page directory to the page they refer to. | |
170 | */ | |
171 | ||
1da177e4 LT |
172 | /* |
173 | * Level 4 access. | |
174 | */ | |
e7a9b0b3 | 175 | #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE) |
1da177e4 LT |
176 | |
177 | /* PUD - Level3 access */ | |
1da177e4 | 178 | |
1da177e4 | 179 | /* PMD - Level 2 access */ |
1da177e4 LT |
180 | |
181 | /* PTE - Level 1 access. */ | |
182 | ||
1da177e4 | 183 | /* x86-64 always has all page tables mapped. */ |
7f94401e | 184 | #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) |
4e60c86b | 185 | #define pte_unmap(pte) ((void)(pte))/* NOP */ |
1da177e4 | 186 | |
00839ee3 DH |
187 | /* |
188 | * Encode and de-code a swap entry | |
189 | * | |
eee4818b NH |
190 | * | ... | 11| 10| 9|8|7|6|5| 4| 3|2| 1|0| <- bit number |
191 | * | ... |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names | |
2f22b4cd | 192 | * | TYPE (59-63) | ~OFFSET (9-58) |0|0|X|X| X| X|X|SD|0| <- swp entry |
00839ee3 DH |
193 | * |
194 | * G (8) is aliased and used as a PROT_NONE indicator for | |
195 | * !present ptes. We need to start storing swap entries above | |
196 | * there. We also need to avoid using A and D because of an | |
197 | * erratum where they can be incorrectly set by hardware on | |
198 | * non-present PTEs. | |
eee4818b NH |
199 | * |
200 | * SD (1) in swp entry is used to store soft dirty bit, which helps us | |
201 | * remember soft dirty over page migration | |
202 | * | |
203 | * Bit 7 in swp entry should be 0 because pmd_present checks not only P, | |
204 | * but also L and G. | |
2f22b4cd LT |
205 | * |
206 | * The offset is inverted by a binary not operation to make the high | |
207 | * physical bits set. | |
00839ee3 | 208 | */ |
bcd11afa LT |
209 | #define SWP_TYPE_BITS 5 |
210 | ||
211 | #define SWP_OFFSET_FIRST_BIT (_PAGE_BIT_PROTNONE + 1) | |
212 | ||
213 | /* We always extract/encode the offset by shifting it all the way up, and then down again */ | |
214 | #define SWP_OFFSET_SHIFT (SWP_OFFSET_FIRST_BIT+SWP_TYPE_BITS) | |
1796316a JB |
215 | |
216 | #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS) | |
217 | ||
bcd11afa LT |
218 | /* Extract the high bits for type */ |
219 | #define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS)) | |
220 | ||
221 | /* Shift up (to get rid of type), then down to get value */ | |
2f22b4cd | 222 | #define __swp_offset(x) (~(x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT) |
bcd11afa LT |
223 | |
224 | /* | |
225 | * Shift the offset up "too far" by TYPE bits, then down again | |
2f22b4cd LT |
226 | * The offset is inverted by a binary not operation to make the high |
227 | * physical bits set. | |
bcd11afa LT |
228 | */ |
229 | #define __swp_entry(type, offset) ((swp_entry_t) { \ | |
2f22b4cd | 230 | (~(unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \ |
bcd11afa LT |
231 | | ((unsigned long)(type) << (64-SWP_TYPE_BITS)) }) |
232 | ||
7f94401e | 233 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) }) |
616b8371 | 234 | #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val((pmd)) }) |
c8e5393a | 235 | #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) |
616b8371 | 236 | #define __swp_entry_to_pmd(x) ((pmd_t) { .pmd = (x).val }) |
1da177e4 | 237 | |
7f94401e | 238 | extern int kern_addr_valid(unsigned long addr); |
31eedd82 | 239 | extern void cleanup_highmap(void); |
1da177e4 | 240 | |
1da177e4 | 241 | #define HAVE_ARCH_UNMAPPED_AREA |
cc503c1b | 242 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN |
1da177e4 | 243 | |
1da177e4 LT |
244 | #define PAGE_AGP PAGE_KERNEL_NOCACHE |
245 | #define HAVE_PAGE_AGP 1 | |
246 | ||
247 | /* fs/proc/kcore.c */ | |
248 | #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK) | |
9063c61f | 249 | #define kc_offset_to_vaddr(o) ((o) | ~__VIRTUAL_MASK) |
1da177e4 | 250 | |
1da177e4 | 251 | #define __HAVE_ARCH_PTE_SAME |
5f6e8da7 | 252 | |
fb50b020 AD |
253 | #define vmemmap ((struct page *)VMEMMAP_START) |
254 | ||
255 | extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); | |
256 | extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); | |
257 | ||
e585513b | 258 | #define gup_fast_permitted gup_fast_permitted |
26f4c328 | 259 | static inline bool gup_fast_permitted(unsigned long start, unsigned long end) |
e585513b | 260 | { |
e585513b KS |
261 | if (end >> __VIRTUAL_MASK_SHIFT) |
262 | return false; | |
263 | return true; | |
264 | } | |
6dd29b3d | 265 | |
6b28baca AK |
266 | #include <asm/pgtable-invert.h> |
267 | ||
e585513b | 268 | #endif /* !__ASSEMBLY__ */ |
1965aae3 | 269 | #endif /* _ASM_X86_PGTABLE_64_H */ |