Merge branch 'topic/oss' into for-linus
[linux-2.6-block.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
15 : (prot))
16
4614139c 17#ifndef __ASSEMBLY__
195466dc 18
8405b122
JF
19/*
20 * ZERO_PAGE is a global shared page that is always zero: used
21 * for zero-mapped memory areas etc..
22 */
3cbaeafe 23extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
24#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
25
e3ed910d
JF
26extern spinlock_t pgd_lock;
27extern struct list_head pgd_list;
8405b122 28
54321d94
JF
29#ifdef CONFIG_PARAVIRT
30#include <asm/paravirt.h>
31#else /* !CONFIG_PARAVIRT */
32#define set_pte(ptep, pte) native_set_pte(ptep, pte)
33#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
34
54321d94
JF
35#define set_pte_atomic(ptep, pte) \
36 native_set_pte_atomic(ptep, pte)
37
38#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
39
40#ifndef __PAGETABLE_PUD_FOLDED
41#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
42#define pgd_clear(pgd) native_pgd_clear(pgd)
43#endif
44
45#ifndef set_pud
46# define set_pud(pudp, pud) native_set_pud(pudp, pud)
47#endif
48
49#ifndef __PAGETABLE_PMD_FOLDED
50#define pud_clear(pud) native_pud_clear(pud)
51#endif
52
53#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
54#define pmd_clear(pmd) native_pmd_clear(pmd)
55
56#define pte_update(mm, addr, ptep) do { } while (0)
57#define pte_update_defer(mm, addr, ptep) do { } while (0)
58
59static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
60{
61 native_pagetable_setup_start(base);
62}
63
64static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
65{
66 native_pagetable_setup_done(base);
67}
68
69#define pgd_val(x) native_pgd_val(x)
70#define __pgd(x) native_make_pgd(x)
71
72#ifndef __PAGETABLE_PUD_FOLDED
73#define pud_val(x) native_pud_val(x)
74#define __pud(x) native_make_pud(x)
75#endif
76
77#ifndef __PAGETABLE_PMD_FOLDED
78#define pmd_val(x) native_pmd_val(x)
79#define __pmd(x) native_make_pmd(x)
80#endif
81
82#define pte_val(x) native_pte_val(x)
83#define __pte(x) native_make_pte(x)
84
224101ed
JF
85#define arch_end_context_switch(prev) do {} while(0)
86
54321d94
JF
87#endif /* CONFIG_PARAVIRT */
88
4614139c
JF
89/*
90 * The following only work if pte_present() is true.
91 * Undefined behaviour if not..
92 */
3cbaeafe
JP
93static inline int pte_dirty(pte_t pte)
94{
a15af1c9 95 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
96}
97
98static inline int pte_young(pte_t pte)
99{
a15af1c9 100 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
101}
102
103static inline int pte_write(pte_t pte)
104{
a15af1c9 105 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
106}
107
108static inline int pte_file(pte_t pte)
109{
a15af1c9 110 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
111}
112
113static inline int pte_huge(pte_t pte)
114{
a15af1c9 115 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
116}
117
3cbaeafe
JP
118static inline int pte_global(pte_t pte)
119{
a15af1c9 120 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
121}
122
123static inline int pte_exec(pte_t pte)
124{
a15af1c9 125 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
126}
127
7e675137
NP
128static inline int pte_special(pte_t pte)
129{
606ee44d 130 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
131}
132
91030ca1
HD
133static inline unsigned long pte_pfn(pte_t pte)
134{
135 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
136}
137
138#define pte_page(pte) pfn_to_page(pte_pfn(pte))
139
3cbaeafe
JP
140static inline int pmd_large(pmd_t pte)
141{
18a7a199 142 return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3cbaeafe
JP
143 (_PAGE_PSE | _PAGE_PRESENT);
144}
145
6522869c
JF
146static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
147{
148 pteval_t v = native_pte_val(pte);
149
150 return native_make_pte(v | set);
151}
152
153static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
154{
155 pteval_t v = native_pte_val(pte);
156
157 return native_make_pte(v & ~clear);
158}
159
3cbaeafe
JP
160static inline pte_t pte_mkclean(pte_t pte)
161{
6522869c 162 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
163}
164
165static inline pte_t pte_mkold(pte_t pte)
166{
6522869c 167 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
168}
169
170static inline pte_t pte_wrprotect(pte_t pte)
171{
6522869c 172 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
173}
174
175static inline pte_t pte_mkexec(pte_t pte)
176{
6522869c 177 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
178}
179
180static inline pte_t pte_mkdirty(pte_t pte)
181{
6522869c 182 return pte_set_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
183}
184
185static inline pte_t pte_mkyoung(pte_t pte)
186{
6522869c 187 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
188}
189
190static inline pte_t pte_mkwrite(pte_t pte)
191{
6522869c 192 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
193}
194
195static inline pte_t pte_mkhuge(pte_t pte)
196{
6522869c 197 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
198}
199
200static inline pte_t pte_clrhuge(pte_t pte)
201{
6522869c 202 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
203}
204
205static inline pte_t pte_mkglobal(pte_t pte)
206{
6522869c 207 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
208}
209
210static inline pte_t pte_clrglobal(pte_t pte)
211{
6522869c 212 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 213}
4614139c 214
7e675137
NP
215static inline pte_t pte_mkspecial(pte_t pte)
216{
6522869c 217 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
218}
219
b534816b
JF
220/*
221 * Mask out unsupported bits in a present pgprot. Non-present pgprots
222 * can use those bits for other purposes, so leave them be.
223 */
224static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
225{
226 pgprotval_t protval = pgprot_val(pgprot);
227
228 if (protval & _PAGE_PRESENT)
229 protval &= __supported_pte_mask;
230
231 return protval;
232}
233
6fdc05d4
JF
234static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
235{
b534816b
JF
236 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
237 massage_pgprot(pgprot));
6fdc05d4
JF
238}
239
240static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
241{
b534816b
JF
242 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
243 massage_pgprot(pgprot));
6fdc05d4
JF
244}
245
38472311
IM
246static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
247{
248 pteval_t val = pte_val(pte);
249
250 /*
251 * Chop off the NX bit (if present), and add the NX portion of
252 * the newprot (if present):
253 */
1c12c4cf 254 val &= _PAGE_CHG_MASK;
b534816b 255 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
256
257 return __pte(val);
258}
259
1c12c4cf
VP
260/* mprotect needs to preserve PAT bits when updating vm_page_prot */
261#define pgprot_modify pgprot_modify
262static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
263{
264 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
265 pgprotval_t addbits = pgprot_val(newprot);
266 return __pgprot(preservebits | addbits);
267}
268
77be1fab 269#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 270
b534816b 271#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 272
1adcaafe
SS
273static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
274 unsigned long flags,
275 unsigned long new_flags)
afc7d20c 276{
1adcaafe
SS
277 /*
278 * PAT type is always WB for ISA. So no need to check.
279 */
280 if (is_ISA_range(paddr, paddr + size - 1))
281 return 1;
282
afc7d20c 283 /*
284 * Certain new memtypes are not allowed with certain
285 * requested memtype:
286 * - request is uncached, return cannot be write-back
287 * - request is write-combine, return cannot be write-back
288 */
289 if ((flags == _PAGE_CACHE_UC_MINUS &&
290 new_flags == _PAGE_CACHE_WB) ||
291 (flags == _PAGE_CACHE_WC &&
292 new_flags == _PAGE_CACHE_WB)) {
293 return 0;
294 }
295
296 return 1;
297}
298
458a3e64
TH
299pmd_t *populate_extra_pmd(unsigned long vaddr);
300pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
301#endif /* __ASSEMBLY__ */
302
96a388de
TG
303#ifdef CONFIG_X86_32
304# include "pgtable_32.h"
305#else
306# include "pgtable_64.h"
307#endif
6c386655 308
aca159db 309#ifndef __ASSEMBLY__
f476961c 310#include <linux/mm_types.h>
aca159db 311
a034a010
JF
312static inline int pte_none(pte_t pte)
313{
314 return !pte.pte;
315}
316
8de01da3
JF
317#define __HAVE_ARCH_PTE_SAME
318static inline int pte_same(pte_t a, pte_t b)
319{
320 return a.pte == b.pte;
321}
322
7c683851
JF
323static inline int pte_present(pte_t a)
324{
325 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
326}
327
eb63657e 328static inline int pte_hidden(pte_t pte)
dfec072e 329{
eb63657e 330 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
331}
332
649e8ef6
JF
333static inline int pmd_present(pmd_t pmd)
334{
18a7a199 335 return pmd_flags(pmd) & _PAGE_PRESENT;
649e8ef6
JF
336}
337
4fea801a
JF
338static inline int pmd_none(pmd_t pmd)
339{
340 /* Only check low word on 32-bit platforms, since it might be
341 out of sync with upper half. */
26c8e317 342 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
343}
344
3ffb3564
JF
345static inline unsigned long pmd_page_vaddr(pmd_t pmd)
346{
347 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
348}
349
e5f7f202
IM
350/*
351 * Currently stuck as a macro due to indirect forward reference to
352 * linux/mmzone.h's __section_mem_map_addr() definition:
353 */
354#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
20063ca4 355
e24d7eee
JF
356/*
357 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
358 *
359 * this macro returns the index of the entry in the pmd page which would
360 * control the given virtual address
361 */
362static inline unsigned pmd_index(unsigned long address)
363{
364 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
365}
366
97e2817d
JF
367/*
368 * Conversion functions: convert a page and protection to a page entry,
369 * and a page entry and page directory to the page they refer to.
370 *
371 * (Currently stuck as a macro because of indirect forward reference
372 * to linux/mm.h:page_to_nid())
373 */
374#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
375
346309cf
JF
376/*
377 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
378 *
379 * this function returns the index of the entry in the pte page which would
380 * control the given virtual address
381 */
382static inline unsigned pte_index(unsigned long address)
383{
384 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
385}
386
3fbc2444
JF
387static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
388{
389 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
390}
391
99510238
JF
392static inline int pmd_bad(pmd_t pmd)
393{
18a7a199 394 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
395}
396
cc290ca3
JF
397static inline unsigned long pages_to_mb(unsigned long npg)
398{
399 return npg >> (20 - PAGE_SHIFT);
400}
401
6cf71500
JF
402#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
403 remap_pfn_range(vma, vaddr, pfn, size, prot)
404
5ba7c913 405#if PAGETABLE_LEVELS > 2
deb79cfb
JF
406static inline int pud_none(pud_t pud)
407{
26c8e317 408 return native_pud_val(pud) == 0;
deb79cfb
JF
409}
410
5ba7c913
JF
411static inline int pud_present(pud_t pud)
412{
18a7a199 413 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 414}
6fff47e3
JF
415
416static inline unsigned long pud_page_vaddr(pud_t pud)
417{
418 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
419}
f476961c 420
e5f7f202
IM
421/*
422 * Currently stuck as a macro due to indirect forward reference to
423 * linux/mmzone.h's __section_mem_map_addr() definition:
424 */
425#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
01ade20d
JF
426
427/* Find an entry in the second-level page table.. */
428static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
429{
430 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
431}
3180fba0
JF
432
433static inline unsigned long pmd_pfn(pmd_t pmd)
434{
435 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
436}
3f6cbef1
JF
437
438static inline int pud_large(pud_t pud)
439{
e2f5bda9 440 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
441 (_PAGE_PSE | _PAGE_PRESENT);
442}
a61bb29a
JF
443
444static inline int pud_bad(pud_t pud)
445{
18a7a199 446 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 447}
e2f5bda9
JF
448#else
449static inline int pud_large(pud_t pud)
450{
451 return 0;
452}
5ba7c913
JF
453#endif /* PAGETABLE_LEVELS > 2 */
454
9f38d7e8
JF
455#if PAGETABLE_LEVELS > 3
456static inline int pgd_present(pgd_t pgd)
457{
18a7a199 458 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 459}
c5f040b1
JF
460
461static inline unsigned long pgd_page_vaddr(pgd_t pgd)
462{
463 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
464}
777cba16 465
e5f7f202
IM
466/*
467 * Currently stuck as a macro due to indirect forward reference to
468 * linux/mmzone.h's __section_mem_map_addr() definition:
469 */
470#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
7cfb8102
JF
471
472/* to find an entry in a page-table-directory. */
473static inline unsigned pud_index(unsigned long address)
474{
475 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
476}
3d081b18
JF
477
478static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
479{
480 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
481}
30f10316
JF
482
483static inline int pgd_bad(pgd_t pgd)
484{
18a7a199 485 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 486}
7325cc2e
JF
487
488static inline int pgd_none(pgd_t pgd)
489{
26c8e317 490 return !native_pgd_val(pgd);
7325cc2e 491}
9f38d7e8
JF
492#endif /* PAGETABLE_LEVELS > 3 */
493
4614139c
JF
494#endif /* __ASSEMBLY__ */
495
fb15a9b3
JF
496/*
497 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
498 *
499 * this macro returns the index of the entry in the pgd page which would
500 * control the given virtual address
501 */
502#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
503
504/*
505 * pgd_offset() returns a (pgd_t *)
506 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
507 */
508#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
509/*
510 * a shortcut which implies the use of the kernel's pgd, instead
511 * of a process's
512 */
513#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
514
515
68db065c
JF
516#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
517#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
518
195466dc
JF
519#ifndef __ASSEMBLY__
520
2c1b284e
JSR
521extern int direct_gbpages;
522
4891645e
JF
523/* local pte updates need not use xchg for locking */
524static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
525{
526 pte_t res = *ptep;
527
528 /* Pure native function needs no input for mm, addr */
529 native_pte_clear(NULL, 0, ptep);
530 return res;
531}
532
533static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
534 pte_t *ptep , pte_t pte)
535{
536 native_set_pte(ptep, pte);
537}
538
195466dc
JF
539#ifndef CONFIG_PARAVIRT
540/*
541 * Rules for using pte_update - it must be called after any PTE update which
542 * has not been done using the set_pte / clear_pte interfaces. It is used by
543 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
544 * updates should either be sets, clears, or set_pte_atomic for P->P
545 * transitions, which means this hook should only be called for user PTEs.
546 * This hook implies a P->P protection or access change has taken place, which
547 * requires a subsequent TLB flush. The notification can optionally be delayed
548 * until the TLB flush event by using the pte_update_defer form of the
549 * interface, but care must be taken to assure that the flush happens while
550 * still holding the same page table lock so that the shadow and primary pages
551 * do not become out of sync on SMP.
552 */
553#define pte_update(mm, addr, ptep) do { } while (0)
554#define pte_update_defer(mm, addr, ptep) do { } while (0)
555#endif
556
195466dc
JF
557/*
558 * We only update the dirty/accessed state if we set
559 * the dirty bit by hand in the kernel, since the hardware
560 * will do the accessed bit for us, and we don't want to
561 * race with other CPU's that might be updating the dirty
562 * bit at the same time.
563 */
bea41808
JF
564struct vm_area_struct;
565
195466dc 566#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
567extern int ptep_set_access_flags(struct vm_area_struct *vma,
568 unsigned long address, pte_t *ptep,
569 pte_t entry, int dirty);
195466dc
JF
570
571#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
572extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
573 unsigned long addr, pte_t *ptep);
195466dc
JF
574
575#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
576extern int ptep_clear_flush_young(struct vm_area_struct *vma,
577 unsigned long address, pte_t *ptep);
195466dc
JF
578
579#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
580static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
581 pte_t *ptep)
195466dc
JF
582{
583 pte_t pte = native_ptep_get_and_clear(ptep);
584 pte_update(mm, addr, ptep);
585 return pte;
586}
587
588#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
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589static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
590 unsigned long addr, pte_t *ptep,
591 int full)
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592{
593 pte_t pte;
594 if (full) {
595 /*
596 * Full address destruction in progress; paravirt does not
597 * care about updates and native needs no locking
598 */
599 pte = native_local_ptep_get_and_clear(ptep);
600 } else {
601 pte = ptep_get_and_clear(mm, addr, ptep);
602 }
603 return pte;
604}
605
606#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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607static inline void ptep_set_wrprotect(struct mm_struct *mm,
608 unsigned long addr, pte_t *ptep)
195466dc 609{
d8d89827 610 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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611 pte_update(mm, addr, ptep);
612}
613
85958b46
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614/*
615 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
616 *
617 * dst - pointer to pgd range anwhere on a pgd page
618 * src - ""
619 * count - the number of pgds to copy.
620 *
621 * dst and src can be on the same page, but the range must not overlap,
622 * and must not cross a page boundary.
623 */
624static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
625{
626 memcpy(dst, src, count * sizeof(pgd_t));
627}
628
629
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630#include <asm-generic/pgtable.h>
631#endif /* __ASSEMBLY__ */
632
1965aae3 633#endif /* _ASM_X86_PGTABLE_H */