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1965aae3 PA |
1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | |
6c386655 | 3 | |
c47c1b1f | 4 | #include <asm/page.h> |
1adcaafe | 5 | #include <asm/e820.h> |
c47c1b1f | 6 | |
8d19c99f | 7 | #include <asm/pgtable_types.h> |
b2bc2731 | 8 | |
8a7b12f7 | 9 | /* |
10 | * Macro to mark a page protection value as UC- | |
11 | */ | |
12 | #define pgprot_noncached(prot) \ | |
13 | ((boot_cpu_data.x86 > 3) \ | |
14 | ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \ | |
15 | : (prot)) | |
16 | ||
4614139c | 17 | #ifndef __ASSEMBLY__ |
195466dc | 18 | |
55a6ca25 PA |
19 | #include <asm/x86_init.h> |
20 | ||
8405b122 JF |
21 | /* |
22 | * ZERO_PAGE is a global shared page that is always zero: used | |
23 | * for zero-mapped memory areas etc.. | |
24 | */ | |
277d5b40 AK |
25 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
26 | __visible; | |
8405b122 JF |
27 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
28 | ||
e3ed910d JF |
29 | extern spinlock_t pgd_lock; |
30 | extern struct list_head pgd_list; | |
8405b122 | 31 | |
617d34d9 JF |
32 | extern struct mm_struct *pgd_page_get_mm(struct page *page); |
33 | ||
54321d94 JF |
34 | #ifdef CONFIG_PARAVIRT |
35 | #include <asm/paravirt.h> | |
36 | #else /* !CONFIG_PARAVIRT */ | |
37 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | |
38 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | |
2609ae6d | 39 | #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) |
54321d94 | 40 | |
54321d94 JF |
41 | #define set_pte_atomic(ptep, pte) \ |
42 | native_set_pte_atomic(ptep, pte) | |
43 | ||
44 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | |
45 | ||
46 | #ifndef __PAGETABLE_PUD_FOLDED | |
47 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | |
48 | #define pgd_clear(pgd) native_pgd_clear(pgd) | |
49 | #endif | |
50 | ||
51 | #ifndef set_pud | |
52 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | |
53 | #endif | |
54 | ||
55 | #ifndef __PAGETABLE_PMD_FOLDED | |
56 | #define pud_clear(pud) native_pud_clear(pud) | |
57 | #endif | |
58 | ||
59 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | |
60 | #define pmd_clear(pmd) native_pmd_clear(pmd) | |
61 | ||
62 | #define pte_update(mm, addr, ptep) do { } while (0) | |
63 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | |
2609ae6d AA |
64 | #define pmd_update(mm, addr, ptep) do { } while (0) |
65 | #define pmd_update_defer(mm, addr, ptep) do { } while (0) | |
54321d94 | 66 | |
54321d94 JF |
67 | #define pgd_val(x) native_pgd_val(x) |
68 | #define __pgd(x) native_make_pgd(x) | |
69 | ||
70 | #ifndef __PAGETABLE_PUD_FOLDED | |
71 | #define pud_val(x) native_pud_val(x) | |
72 | #define __pud(x) native_make_pud(x) | |
73 | #endif | |
74 | ||
75 | #ifndef __PAGETABLE_PMD_FOLDED | |
76 | #define pmd_val(x) native_pmd_val(x) | |
77 | #define __pmd(x) native_make_pmd(x) | |
78 | #endif | |
79 | ||
80 | #define pte_val(x) native_pte_val(x) | |
81 | #define __pte(x) native_make_pte(x) | |
82 | ||
224101ed JF |
83 | #define arch_end_context_switch(prev) do {} while(0) |
84 | ||
54321d94 JF |
85 | #endif /* CONFIG_PARAVIRT */ |
86 | ||
4614139c JF |
87 | /* |
88 | * The following only work if pte_present() is true. | |
89 | * Undefined behaviour if not.. | |
90 | */ | |
3cbaeafe JP |
91 | static inline int pte_dirty(pte_t pte) |
92 | { | |
a15af1c9 | 93 | return pte_flags(pte) & _PAGE_DIRTY; |
3cbaeafe JP |
94 | } |
95 | ||
96 | static inline int pte_young(pte_t pte) | |
97 | { | |
a15af1c9 | 98 | return pte_flags(pte) & _PAGE_ACCESSED; |
3cbaeafe JP |
99 | } |
100 | ||
f2d6bfe9 JW |
101 | static inline int pmd_young(pmd_t pmd) |
102 | { | |
103 | return pmd_flags(pmd) & _PAGE_ACCESSED; | |
104 | } | |
105 | ||
3cbaeafe JP |
106 | static inline int pte_write(pte_t pte) |
107 | { | |
a15af1c9 | 108 | return pte_flags(pte) & _PAGE_RW; |
3cbaeafe JP |
109 | } |
110 | ||
111 | static inline int pte_file(pte_t pte) | |
112 | { | |
a15af1c9 | 113 | return pte_flags(pte) & _PAGE_FILE; |
3cbaeafe JP |
114 | } |
115 | ||
116 | static inline int pte_huge(pte_t pte) | |
117 | { | |
a15af1c9 | 118 | return pte_flags(pte) & _PAGE_PSE; |
4614139c JF |
119 | } |
120 | ||
3cbaeafe JP |
121 | static inline int pte_global(pte_t pte) |
122 | { | |
a15af1c9 | 123 | return pte_flags(pte) & _PAGE_GLOBAL; |
3cbaeafe JP |
124 | } |
125 | ||
126 | static inline int pte_exec(pte_t pte) | |
127 | { | |
a15af1c9 | 128 | return !(pte_flags(pte) & _PAGE_NX); |
3cbaeafe JP |
129 | } |
130 | ||
7e675137 NP |
131 | static inline int pte_special(pte_t pte) |
132 | { | |
606ee44d | 133 | return pte_flags(pte) & _PAGE_SPECIAL; |
7e675137 NP |
134 | } |
135 | ||
91030ca1 HD |
136 | static inline unsigned long pte_pfn(pte_t pte) |
137 | { | |
138 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
139 | } | |
140 | ||
087975b0 AM |
141 | static inline unsigned long pmd_pfn(pmd_t pmd) |
142 | { | |
143 | return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
144 | } | |
145 | ||
0ee364eb MG |
146 | static inline unsigned long pud_pfn(pud_t pud) |
147 | { | |
148 | return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
149 | } | |
150 | ||
91030ca1 HD |
151 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) |
152 | ||
3cbaeafe JP |
153 | static inline int pmd_large(pmd_t pte) |
154 | { | |
027ef6c8 | 155 | return pmd_flags(pte) & _PAGE_PSE; |
3cbaeafe JP |
156 | } |
157 | ||
f2d6bfe9 JW |
158 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
159 | static inline int pmd_trans_splitting(pmd_t pmd) | |
160 | { | |
161 | return pmd_val(pmd) & _PAGE_SPLITTING; | |
162 | } | |
163 | ||
164 | static inline int pmd_trans_huge(pmd_t pmd) | |
165 | { | |
166 | return pmd_val(pmd) & _PAGE_PSE; | |
167 | } | |
4b7167b9 AA |
168 | |
169 | static inline int has_transparent_hugepage(void) | |
170 | { | |
171 | return cpu_has_pse; | |
172 | } | |
f2d6bfe9 JW |
173 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
174 | ||
6522869c JF |
175 | static inline pte_t pte_set_flags(pte_t pte, pteval_t set) |
176 | { | |
177 | pteval_t v = native_pte_val(pte); | |
178 | ||
179 | return native_make_pte(v | set); | |
180 | } | |
181 | ||
182 | static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) | |
183 | { | |
184 | pteval_t v = native_pte_val(pte); | |
185 | ||
186 | return native_make_pte(v & ~clear); | |
187 | } | |
188 | ||
3cbaeafe JP |
189 | static inline pte_t pte_mkclean(pte_t pte) |
190 | { | |
6522869c | 191 | return pte_clear_flags(pte, _PAGE_DIRTY); |
3cbaeafe JP |
192 | } |
193 | ||
194 | static inline pte_t pte_mkold(pte_t pte) | |
195 | { | |
6522869c | 196 | return pte_clear_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
197 | } |
198 | ||
199 | static inline pte_t pte_wrprotect(pte_t pte) | |
200 | { | |
6522869c | 201 | return pte_clear_flags(pte, _PAGE_RW); |
3cbaeafe JP |
202 | } |
203 | ||
204 | static inline pte_t pte_mkexec(pte_t pte) | |
205 | { | |
6522869c | 206 | return pte_clear_flags(pte, _PAGE_NX); |
3cbaeafe JP |
207 | } |
208 | ||
209 | static inline pte_t pte_mkdirty(pte_t pte) | |
210 | { | |
0f8975ec | 211 | return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
3cbaeafe JP |
212 | } |
213 | ||
214 | static inline pte_t pte_mkyoung(pte_t pte) | |
215 | { | |
6522869c | 216 | return pte_set_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
217 | } |
218 | ||
219 | static inline pte_t pte_mkwrite(pte_t pte) | |
220 | { | |
6522869c | 221 | return pte_set_flags(pte, _PAGE_RW); |
3cbaeafe JP |
222 | } |
223 | ||
224 | static inline pte_t pte_mkhuge(pte_t pte) | |
225 | { | |
6522869c | 226 | return pte_set_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
227 | } |
228 | ||
229 | static inline pte_t pte_clrhuge(pte_t pte) | |
230 | { | |
6522869c | 231 | return pte_clear_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
232 | } |
233 | ||
234 | static inline pte_t pte_mkglobal(pte_t pte) | |
235 | { | |
6522869c | 236 | return pte_set_flags(pte, _PAGE_GLOBAL); |
3cbaeafe JP |
237 | } |
238 | ||
239 | static inline pte_t pte_clrglobal(pte_t pte) | |
240 | { | |
6522869c | 241 | return pte_clear_flags(pte, _PAGE_GLOBAL); |
3cbaeafe | 242 | } |
4614139c | 243 | |
7e675137 NP |
244 | static inline pte_t pte_mkspecial(pte_t pte) |
245 | { | |
6522869c | 246 | return pte_set_flags(pte, _PAGE_SPECIAL); |
7e675137 NP |
247 | } |
248 | ||
f2d6bfe9 JW |
249 | static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) |
250 | { | |
251 | pmdval_t v = native_pmd_val(pmd); | |
252 | ||
253 | return __pmd(v | set); | |
254 | } | |
255 | ||
256 | static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) | |
257 | { | |
258 | pmdval_t v = native_pmd_val(pmd); | |
259 | ||
260 | return __pmd(v & ~clear); | |
261 | } | |
262 | ||
263 | static inline pmd_t pmd_mkold(pmd_t pmd) | |
264 | { | |
265 | return pmd_clear_flags(pmd, _PAGE_ACCESSED); | |
266 | } | |
267 | ||
268 | static inline pmd_t pmd_wrprotect(pmd_t pmd) | |
269 | { | |
270 | return pmd_clear_flags(pmd, _PAGE_RW); | |
271 | } | |
272 | ||
273 | static inline pmd_t pmd_mkdirty(pmd_t pmd) | |
274 | { | |
0f8975ec | 275 | return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
f2d6bfe9 JW |
276 | } |
277 | ||
278 | static inline pmd_t pmd_mkhuge(pmd_t pmd) | |
279 | { | |
280 | return pmd_set_flags(pmd, _PAGE_PSE); | |
281 | } | |
282 | ||
283 | static inline pmd_t pmd_mkyoung(pmd_t pmd) | |
284 | { | |
285 | return pmd_set_flags(pmd, _PAGE_ACCESSED); | |
286 | } | |
287 | ||
288 | static inline pmd_t pmd_mkwrite(pmd_t pmd) | |
289 | { | |
290 | return pmd_set_flags(pmd, _PAGE_RW); | |
291 | } | |
292 | ||
293 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | |
294 | { | |
295 | return pmd_clear_flags(pmd, _PAGE_PRESENT); | |
296 | } | |
297 | ||
0f8975ec PE |
298 | static inline int pte_soft_dirty(pte_t pte) |
299 | { | |
300 | return pte_flags(pte) & _PAGE_SOFT_DIRTY; | |
301 | } | |
302 | ||
303 | static inline int pmd_soft_dirty(pmd_t pmd) | |
304 | { | |
305 | return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; | |
306 | } | |
307 | ||
308 | static inline pte_t pte_mksoft_dirty(pte_t pte) | |
309 | { | |
310 | return pte_set_flags(pte, _PAGE_SOFT_DIRTY); | |
311 | } | |
312 | ||
313 | static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) | |
314 | { | |
315 | return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); | |
316 | } | |
317 | ||
41bb3476 CG |
318 | static inline pte_t pte_file_clear_soft_dirty(pte_t pte) |
319 | { | |
320 | return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); | |
321 | } | |
322 | ||
323 | static inline pte_t pte_file_mksoft_dirty(pte_t pte) | |
324 | { | |
325 | return pte_set_flags(pte, _PAGE_SOFT_DIRTY); | |
326 | } | |
327 | ||
328 | static inline int pte_file_soft_dirty(pte_t pte) | |
329 | { | |
330 | return pte_flags(pte) & _PAGE_SOFT_DIRTY; | |
331 | } | |
332 | ||
b534816b JF |
333 | /* |
334 | * Mask out unsupported bits in a present pgprot. Non-present pgprots | |
335 | * can use those bits for other purposes, so leave them be. | |
336 | */ | |
337 | static inline pgprotval_t massage_pgprot(pgprot_t pgprot) | |
338 | { | |
339 | pgprotval_t protval = pgprot_val(pgprot); | |
340 | ||
341 | if (protval & _PAGE_PRESENT) | |
342 | protval &= __supported_pte_mask; | |
343 | ||
344 | return protval; | |
345 | } | |
346 | ||
6fdc05d4 JF |
347 | static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) |
348 | { | |
b534816b JF |
349 | return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | |
350 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
351 | } |
352 | ||
353 | static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) | |
354 | { | |
b534816b JF |
355 | return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | |
356 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
357 | } |
358 | ||
38472311 IM |
359 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
360 | { | |
361 | pteval_t val = pte_val(pte); | |
362 | ||
363 | /* | |
364 | * Chop off the NX bit (if present), and add the NX portion of | |
365 | * the newprot (if present): | |
366 | */ | |
1c12c4cf | 367 | val &= _PAGE_CHG_MASK; |
b534816b | 368 | val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; |
38472311 IM |
369 | |
370 | return __pte(val); | |
371 | } | |
372 | ||
c489f125 JW |
373 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) |
374 | { | |
375 | pmdval_t val = pmd_val(pmd); | |
376 | ||
377 | val &= _HPAGE_CHG_MASK; | |
378 | val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; | |
379 | ||
380 | return __pmd(val); | |
381 | } | |
382 | ||
1c12c4cf VP |
383 | /* mprotect needs to preserve PAT bits when updating vm_page_prot */ |
384 | #define pgprot_modify pgprot_modify | |
385 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
386 | { | |
387 | pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; | |
388 | pgprotval_t addbits = pgprot_val(newprot); | |
389 | return __pgprot(preservebits | addbits); | |
390 | } | |
391 | ||
77be1fab | 392 | #define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) |
c6ca18eb | 393 | |
b534816b | 394 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) |
1e8e23bc | 395 | |
1adcaafe SS |
396 | static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, |
397 | unsigned long flags, | |
398 | unsigned long new_flags) | |
afc7d20c | 399 | { |
1adcaafe | 400 | /* |
55a6ca25 | 401 | * PAT type is always WB for untracked ranges, so no need to check. |
1adcaafe | 402 | */ |
8a271389 | 403 | if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) |
1adcaafe SS |
404 | return 1; |
405 | ||
afc7d20c | 406 | /* |
407 | * Certain new memtypes are not allowed with certain | |
408 | * requested memtype: | |
409 | * - request is uncached, return cannot be write-back | |
410 | * - request is write-combine, return cannot be write-back | |
411 | */ | |
412 | if ((flags == _PAGE_CACHE_UC_MINUS && | |
413 | new_flags == _PAGE_CACHE_WB) || | |
414 | (flags == _PAGE_CACHE_WC && | |
415 | new_flags == _PAGE_CACHE_WB)) { | |
416 | return 0; | |
417 | } | |
418 | ||
419 | return 1; | |
420 | } | |
421 | ||
458a3e64 TH |
422 | pmd_t *populate_extra_pmd(unsigned long vaddr); |
423 | pte_t *populate_extra_pte(unsigned long vaddr); | |
4614139c JF |
424 | #endif /* __ASSEMBLY__ */ |
425 | ||
96a388de | 426 | #ifdef CONFIG_X86_32 |
a1ce3928 | 427 | # include <asm/pgtable_32.h> |
96a388de | 428 | #else |
a1ce3928 | 429 | # include <asm/pgtable_64.h> |
96a388de | 430 | #endif |
6c386655 | 431 | |
aca159db | 432 | #ifndef __ASSEMBLY__ |
f476961c | 433 | #include <linux/mm_types.h> |
fa0f281c | 434 | #include <linux/mmdebug.h> |
4cbeb51b | 435 | #include <linux/log2.h> |
aca159db | 436 | |
a034a010 JF |
437 | static inline int pte_none(pte_t pte) |
438 | { | |
439 | return !pte.pte; | |
440 | } | |
441 | ||
8de01da3 JF |
442 | #define __HAVE_ARCH_PTE_SAME |
443 | static inline int pte_same(pte_t a, pte_t b) | |
444 | { | |
445 | return a.pte == b.pte; | |
446 | } | |
447 | ||
a9c8e4be MG |
448 | static inline int pteval_present(pteval_t pteval) |
449 | { | |
450 | /* | |
451 | * Yes Linus, _PAGE_PROTNONE == _PAGE_NUMA. Expressing it this | |
452 | * way clearly states that the intent is that protnone and numa | |
453 | * hinting ptes are considered present for the purposes of | |
454 | * pagetable operations like zapping, protection changes, gup etc. | |
455 | */ | |
456 | return pteval & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_NUMA); | |
457 | } | |
458 | ||
7c683851 JF |
459 | static inline int pte_present(pte_t a) |
460 | { | |
a9c8e4be | 461 | return pteval_present(pte_flags(a)); |
7c683851 JF |
462 | } |
463 | ||
2c3cf556 | 464 | #define pte_accessible pte_accessible |
20841405 | 465 | static inline bool pte_accessible(struct mm_struct *mm, pte_t a) |
2c3cf556 | 466 | { |
20841405 RR |
467 | if (pte_flags(a) & _PAGE_PRESENT) |
468 | return true; | |
469 | ||
470 | if ((pte_flags(a) & (_PAGE_PROTNONE | _PAGE_NUMA)) && | |
471 | mm_tlb_flush_pending(mm)) | |
472 | return true; | |
473 | ||
474 | return false; | |
2c3cf556 RR |
475 | } |
476 | ||
eb63657e | 477 | static inline int pte_hidden(pte_t pte) |
dfec072e | 478 | { |
eb63657e | 479 | return pte_flags(pte) & _PAGE_HIDDEN; |
dfec072e VN |
480 | } |
481 | ||
649e8ef6 JF |
482 | static inline int pmd_present(pmd_t pmd) |
483 | { | |
027ef6c8 AA |
484 | /* |
485 | * Checking for _PAGE_PSE is needed too because | |
486 | * split_huge_page will temporarily clear the present bit (but | |
487 | * the _PAGE_PSE flag will remain set at all times while the | |
488 | * _PAGE_PRESENT bit is clear). | |
489 | */ | |
be3a7284 AA |
490 | return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE | |
491 | _PAGE_NUMA); | |
649e8ef6 JF |
492 | } |
493 | ||
4fea801a JF |
494 | static inline int pmd_none(pmd_t pmd) |
495 | { | |
496 | /* Only check low word on 32-bit platforms, since it might be | |
497 | out of sync with upper half. */ | |
26c8e317 | 498 | return (unsigned long)native_pmd_val(pmd) == 0; |
4fea801a JF |
499 | } |
500 | ||
3ffb3564 JF |
501 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
502 | { | |
503 | return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK); | |
504 | } | |
505 | ||
e5f7f202 IM |
506 | /* |
507 | * Currently stuck as a macro due to indirect forward reference to | |
508 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
509 | */ | |
db3eb96f | 510 | #define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT) |
20063ca4 | 511 | |
e24d7eee JF |
512 | /* |
513 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] | |
514 | * | |
515 | * this macro returns the index of the entry in the pmd page which would | |
516 | * control the given virtual address | |
517 | */ | |
ce0c0f9e | 518 | static inline unsigned long pmd_index(unsigned long address) |
e24d7eee JF |
519 | { |
520 | return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); | |
521 | } | |
522 | ||
97e2817d JF |
523 | /* |
524 | * Conversion functions: convert a page and protection to a page entry, | |
525 | * and a page entry and page directory to the page they refer to. | |
526 | * | |
527 | * (Currently stuck as a macro because of indirect forward reference | |
528 | * to linux/mm.h:page_to_nid()) | |
529 | */ | |
530 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | |
531 | ||
346309cf JF |
532 | /* |
533 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | |
534 | * | |
535 | * this function returns the index of the entry in the pte page which would | |
536 | * control the given virtual address | |
537 | */ | |
ce0c0f9e | 538 | static inline unsigned long pte_index(unsigned long address) |
346309cf JF |
539 | { |
540 | return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); | |
541 | } | |
542 | ||
3fbc2444 JF |
543 | static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) |
544 | { | |
545 | return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); | |
546 | } | |
547 | ||
99510238 JF |
548 | static inline int pmd_bad(pmd_t pmd) |
549 | { | |
be3a7284 AA |
550 | #ifdef CONFIG_NUMA_BALANCING |
551 | /* pmd_numa check */ | |
552 | if ((pmd_flags(pmd) & (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA) | |
553 | return 0; | |
554 | #endif | |
18a7a199 | 555 | return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; |
99510238 JF |
556 | } |
557 | ||
cc290ca3 JF |
558 | static inline unsigned long pages_to_mb(unsigned long npg) |
559 | { | |
560 | return npg >> (20 - PAGE_SHIFT); | |
561 | } | |
562 | ||
5ba7c913 | 563 | #if PAGETABLE_LEVELS > 2 |
deb79cfb JF |
564 | static inline int pud_none(pud_t pud) |
565 | { | |
26c8e317 | 566 | return native_pud_val(pud) == 0; |
deb79cfb JF |
567 | } |
568 | ||
5ba7c913 JF |
569 | static inline int pud_present(pud_t pud) |
570 | { | |
18a7a199 | 571 | return pud_flags(pud) & _PAGE_PRESENT; |
5ba7c913 | 572 | } |
6fff47e3 JF |
573 | |
574 | static inline unsigned long pud_page_vaddr(pud_t pud) | |
575 | { | |
576 | return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK); | |
577 | } | |
f476961c | 578 | |
e5f7f202 IM |
579 | /* |
580 | * Currently stuck as a macro due to indirect forward reference to | |
581 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
582 | */ | |
583 | #define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT) | |
01ade20d JF |
584 | |
585 | /* Find an entry in the second-level page table.. */ | |
586 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) | |
587 | { | |
588 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); | |
589 | } | |
3180fba0 | 590 | |
3f6cbef1 JF |
591 | static inline int pud_large(pud_t pud) |
592 | { | |
e2f5bda9 | 593 | return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == |
3f6cbef1 JF |
594 | (_PAGE_PSE | _PAGE_PRESENT); |
595 | } | |
a61bb29a JF |
596 | |
597 | static inline int pud_bad(pud_t pud) | |
598 | { | |
18a7a199 | 599 | return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; |
a61bb29a | 600 | } |
e2f5bda9 JF |
601 | #else |
602 | static inline int pud_large(pud_t pud) | |
603 | { | |
604 | return 0; | |
605 | } | |
5ba7c913 JF |
606 | #endif /* PAGETABLE_LEVELS > 2 */ |
607 | ||
9f38d7e8 JF |
608 | #if PAGETABLE_LEVELS > 3 |
609 | static inline int pgd_present(pgd_t pgd) | |
610 | { | |
18a7a199 | 611 | return pgd_flags(pgd) & _PAGE_PRESENT; |
9f38d7e8 | 612 | } |
c5f040b1 JF |
613 | |
614 | static inline unsigned long pgd_page_vaddr(pgd_t pgd) | |
615 | { | |
616 | return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); | |
617 | } | |
777cba16 | 618 | |
e5f7f202 IM |
619 | /* |
620 | * Currently stuck as a macro due to indirect forward reference to | |
621 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
622 | */ | |
623 | #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) | |
7cfb8102 JF |
624 | |
625 | /* to find an entry in a page-table-directory. */ | |
ce0c0f9e | 626 | static inline unsigned long pud_index(unsigned long address) |
7cfb8102 JF |
627 | { |
628 | return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); | |
629 | } | |
3d081b18 JF |
630 | |
631 | static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) | |
632 | { | |
633 | return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); | |
634 | } | |
30f10316 JF |
635 | |
636 | static inline int pgd_bad(pgd_t pgd) | |
637 | { | |
18a7a199 | 638 | return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; |
30f10316 | 639 | } |
7325cc2e JF |
640 | |
641 | static inline int pgd_none(pgd_t pgd) | |
642 | { | |
26c8e317 | 643 | return !native_pgd_val(pgd); |
7325cc2e | 644 | } |
9f38d7e8 JF |
645 | #endif /* PAGETABLE_LEVELS > 3 */ |
646 | ||
4614139c JF |
647 | #endif /* __ASSEMBLY__ */ |
648 | ||
fb15a9b3 JF |
649 | /* |
650 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | |
651 | * | |
652 | * this macro returns the index of the entry in the pgd page which would | |
653 | * control the given virtual address | |
654 | */ | |
655 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
656 | ||
657 | /* | |
658 | * pgd_offset() returns a (pgd_t *) | |
659 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | |
660 | */ | |
661 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
662 | /* | |
663 | * a shortcut which implies the use of the kernel's pgd, instead | |
664 | * of a process's | |
665 | */ | |
666 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | |
667 | ||
668 | ||
68db065c JF |
669 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
670 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | |
671 | ||
195466dc JF |
672 | #ifndef __ASSEMBLY__ |
673 | ||
2c1b284e | 674 | extern int direct_gbpages; |
22ddfcaa | 675 | void init_mem_mapping(void); |
8d57470d | 676 | void early_alloc_pgt_buf(void); |
2c1b284e | 677 | |
4891645e JF |
678 | /* local pte updates need not use xchg for locking */ |
679 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | |
680 | { | |
681 | pte_t res = *ptep; | |
682 | ||
683 | /* Pure native function needs no input for mm, addr */ | |
684 | native_pte_clear(NULL, 0, ptep); | |
685 | return res; | |
686 | } | |
687 | ||
f2d6bfe9 JW |
688 | static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) |
689 | { | |
690 | pmd_t res = *pmdp; | |
691 | ||
692 | native_pmd_clear(pmdp); | |
693 | return res; | |
694 | } | |
695 | ||
4891645e JF |
696 | static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, |
697 | pte_t *ptep , pte_t pte) | |
698 | { | |
699 | native_set_pte(ptep, pte); | |
700 | } | |
701 | ||
0a47de52 AA |
702 | static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, |
703 | pmd_t *pmdp , pmd_t pmd) | |
704 | { | |
705 | native_set_pmd(pmdp, pmd); | |
706 | } | |
707 | ||
195466dc JF |
708 | #ifndef CONFIG_PARAVIRT |
709 | /* | |
710 | * Rules for using pte_update - it must be called after any PTE update which | |
711 | * has not been done using the set_pte / clear_pte interfaces. It is used by | |
712 | * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE | |
713 | * updates should either be sets, clears, or set_pte_atomic for P->P | |
714 | * transitions, which means this hook should only be called for user PTEs. | |
715 | * This hook implies a P->P protection or access change has taken place, which | |
716 | * requires a subsequent TLB flush. The notification can optionally be delayed | |
717 | * until the TLB flush event by using the pte_update_defer form of the | |
718 | * interface, but care must be taken to assure that the flush happens while | |
719 | * still holding the same page table lock so that the shadow and primary pages | |
720 | * do not become out of sync on SMP. | |
721 | */ | |
722 | #define pte_update(mm, addr, ptep) do { } while (0) | |
723 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | |
724 | #endif | |
725 | ||
195466dc JF |
726 | /* |
727 | * We only update the dirty/accessed state if we set | |
728 | * the dirty bit by hand in the kernel, since the hardware | |
729 | * will do the accessed bit for us, and we don't want to | |
730 | * race with other CPU's that might be updating the dirty | |
731 | * bit at the same time. | |
732 | */ | |
bea41808 JF |
733 | struct vm_area_struct; |
734 | ||
195466dc | 735 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
ee5aa8d3 JF |
736 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
737 | unsigned long address, pte_t *ptep, | |
738 | pte_t entry, int dirty); | |
195466dc JF |
739 | |
740 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
f9fbf1a3 JF |
741 | extern int ptep_test_and_clear_young(struct vm_area_struct *vma, |
742 | unsigned long addr, pte_t *ptep); | |
195466dc JF |
743 | |
744 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
c20311e1 JF |
745 | extern int ptep_clear_flush_young(struct vm_area_struct *vma, |
746 | unsigned long address, pte_t *ptep); | |
195466dc JF |
747 | |
748 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
3cbaeafe JP |
749 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, |
750 | pte_t *ptep) | |
195466dc JF |
751 | { |
752 | pte_t pte = native_ptep_get_and_clear(ptep); | |
753 | pte_update(mm, addr, ptep); | |
754 | return pte; | |
755 | } | |
756 | ||
757 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL | |
3cbaeafe JP |
758 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
759 | unsigned long addr, pte_t *ptep, | |
760 | int full) | |
195466dc JF |
761 | { |
762 | pte_t pte; | |
763 | if (full) { | |
764 | /* | |
765 | * Full address destruction in progress; paravirt does not | |
766 | * care about updates and native needs no locking | |
767 | */ | |
768 | pte = native_local_ptep_get_and_clear(ptep); | |
769 | } else { | |
770 | pte = ptep_get_and_clear(mm, addr, ptep); | |
771 | } | |
772 | return pte; | |
773 | } | |
774 | ||
775 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | |
3cbaeafe JP |
776 | static inline void ptep_set_wrprotect(struct mm_struct *mm, |
777 | unsigned long addr, pte_t *ptep) | |
195466dc | 778 | { |
d8d89827 | 779 | clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); |
195466dc JF |
780 | pte_update(mm, addr, ptep); |
781 | } | |
782 | ||
2ac13462 | 783 | #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) |
61c77326 | 784 | |
f2d6bfe9 JW |
785 | #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) |
786 | ||
787 | #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
788 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
789 | unsigned long address, pmd_t *pmdp, | |
790 | pmd_t entry, int dirty); | |
791 | ||
792 | #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
793 | extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
794 | unsigned long addr, pmd_t *pmdp); | |
795 | ||
796 | #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
797 | extern int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
798 | unsigned long address, pmd_t *pmdp); | |
799 | ||
800 | ||
801 | #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH | |
802 | extern void pmdp_splitting_flush(struct vm_area_struct *vma, | |
803 | unsigned long addr, pmd_t *pmdp); | |
804 | ||
805 | #define __HAVE_ARCH_PMD_WRITE | |
806 | static inline int pmd_write(pmd_t pmd) | |
807 | { | |
808 | return pmd_flags(pmd) & _PAGE_RW; | |
809 | } | |
810 | ||
811 | #define __HAVE_ARCH_PMDP_GET_AND_CLEAR | |
812 | static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr, | |
813 | pmd_t *pmdp) | |
814 | { | |
815 | pmd_t pmd = native_pmdp_get_and_clear(pmdp); | |
816 | pmd_update(mm, addr, pmdp); | |
817 | return pmd; | |
818 | } | |
819 | ||
820 | #define __HAVE_ARCH_PMDP_SET_WRPROTECT | |
821 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
822 | unsigned long addr, pmd_t *pmdp) | |
823 | { | |
824 | clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); | |
825 | pmd_update(mm, addr, pmdp); | |
826 | } | |
827 | ||
85958b46 JF |
828 | /* |
829 | * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); | |
830 | * | |
831 | * dst - pointer to pgd range anwhere on a pgd page | |
832 | * src - "" | |
833 | * count - the number of pgds to copy. | |
834 | * | |
835 | * dst and src can be on the same page, but the range must not overlap, | |
836 | * and must not cross a page boundary. | |
837 | */ | |
838 | static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) | |
839 | { | |
840 | memcpy(dst, src, count * sizeof(pgd_t)); | |
841 | } | |
842 | ||
4cbeb51b DH |
843 | #define PTE_SHIFT ilog2(PTRS_PER_PTE) |
844 | static inline int page_level_shift(enum pg_level level) | |
845 | { | |
846 | return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; | |
847 | } | |
848 | static inline unsigned long page_level_size(enum pg_level level) | |
849 | { | |
850 | return 1UL << page_level_shift(level); | |
851 | } | |
852 | static inline unsigned long page_level_mask(enum pg_level level) | |
853 | { | |
854 | return ~(page_level_size(level) - 1); | |
855 | } | |
85958b46 | 856 | |
602e0186 KS |
857 | /* |
858 | * The x86 doesn't have any external MMU info: the kernel page | |
859 | * tables contain all the necessary information. | |
860 | */ | |
861 | static inline void update_mmu_cache(struct vm_area_struct *vma, | |
862 | unsigned long addr, pte_t *ptep) | |
863 | { | |
864 | } | |
865 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, | |
866 | unsigned long addr, pmd_t *pmd) | |
867 | { | |
868 | } | |
85958b46 | 869 | |
fa0f281c CG |
870 | static inline pte_t pte_swp_mksoft_dirty(pte_t pte) |
871 | { | |
872 | VM_BUG_ON(pte_present(pte)); | |
873 | return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); | |
874 | } | |
875 | ||
876 | static inline int pte_swp_soft_dirty(pte_t pte) | |
877 | { | |
878 | VM_BUG_ON(pte_present(pte)); | |
879 | return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; | |
880 | } | |
881 | ||
882 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) | |
883 | { | |
884 | VM_BUG_ON(pte_present(pte)); | |
885 | return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); | |
886 | } | |
887 | ||
195466dc JF |
888 | #include <asm-generic/pgtable.h> |
889 | #endif /* __ASSEMBLY__ */ | |
890 | ||
1965aae3 | 891 | #endif /* _ASM_X86_PGTABLE_H */ |