Commit | Line | Data |
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1965aae3 PA |
1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | |
6c386655 | 3 | |
6c386655 JF |
4 | #define FIRST_USER_ADDRESS 0 |
5 | ||
43cdf5d6 JS |
6 | #define _PAGE_BIT_PRESENT 0 /* is present */ |
7 | #define _PAGE_BIT_RW 1 /* writeable */ | |
8 | #define _PAGE_BIT_USER 2 /* userspace addressable */ | |
9 | #define _PAGE_BIT_PWT 3 /* page write through */ | |
10 | #define _PAGE_BIT_PCD 4 /* page cache disabled */ | |
11 | #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ | |
12 | #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ | |
6c386655 JF |
13 | #define _PAGE_BIT_FILE 6 |
14 | #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ | |
9bf5a475 | 15 | #define _PAGE_BIT_PAT 7 /* on 4KB pages */ |
6c386655 JF |
16 | #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ |
17 | #define _PAGE_BIT_UNUSED1 9 /* available for programmer */ | |
be43d728 | 18 | #define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */ |
6c386655 | 19 | #define _PAGE_BIT_UNUSED3 11 |
9bf5a475 | 20 | #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ |
a0a8f536 | 21 | #define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1 |
110e0358 | 22 | #define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1 |
6c386655 JF |
23 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ |
24 | ||
4226ab93 JF |
25 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) |
26 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) | |
27 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) | |
28 | #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT) | |
29 | #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD) | |
30 | #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED) | |
31 | #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY) | |
32 | #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE) | |
33 | #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL) | |
34 | #define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1) | |
be43d728 | 35 | #define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP) |
4226ab93 JF |
36 | #define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3) |
37 | #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) | |
38 | #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) | |
a0a8f536 | 39 | #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL) |
110e0358 | 40 | #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST) |
a0a8f536 | 41 | #define __HAVE_ARCH_PTE_SPECIAL |
6c386655 JF |
42 | |
43 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) | |
4226ab93 | 44 | #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) |
6c386655 | 45 | #else |
4226ab93 | 46 | #define _PAGE_NX (_AT(pteval_t, 0)) |
6c386655 JF |
47 | #endif |
48 | ||
49 | /* If _PAGE_PRESENT is clear, we use these: */ | |
3cbaeafe JP |
50 | #define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping, |
51 | * saved PTE; unset:swap */ | |
6c386655 JF |
52 | #define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE; |
53 | pte_present gives true */ | |
54 | ||
3cbaeafe JP |
55 | #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ |
56 | _PAGE_ACCESSED | _PAGE_DIRTY) | |
57 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \ | |
58 | _PAGE_DIRTY) | |
6c386655 | 59 | |
86aaf4fd | 60 | /* Set of bits not changed in pte_modify */ |
59438c9f | 61 | #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ |
a0a8f536 | 62 | _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY) |
6c386655 | 63 | |
2e5d9c85 | 64 | #define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT) |
65 | #define _PAGE_CACHE_WB (0) | |
66 | #define _PAGE_CACHE_WC (_PAGE_PWT) | |
67 | #define _PAGE_CACHE_UC_MINUS (_PAGE_PCD) | |
68 | #define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT) | |
69 | ||
6c386655 | 70 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) |
3cbaeafe JP |
71 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ |
72 | _PAGE_ACCESSED | _PAGE_NX) | |
73 | ||
74 | #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \ | |
75 | _PAGE_USER | _PAGE_ACCESSED) | |
76 | #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | |
77 | _PAGE_ACCESSED | _PAGE_NX) | |
78 | #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | |
79 | _PAGE_ACCESSED) | |
6c386655 | 80 | #define PAGE_COPY PAGE_COPY_NOEXEC |
3cbaeafe JP |
81 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \ |
82 | _PAGE_ACCESSED | _PAGE_NX) | |
83 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | |
84 | _PAGE_ACCESSED) | |
6c386655 | 85 | |
6c386655 | 86 | #define __PAGE_KERNEL_EXEC \ |
8490638c | 87 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL) |
6c386655 | 88 | #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX) |
6c386655 JF |
89 | |
90 | #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW) | |
91 | #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) | |
d2e626f4 | 92 | #define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT) |
b310f381 | 93 | #define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC) |
6c386655 | 94 | #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT) |
d546b67a | 95 | #define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD) |
6c386655 JF |
96 | #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) |
97 | #define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT) | |
98 | #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) | |
3a9e189d | 99 | #define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE) |
6c386655 JF |
100 | #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE) |
101 | ||
be43d728 JF |
102 | #define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP) |
103 | #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP) | |
104 | #define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP) | |
105 | #define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP) | |
106 | ||
8490638c JF |
107 | #define PAGE_KERNEL __pgprot(__PAGE_KERNEL) |
108 | #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO) | |
109 | #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC) | |
110 | #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX) | |
111 | #define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC) | |
112 | #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE) | |
113 | #define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS) | |
114 | #define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE) | |
115 | #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE) | |
3a9e189d | 116 | #define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE) |
8490638c JF |
117 | #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC) |
118 | #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL) | |
119 | #define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE) | |
6c386655 | 120 | |
be43d728 JF |
121 | #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO) |
122 | #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE) | |
123 | #define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS) | |
124 | #define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC) | |
125 | ||
6c386655 JF |
126 | /* xwr */ |
127 | #define __P000 PAGE_NONE | |
128 | #define __P001 PAGE_READONLY | |
129 | #define __P010 PAGE_COPY | |
130 | #define __P011 PAGE_COPY | |
131 | #define __P100 PAGE_READONLY_EXEC | |
132 | #define __P101 PAGE_READONLY_EXEC | |
133 | #define __P110 PAGE_COPY_EXEC | |
134 | #define __P111 PAGE_COPY_EXEC | |
135 | ||
136 | #define __S000 PAGE_NONE | |
137 | #define __S001 PAGE_READONLY | |
138 | #define __S010 PAGE_SHARED | |
139 | #define __S011 PAGE_SHARED | |
140 | #define __S100 PAGE_READONLY_EXEC | |
141 | #define __S101 PAGE_READONLY_EXEC | |
142 | #define __S110 PAGE_SHARED_EXEC | |
143 | #define __S111 PAGE_SHARED_EXEC | |
144 | ||
b2bc2731 SS |
145 | /* |
146 | * early identity mapping pte attrib macros. | |
147 | */ | |
148 | #ifdef CONFIG_X86_64 | |
149 | #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC | |
150 | #else | |
f61f1b57 SS |
151 | /* |
152 | * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection | |
153 | * bits are combined, this will alow user to access the high address mapped | |
154 | * VDSO in the presence of CONFIG_COMPAT_VDSO | |
155 | */ | |
3a85e770 | 156 | #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */ |
f61f1b57 | 157 | #define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */ |
b2bc2731 SS |
158 | #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ |
159 | #endif | |
160 | ||
4614139c | 161 | #ifndef __ASSEMBLY__ |
195466dc | 162 | |
8405b122 JF |
163 | /* |
164 | * ZERO_PAGE is a global shared page that is always zero: used | |
165 | * for zero-mapped memory areas etc.. | |
166 | */ | |
3cbaeafe | 167 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; |
8405b122 JF |
168 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
169 | ||
e3ed910d JF |
170 | extern spinlock_t pgd_lock; |
171 | extern struct list_head pgd_list; | |
8405b122 | 172 | |
4614139c JF |
173 | /* |
174 | * The following only work if pte_present() is true. | |
175 | * Undefined behaviour if not.. | |
176 | */ | |
3cbaeafe JP |
177 | static inline int pte_dirty(pte_t pte) |
178 | { | |
a15af1c9 | 179 | return pte_flags(pte) & _PAGE_DIRTY; |
3cbaeafe JP |
180 | } |
181 | ||
182 | static inline int pte_young(pte_t pte) | |
183 | { | |
a15af1c9 | 184 | return pte_flags(pte) & _PAGE_ACCESSED; |
3cbaeafe JP |
185 | } |
186 | ||
187 | static inline int pte_write(pte_t pte) | |
188 | { | |
a15af1c9 | 189 | return pte_flags(pte) & _PAGE_RW; |
3cbaeafe JP |
190 | } |
191 | ||
192 | static inline int pte_file(pte_t pte) | |
193 | { | |
a15af1c9 | 194 | return pte_flags(pte) & _PAGE_FILE; |
3cbaeafe JP |
195 | } |
196 | ||
197 | static inline int pte_huge(pte_t pte) | |
198 | { | |
a15af1c9 | 199 | return pte_flags(pte) & _PAGE_PSE; |
4614139c JF |
200 | } |
201 | ||
3cbaeafe JP |
202 | static inline int pte_global(pte_t pte) |
203 | { | |
a15af1c9 | 204 | return pte_flags(pte) & _PAGE_GLOBAL; |
3cbaeafe JP |
205 | } |
206 | ||
207 | static inline int pte_exec(pte_t pte) | |
208 | { | |
a15af1c9 | 209 | return !(pte_flags(pte) & _PAGE_NX); |
3cbaeafe JP |
210 | } |
211 | ||
7e675137 NP |
212 | static inline int pte_special(pte_t pte) |
213 | { | |
606ee44d | 214 | return pte_flags(pte) & _PAGE_SPECIAL; |
7e675137 NP |
215 | } |
216 | ||
91030ca1 HD |
217 | static inline unsigned long pte_pfn(pte_t pte) |
218 | { | |
219 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
220 | } | |
221 | ||
222 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) | |
223 | ||
3cbaeafe JP |
224 | static inline int pmd_large(pmd_t pte) |
225 | { | |
226 | return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) == | |
227 | (_PAGE_PSE | _PAGE_PRESENT); | |
228 | } | |
229 | ||
230 | static inline pte_t pte_mkclean(pte_t pte) | |
231 | { | |
4226ab93 | 232 | return __pte(pte_val(pte) & ~_PAGE_DIRTY); |
3cbaeafe JP |
233 | } |
234 | ||
235 | static inline pte_t pte_mkold(pte_t pte) | |
236 | { | |
4226ab93 | 237 | return __pte(pte_val(pte) & ~_PAGE_ACCESSED); |
3cbaeafe JP |
238 | } |
239 | ||
240 | static inline pte_t pte_wrprotect(pte_t pte) | |
241 | { | |
4226ab93 | 242 | return __pte(pte_val(pte) & ~_PAGE_RW); |
3cbaeafe JP |
243 | } |
244 | ||
245 | static inline pte_t pte_mkexec(pte_t pte) | |
246 | { | |
4226ab93 | 247 | return __pte(pte_val(pte) & ~_PAGE_NX); |
3cbaeafe JP |
248 | } |
249 | ||
250 | static inline pte_t pte_mkdirty(pte_t pte) | |
251 | { | |
252 | return __pte(pte_val(pte) | _PAGE_DIRTY); | |
253 | } | |
254 | ||
255 | static inline pte_t pte_mkyoung(pte_t pte) | |
256 | { | |
257 | return __pte(pte_val(pte) | _PAGE_ACCESSED); | |
258 | } | |
259 | ||
260 | static inline pte_t pte_mkwrite(pte_t pte) | |
261 | { | |
262 | return __pte(pte_val(pte) | _PAGE_RW); | |
263 | } | |
264 | ||
265 | static inline pte_t pte_mkhuge(pte_t pte) | |
266 | { | |
267 | return __pte(pte_val(pte) | _PAGE_PSE); | |
268 | } | |
269 | ||
270 | static inline pte_t pte_clrhuge(pte_t pte) | |
271 | { | |
4226ab93 | 272 | return __pte(pte_val(pte) & ~_PAGE_PSE); |
3cbaeafe JP |
273 | } |
274 | ||
275 | static inline pte_t pte_mkglobal(pte_t pte) | |
276 | { | |
277 | return __pte(pte_val(pte) | _PAGE_GLOBAL); | |
278 | } | |
279 | ||
280 | static inline pte_t pte_clrglobal(pte_t pte) | |
281 | { | |
4226ab93 | 282 | return __pte(pte_val(pte) & ~_PAGE_GLOBAL); |
3cbaeafe | 283 | } |
4614139c | 284 | |
7e675137 NP |
285 | static inline pte_t pte_mkspecial(pte_t pte) |
286 | { | |
a0a8f536 | 287 | return __pte(pte_val(pte) | _PAGE_SPECIAL); |
7e675137 NP |
288 | } |
289 | ||
6fdc05d4 JF |
290 | extern pteval_t __supported_pte_mask; |
291 | ||
292 | static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) | |
293 | { | |
294 | return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) | | |
295 | pgprot_val(pgprot)) & __supported_pte_mask); | |
296 | } | |
297 | ||
298 | static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) | |
299 | { | |
300 | return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) | | |
301 | pgprot_val(pgprot)) & __supported_pte_mask); | |
302 | } | |
303 | ||
38472311 IM |
304 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
305 | { | |
306 | pteval_t val = pte_val(pte); | |
307 | ||
308 | /* | |
309 | * Chop off the NX bit (if present), and add the NX portion of | |
310 | * the newprot (if present): | |
311 | */ | |
1c12c4cf VP |
312 | val &= _PAGE_CHG_MASK; |
313 | val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask; | |
38472311 IM |
314 | |
315 | return __pte(val); | |
316 | } | |
317 | ||
1c12c4cf VP |
318 | /* mprotect needs to preserve PAT bits when updating vm_page_prot */ |
319 | #define pgprot_modify pgprot_modify | |
320 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
321 | { | |
322 | pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; | |
323 | pgprotval_t addbits = pgprot_val(newprot); | |
324 | return __pgprot(preservebits | addbits); | |
325 | } | |
326 | ||
77be1fab | 327 | #define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) |
c6ca18eb | 328 | |
1e8e23bc AK |
329 | #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) |
330 | ||
f0970c13 | 331 | #ifndef __ASSEMBLY__ |
332 | #define __HAVE_PHYS_MEM_ACCESS_PROT | |
333 | struct file; | |
334 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | |
335 | unsigned long size, pgprot_t vma_prot); | |
336 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | |
337 | unsigned long size, pgprot_t *vma_prot); | |
338 | #endif | |
339 | ||
d494a961 JF |
340 | /* Install a pte for a particular vaddr in kernel space. */ |
341 | void set_pte_vaddr(unsigned long vaddr, pte_t pte); | |
342 | ||
a312b37b EH |
343 | #ifdef CONFIG_X86_32 |
344 | extern void native_pagetable_setup_start(pgd_t *base); | |
345 | extern void native_pagetable_setup_done(pgd_t *base); | |
346 | #else | |
347 | static inline void native_pagetable_setup_start(pgd_t *base) {} | |
348 | static inline void native_pagetable_setup_done(pgd_t *base) {} | |
349 | #endif | |
350 | ||
e0b7c819 JS |
351 | extern int arch_report_meminfo(char *page); |
352 | ||
4891645e JF |
353 | #ifdef CONFIG_PARAVIRT |
354 | #include <asm/paravirt.h> | |
355 | #else /* !CONFIG_PARAVIRT */ | |
356 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | |
357 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | |
358 | ||
359 | #define set_pte_present(mm, addr, ptep, pte) \ | |
360 | native_set_pte_present(mm, addr, ptep, pte) | |
361 | #define set_pte_atomic(ptep, pte) \ | |
362 | native_set_pte_atomic(ptep, pte) | |
363 | ||
364 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | |
365 | ||
366 | #ifndef __PAGETABLE_PUD_FOLDED | |
367 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | |
368 | #define pgd_clear(pgd) native_pgd_clear(pgd) | |
369 | #endif | |
370 | ||
371 | #ifndef set_pud | |
372 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | |
373 | #endif | |
374 | ||
375 | #ifndef __PAGETABLE_PMD_FOLDED | |
376 | #define pud_clear(pud) native_pud_clear(pud) | |
377 | #endif | |
378 | ||
379 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | |
380 | #define pmd_clear(pmd) native_pmd_clear(pmd) | |
381 | ||
382 | #define pte_update(mm, addr, ptep) do { } while (0) | |
383 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | |
a312b37b EH |
384 | |
385 | static inline void __init paravirt_pagetable_setup_start(pgd_t *base) | |
386 | { | |
387 | native_pagetable_setup_start(base); | |
388 | } | |
389 | ||
390 | static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | |
391 | { | |
392 | native_pagetable_setup_done(base); | |
393 | } | |
4891645e JF |
394 | #endif /* CONFIG_PARAVIRT */ |
395 | ||
4614139c JF |
396 | #endif /* __ASSEMBLY__ */ |
397 | ||
96a388de TG |
398 | #ifdef CONFIG_X86_32 |
399 | # include "pgtable_32.h" | |
400 | #else | |
401 | # include "pgtable_64.h" | |
402 | #endif | |
6c386655 | 403 | |
fb15a9b3 JF |
404 | /* |
405 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | |
406 | * | |
407 | * this macro returns the index of the entry in the pgd page which would | |
408 | * control the given virtual address | |
409 | */ | |
410 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
411 | ||
412 | /* | |
413 | * pgd_offset() returns a (pgd_t *) | |
414 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | |
415 | */ | |
416 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
417 | /* | |
418 | * a shortcut which implies the use of the kernel's pgd, instead | |
419 | * of a process's | |
420 | */ | |
421 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | |
422 | ||
423 | ||
68db065c JF |
424 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
425 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | |
426 | ||
195466dc JF |
427 | #ifndef __ASSEMBLY__ |
428 | ||
30551bb3 TG |
429 | enum { |
430 | PG_LEVEL_NONE, | |
431 | PG_LEVEL_4K, | |
432 | PG_LEVEL_2M, | |
86f03989 | 433 | PG_LEVEL_1G, |
ce0c0e50 | 434 | PG_LEVEL_NUM |
30551bb3 TG |
435 | }; |
436 | ||
65280e61 TG |
437 | #ifdef CONFIG_PROC_FS |
438 | extern void update_page_count(int level, unsigned long pages); | |
439 | #else | |
440 | static inline void update_page_count(int level, unsigned long pages) { } | |
441 | #endif | |
ce0c0e50 | 442 | |
0a663088 TG |
443 | /* |
444 | * Helper function that returns the kernel pagetable entry controlling | |
445 | * the virtual address 'address'. NULL means no pagetable entry present. | |
446 | * NOTE: the return type is pte_t but if the pmd is PSE then we return it | |
447 | * as a pte too. | |
448 | */ | |
da7bfc50 | 449 | extern pte_t *lookup_address(unsigned long address, unsigned int *level); |
0a663088 | 450 | |
4891645e JF |
451 | /* local pte updates need not use xchg for locking */ |
452 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | |
453 | { | |
454 | pte_t res = *ptep; | |
455 | ||
456 | /* Pure native function needs no input for mm, addr */ | |
457 | native_pte_clear(NULL, 0, ptep); | |
458 | return res; | |
459 | } | |
460 | ||
461 | static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, | |
462 | pte_t *ptep , pte_t pte) | |
463 | { | |
464 | native_set_pte(ptep, pte); | |
465 | } | |
466 | ||
195466dc JF |
467 | #ifndef CONFIG_PARAVIRT |
468 | /* | |
469 | * Rules for using pte_update - it must be called after any PTE update which | |
470 | * has not been done using the set_pte / clear_pte interfaces. It is used by | |
471 | * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE | |
472 | * updates should either be sets, clears, or set_pte_atomic for P->P | |
473 | * transitions, which means this hook should only be called for user PTEs. | |
474 | * This hook implies a P->P protection or access change has taken place, which | |
475 | * requires a subsequent TLB flush. The notification can optionally be delayed | |
476 | * until the TLB flush event by using the pte_update_defer form of the | |
477 | * interface, but care must be taken to assure that the flush happens while | |
478 | * still holding the same page table lock so that the shadow and primary pages | |
479 | * do not become out of sync on SMP. | |
480 | */ | |
481 | #define pte_update(mm, addr, ptep) do { } while (0) | |
482 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | |
483 | #endif | |
484 | ||
195466dc JF |
485 | /* |
486 | * We only update the dirty/accessed state if we set | |
487 | * the dirty bit by hand in the kernel, since the hardware | |
488 | * will do the accessed bit for us, and we don't want to | |
489 | * race with other CPU's that might be updating the dirty | |
490 | * bit at the same time. | |
491 | */ | |
bea41808 JF |
492 | struct vm_area_struct; |
493 | ||
195466dc | 494 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
ee5aa8d3 JF |
495 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
496 | unsigned long address, pte_t *ptep, | |
497 | pte_t entry, int dirty); | |
195466dc JF |
498 | |
499 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
f9fbf1a3 JF |
500 | extern int ptep_test_and_clear_young(struct vm_area_struct *vma, |
501 | unsigned long addr, pte_t *ptep); | |
195466dc JF |
502 | |
503 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
c20311e1 JF |
504 | extern int ptep_clear_flush_young(struct vm_area_struct *vma, |
505 | unsigned long address, pte_t *ptep); | |
195466dc JF |
506 | |
507 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
3cbaeafe JP |
508 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, |
509 | pte_t *ptep) | |
195466dc JF |
510 | { |
511 | pte_t pte = native_ptep_get_and_clear(ptep); | |
512 | pte_update(mm, addr, ptep); | |
513 | return pte; | |
514 | } | |
515 | ||
516 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL | |
3cbaeafe JP |
517 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
518 | unsigned long addr, pte_t *ptep, | |
519 | int full) | |
195466dc JF |
520 | { |
521 | pte_t pte; | |
522 | if (full) { | |
523 | /* | |
524 | * Full address destruction in progress; paravirt does not | |
525 | * care about updates and native needs no locking | |
526 | */ | |
527 | pte = native_local_ptep_get_and_clear(ptep); | |
528 | } else { | |
529 | pte = ptep_get_and_clear(mm, addr, ptep); | |
530 | } | |
531 | return pte; | |
532 | } | |
533 | ||
534 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | |
3cbaeafe JP |
535 | static inline void ptep_set_wrprotect(struct mm_struct *mm, |
536 | unsigned long addr, pte_t *ptep) | |
195466dc | 537 | { |
d8d89827 | 538 | clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); |
195466dc JF |
539 | pte_update(mm, addr, ptep); |
540 | } | |
541 | ||
85958b46 JF |
542 | /* |
543 | * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); | |
544 | * | |
545 | * dst - pointer to pgd range anwhere on a pgd page | |
546 | * src - "" | |
547 | * count - the number of pgds to copy. | |
548 | * | |
549 | * dst and src can be on the same page, but the range must not overlap, | |
550 | * and must not cross a page boundary. | |
551 | */ | |
552 | static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) | |
553 | { | |
554 | memcpy(dst, src, count * sizeof(pgd_t)); | |
555 | } | |
556 | ||
557 | ||
195466dc JF |
558 | #include <asm-generic/pgtable.h> |
559 | #endif /* __ASSEMBLY__ */ | |
560 | ||
1965aae3 | 561 | #endif /* _ASM_X86_PGTABLE_H */ |