[linux-2.6-block.git] / arch / x86 / include / asm / pci_64.h

#ifndef _ASM_X86_PCI_64_H
#define _ASM_X86_PCI_64_H

#ifdef __KERNEL__

#ifdef CONFIG_CALGARY_IOMMU
static inline void *pci_iommu(struct pci_bus *bus)
{
	struct pci_sysdata *sd = bus->sysdata;
	return sd->iommu;
}

static inline void set_pci_iommu(struct pci_bus *bus, void *val)
{
	struct pci_sysdata *sd = bus->sysdata;
	sd->iommu = val;
}
#endif /* CONFIG_CALGARY_IOMMU */

extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
			      int reg, int len, u32 *value);
extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
			       int reg, int len, u32 value);

extern void dma32_reserve_bootmem(void);
extern void pci_iommu_alloc(void);

/* The PCI address space does equal the physical memory
 * address space.  The networking and block device layers use
 * this boolean for bounce buffer decisions
 *
 * On AMD64 it mostly equals, but we set it to zero if a hardware
 * IOMMU (gart) of sotware IOMMU (swiotlb) is available.
 */
#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)

#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)	\
	dma_addr_t ADDR_NAME;
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)		\
	__u32 LEN_NAME;
#define pci_unmap_addr(PTR, ADDR_NAME)			\
	((PTR)->ADDR_NAME)
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)		\
	(((PTR)->ADDR_NAME) = (VAL))
#define pci_unmap_len(PTR, LEN_NAME)			\
	((PTR)->LEN_NAME)
#define pci_unmap_len_set(PTR, LEN_NAME, VAL)		\
	(((PTR)->LEN_NAME) = (VAL))

#endif /* __KERNEL__ */

#endif /* _ASM_X86_PCI_64_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_PCI_64_H
1965aae3 PA	2	#define _ASM_X86_PCI_64_H
1da177e4	3
1da177e4 LT	4	#ifdef __KERNEL__
1da177e4 LT	5
08f1c192	6	#ifdef CONFIG_CALGARY_IOMMU
3cb47d79	7	static inline void pci_iommu(struct pci_bus bus)
08f1c192 MBY	8	{
	9	struct pci_sysdata *sd = bus->sysdata;
	10	return sd->iommu;
	11	}
	12
	13	static inline void set_pci_iommu(struct pci_bus bus, void val)
	14	{
	15	struct pci_sysdata *sd = bus->sysdata;
	16	sd->iommu = val;
	17	}
	18	#endif /* CONFIG_CALGARY_IOMMU */
	19
3cb47d79 JP	20	extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
	21	int reg, int len, u32 *value);
	22	extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
	23	int reg, int len, u32 value);
1da177e4	24
752bea4a	25	extern void dma32_reserve_bootmem(void);
0dc243ae	26	extern void pci_iommu_alloc(void);
1da177e4	27
1da177e4 LT	28	/* The PCI address space does equal the physical memory
	29	* address space. The networking and block device layers use
	30	* this boolean for bounce buffer decisions
	31	*
17a941d8 MBY	32	* On AMD64 it mostly equals, but we set it to zero if a hardware
17a941d8 MBY	33	* IOMMU (gart) of sotware IOMMU (swiotlb) is available.
1da177e4	34	*/
17a941d8 MBY	35	#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
17a941d8 MBY	36
1da177e4 LT	37	#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
	38	dma_addr_t ADDR_NAME;
	39	#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
	40	__u32 LEN_NAME;
	41	#define pci_unmap_addr(PTR, ADDR_NAME) \
	42	((PTR)->ADDR_NAME)
	43	#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
	44	(((PTR)->ADDR_NAME) = (VAL))
	45	#define pci_unmap_len(PTR, LEN_NAME) \
	46	((PTR)->LEN_NAME)
	47	#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
	48	(((PTR)->LEN_NAME) = (VAL))
	49
1da177e4 LT	50	#endif /* __KERNEL__ */
1da177e4 LT	51
1965aae3	52	#endif /* _ASM_X86_PCI_64_H */