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1965aae3 PA |
1 | #ifndef _ASM_X86_PCI_H |
2 | #define _ASM_X86_PCI_H | |
f3e6f164 GKH |
3 | |
4 | #include <linux/mm.h> /* for struct page */ | |
5 | #include <linux/types.h> | |
6 | #include <linux/slab.h> | |
7 | #include <linux/string.h> | |
8 | #include <asm/scatterlist.h> | |
9 | #include <asm/io.h> | |
294ee6f8 | 10 | #include <asm/x86_init.h> |
f3e6f164 | 11 | |
f3e6f164 GKH |
12 | #ifdef __KERNEL__ |
13 | ||
14 | struct pci_sysdata { | |
15 | int domain; /* PCI domain */ | |
16 | int node; /* NUMA node */ | |
6c0cc950 | 17 | #ifdef CONFIG_ACPI |
7b199811 | 18 | struct acpi_device *companion; /* ACPI companion device */ |
6c0cc950 | 19 | #endif |
f3e6f164 | 20 | #ifdef CONFIG_X86_64 |
69bdb7bc | 21 | void *iommu; /* IOMMU private data */ |
f3e6f164 GKH |
22 | #endif |
23 | }; | |
24 | ||
07156509 | 25 | extern int pci_routeirq; |
a9322f64 | 26 | extern int noioapicquirk; |
41b9eb26 | 27 | extern int noioapicreroute; |
07156509 | 28 | |
f3e6f164 | 29 | /* scan a bus after allocating a pci_sysdata for it */ |
871d5f8d YL |
30 | extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, |
31 | int node); | |
f3e6f164 GKH |
32 | extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); |
33 | ||
23b90cfd JB |
34 | #ifdef CONFIG_PCI |
35 | ||
36 | #ifdef CONFIG_PCI_DOMAINS | |
f3e6f164 GKH |
37 | static inline int pci_domain_nr(struct pci_bus *bus) |
38 | { | |
39 | struct pci_sysdata *sd = bus->sysdata; | |
40 | return sd->domain; | |
41 | } | |
42 | ||
43 | static inline int pci_proc_domain(struct pci_bus *bus) | |
44 | { | |
45 | return pci_domain_nr(bus); | |
46 | } | |
23b90cfd | 47 | #endif |
f3e6f164 GKH |
48 | |
49 | /* Can be used to override the logic in pci_scan_bus for skipping | |
50 | already-configured bus numbers - to be used for buggy BIOSes | |
51 | or architectures with incomplete PCI setup by the loader */ | |
52 | ||
f3e6f164 | 53 | extern unsigned int pcibios_assign_all_busses(void); |
b72d0db9 TG |
54 | extern int pci_legacy_init(void); |
55 | # ifdef CONFIG_ACPI | |
56 | # define x86_default_pci_init pci_acpi_init | |
57 | # else | |
58 | # define x86_default_pci_init pci_legacy_init | |
59 | # endif | |
f3e6f164 | 60 | #else |
b72d0db9 TG |
61 | # define pcibios_assign_all_busses() 0 |
62 | # define x86_default_pci_init NULL | |
f3e6f164 | 63 | #endif |
f3e6f164 GKH |
64 | |
65 | extern unsigned long pci_mem_start; | |
66 | #define PCIBIOS_MIN_IO 0x1000 | |
67 | #define PCIBIOS_MIN_MEM (pci_mem_start) | |
68 | ||
69 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | |
70 | ||
5bd5a452 | 71 | extern int pcibios_enabled; |
f3e6f164 | 72 | void pcibios_config_init(void); |
69bdb7bc | 73 | struct pci_bus *pcibios_scan_root(int bus); |
f3e6f164 GKH |
74 | |
75 | void pcibios_set_master(struct pci_dev *dev); | |
76 | void pcibios_penalize_isa_irq(int irq, int active); | |
77 | struct irq_routing_table *pcibios_get_irq_routing_table(void); | |
78 | int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); | |
79 | ||
80 | ||
81 | #define HAVE_PCI_MMAP | |
82 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
69bdb7bc JP |
83 | enum pci_mmap_state mmap_state, |
84 | int write_combine); | |
f3e6f164 GKH |
85 | |
86 | ||
87 | #ifdef CONFIG_PCI | |
376ff035 | 88 | extern void early_quirks(void); |
f3e6f164 GKH |
89 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
90 | enum pci_dma_burst_strategy *strat, | |
91 | unsigned long *strategy_parameter) | |
92 | { | |
93 | *strat = PCI_DMA_BURST_INFINITY; | |
94 | *strategy_parameter = ~0UL; | |
95 | } | |
376ff035 TG |
96 | #else |
97 | static inline void early_quirks(void) { } | |
f3e6f164 GKH |
98 | #endif |
99 | ||
cfb80c9e JF |
100 | extern void pci_iommu_alloc(void); |
101 | ||
294ee6f8 | 102 | #ifdef CONFIG_PCI_MSI |
294ee6f8 | 103 | /* implemented in arch/x86/kernel/apic/io_apic. */ |
5afba62c | 104 | struct msi_desc; |
294ee6f8 SS |
105 | int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); |
106 | void native_teardown_msi_irq(unsigned int irq); | |
ac8344c4 | 107 | void native_restore_msi_irqs(struct pci_dev *dev); |
5afba62c JR |
108 | int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, |
109 | unsigned int irq_base, unsigned int irq_offset); | |
294ee6f8 SS |
110 | #else |
111 | #define native_setup_msi_irqs NULL | |
112 | #define native_teardown_msi_irq NULL | |
294ee6f8 | 113 | #endif |
11df1f05 | 114 | |
67796bf7 JR |
115 | #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) |
116 | ||
67796bf7 JR |
117 | #endif /* __KERNEL__ */ |
118 | ||
119 | #ifdef CONFIG_X86_64 | |
a1ce3928 | 120 | #include <asm/pci_64.h> |
f3e6f164 GKH |
121 | #endif |
122 | ||
123 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ | |
124 | #include <asm-generic/pci-dma-compat.h> | |
125 | ||
126 | /* generic pci stuff */ | |
127 | #include <asm-generic/pci.h> | |
1f82de10 | 128 | #define PCIBIOS_MAX_MEM_32 0xffffffff |
f3e6f164 | 129 | |
b4ea9299 TG |
130 | #ifdef CONFIG_NUMA |
131 | /* Returns the node based on pci bus */ | |
393d68fb | 132 | static inline int __pcibus_to_node(const struct pci_bus *bus) |
b4ea9299 | 133 | { |
393d68fb | 134 | const struct pci_sysdata *sd = bus->sysdata; |
b4ea9299 TG |
135 | |
136 | return sd->node; | |
137 | } | |
f3e6f164 | 138 | |
393d68fb RR |
139 | static inline const struct cpumask * |
140 | cpumask_of_pcibus(const struct pci_bus *bus) | |
141 | { | |
7715a1e8 DR |
142 | int node; |
143 | ||
144 | node = __pcibus_to_node(bus); | |
145 | return (node == -1) ? cpu_online_mask : | |
146 | cpumask_of_node(node); | |
393d68fb | 147 | } |
b4ea9299 | 148 | #endif |
f3e6f164 | 149 | |
dd5fc854 MG |
150 | struct pci_setup_rom { |
151 | struct setup_data data; | |
152 | uint16_t vendor; | |
153 | uint16_t devid; | |
154 | uint64_t pcilen; | |
155 | unsigned long segment; | |
156 | unsigned long bus; | |
157 | unsigned long device; | |
158 | unsigned long function; | |
159 | uint8_t romdata[0]; | |
160 | }; | |
161 | ||
1965aae3 | 162 | #endif /* _ASM_X86_PCI_H */ |