Commit | Line | Data |
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edb181ac YL |
1 | #ifndef __ASM_NUMAQ_APIC_H |
2 | #define __ASM_NUMAQ_APIC_H | |
1da177e4 LT |
3 | |
4 | #include <asm/io.h> | |
5 | #include <linux/mmzone.h> | |
6 | #include <linux/nodemask.h> | |
7 | ||
8 | #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) | |
9 | ||
0a9cc20b | 10 | static inline const cpumask_t *numaq_target_cpus(void) |
1da177e4 | 11 | { |
e7986739 | 12 | return &CPU_MASK_ALL; |
1da177e4 LT |
13 | } |
14 | ||
d1d7cae8 IM |
15 | static inline unsigned long |
16 | numaq_check_apicid_used(physid_mask_t bitmap, int apicid) | |
d49c4288 YL |
17 | { |
18 | return physid_isset(apicid, bitmap); | |
19 | } | |
d1d7cae8 | 20 | static inline unsigned long numaq_check_apicid_present(int bit) |
d49c4288 YL |
21 | { |
22 | return physid_isset(bit, phys_cpu_present_map); | |
23 | } | |
1da177e4 LT |
24 | #define apicid_cluster(apicid) (apicid & 0xF0) |
25 | ||
7ed248da | 26 | static inline int numaq_apic_id_registered(void) |
1da177e4 LT |
27 | { |
28 | return 1; | |
29 | } | |
30 | ||
a5c43296 | 31 | static inline void numaq_init_apic_ldr(void) |
1da177e4 LT |
32 | { |
33 | /* Already done in NUMA-Q firmware */ | |
34 | } | |
35 | ||
72ce0165 | 36 | static inline void numaq_setup_apic_routing(void) |
1da177e4 LT |
37 | { |
38 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | |
39 | "NUMA-Q", nr_ioapics); | |
40 | } | |
41 | ||
42 | /* | |
43 | * Skip adding the timer int on secondary nodes, which causes | |
44 | * a small but painful rift in the time-space continuum. | |
45 | */ | |
33a201fa | 46 | static inline int numaq_multi_timer_check(int apic, int irq) |
1da177e4 LT |
47 | { |
48 | return apic != 0 && irq == 0; | |
49 | } | |
50 | ||
d190cb87 | 51 | static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map) |
1da177e4 LT |
52 | { |
53 | /* We don't have a good way to do this yet - hack */ | |
54 | return physids_promote(0xFUL); | |
55 | } | |
56 | ||
57 | /* Mapping from cpu number to logical apicid */ | |
58 | extern u8 cpu_2_logical_apicid[]; | |
5257c511 IM |
59 | |
60 | static inline int numaq_cpu_to_logical_apicid(int cpu) | |
1da177e4 | 61 | { |
9628937d MT |
62 | if (cpu >= nr_cpu_ids) |
63 | return BAD_APICID; | |
1da177e4 LT |
64 | return (int)cpu_2_logical_apicid[cpu]; |
65 | } | |
66 | ||
67 | /* | |
68 | * Supporting over 60 cpus on NUMA-Q requires a locality-dependent | |
69 | * cpu to APIC ID relation to properly interact with the intelligent | |
70 | * mode of the cluster controller. | |
71 | */ | |
a21769a4 | 72 | static inline int numaq_cpu_present_to_apicid(int mps_cpu) |
1da177e4 LT |
73 | { |
74 | if (mps_cpu < 60) | |
75 | return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3)); | |
76 | else | |
77 | return BAD_APICID; | |
78 | } | |
79 | ||
3f57a318 | 80 | static inline int numaq_apicid_to_node(int logical_apicid) |
1da177e4 LT |
81 | { |
82 | return logical_apicid >> 4; | |
83 | } | |
84 | ||
85 | static inline physid_mask_t apicid_to_cpu_present(int logical_apicid) | |
86 | { | |
3f57a318 | 87 | int node = numaq_apicid_to_node(logical_apicid); |
1da177e4 LT |
88 | int cpu = __ffs(logical_apicid & 0xf); |
89 | ||
90 | return physid_mask_of_physid(cpu + 4*node); | |
91 | } | |
92 | ||
c7e844f0 AK |
93 | extern void *xquad_portio; |
94 | ||
1da177e4 LT |
95 | static inline void setup_portio_remap(void) |
96 | { | |
97 | int num_quads = num_online_nodes(); | |
98 | ||
99 | if (num_quads <= 1) | |
100 | return; | |
101 | ||
102 | printk("Remapping cross-quad port I/O for %d quads\n", num_quads); | |
103 | xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD); | |
104 | printk("xquad_portio vaddr 0x%08lx, len %08lx\n", | |
105 | (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD); | |
106 | } | |
107 | ||
108 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | |
109 | { | |
110 | return (1); | |
111 | } | |
112 | ||
113 | static inline void enable_apic_mode(void) | |
114 | { | |
115 | } | |
116 | ||
117 | /* | |
118 | * We use physical apicids here, not logical, so just return the default | |
119 | * physical broadcast to stop people from breaking us | |
120 | */ | |
e7986739 | 121 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) |
1da177e4 LT |
122 | { |
123 | return (int) 0xF; | |
124 | } | |
125 | ||
6eeb7c5a MT |
126 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
127 | const struct cpumask *andmask) | |
95d313cf MT |
128 | { |
129 | return (int) 0xF; | |
130 | } | |
131 | ||
1da177e4 LT |
132 | /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */ |
133 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | |
134 | { | |
135 | return cpuid_apic >> index_msb; | |
136 | } | |
137 | ||
edb181ac | 138 | #endif /* __ASM_NUMAQ_APIC_H */ |