[linux-block.git] / arch / x86 / include / asm / mc146818rtc.h

/*
 * Machine dependent access functions for RTC registers.
 */
#ifndef _ASM_X86_MC146818RTC_H
#define _ASM_X86_MC146818RTC_H

#include <asm/io.h>
#include <asm/system.h>
#include <asm/processor.h>
#include <linux/mc146818rtc.h>

#ifndef RTC_PORT
#define RTC_PORT(x)	(0x70 + (x))
#define RTC_ALWAYS_BCD	1	/* RTC operates in binary mode */
#endif

#if defined(CONFIG_X86_32) && defined(__HAVE_ARCH_CMPXCHG)
/*
 * This lock provides nmi access to the CMOS/RTC registers.  It has some
 * special properties.  It is owned by a CPU and stores the index register
 * currently being accessed (if owned).  The idea here is that it works
 * like a normal lock (normally).  However, in an NMI, the NMI code will
 * first check to see if its CPU owns the lock, meaning that the NMI
 * interrupted during the read/write of the device.  If it does, it goes ahead
 * and performs the access and then restores the index register.  If it does
 * not, it locks normally.
 *
 * Note that since we are working with NMIs, we need this lock even in
 * a non-SMP machine just to mark that the lock is owned.
 *
 * This only works with compare-and-swap.  There is no other way to
 * atomically claim the lock and set the owner.
 */
#include <linux/smp.h>
extern volatile unsigned long cmos_lock;

/*
 * All of these below must be called with interrupts off, preempt
 * disabled, etc.
 */

static inline void lock_cmos(unsigned char reg)
{
	unsigned long new;
	new = ((smp_processor_id() + 1) << 8) | reg;
	for (;;) {
		if (cmos_lock) {
			cpu_relax();
			continue;
		}
		if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
			return;
	}
}

static inline void unlock_cmos(void)
{
	cmos_lock = 0;
}

static inline int do_i_have_lock_cmos(void)
{
	return (cmos_lock >> 8) == (smp_processor_id() + 1);
}

static inline unsigned char current_lock_cmos_reg(void)
{
	return cmos_lock & 0xff;
}

#define lock_cmos_prefix(reg)			\
	do {					\
		unsigned long cmos_flags;	\
		local_irq_save(cmos_flags);	\
		lock_cmos(reg)

#define lock_cmos_suffix(reg)			\
	unlock_cmos();				\
	local_irq_restore(cmos_flags);		\
	} while (0)
#else
#define lock_cmos_prefix(reg) do {} while (0)
#define lock_cmos_suffix(reg) do {} while (0)
#define lock_cmos(reg)
#define unlock_cmos()
#define do_i_have_lock_cmos() 0
#define current_lock_cmos_reg() 0
#endif

/*
 * The yet supported machines all access the RTC index register via
 * an ISA port access but the way to access the date register differs ...
 */
#define CMOS_READ(addr) rtc_cmos_read(addr)
#define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
unsigned char rtc_cmos_read(unsigned char addr);
void rtc_cmos_write(unsigned char val, unsigned char addr);

extern int mach_set_rtc_mmss(unsigned long nowtime);
extern unsigned long mach_get_cmos_time(void);

#define RTC_IRQ 8

#endif /* _ASM_X86_MC146818RTC_H */
Commit	Line	Data
6ce60b07 TG	1	/*
	2	* Machine dependent access functions for RTC registers.
	3	*/
1965aae3 PA	4	#ifndef _ASM_X86_MC146818RTC_H
1965aae3 PA	5	#define _ASM_X86_MC146818RTC_H
6ce60b07 TG	6
	7	#include <asm/io.h>
	8	#include <asm/system.h>
	9	#include <asm/processor.h>
	10	#include <linux/mc146818rtc.h>
	11
	12	#ifndef RTC_PORT
	13	#define RTC_PORT(x) (0x70 + (x))
	14	#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
	15	#endif
	16
	17	#if defined(CONFIG_X86_32) && defined(__HAVE_ARCH_CMPXCHG)
	18	/*
	19	* This lock provides nmi access to the CMOS/RTC registers. It has some
	20	* special properties. It is owned by a CPU and stores the index register
	21	* currently being accessed (if owned). The idea here is that it works
	22	* like a normal lock (normally). However, in an NMI, the NMI code will
	23	* first check to see if its CPU owns the lock, meaning that the NMI
	24	* interrupted during the read/write of the device. If it does, it goes ahead
	25	* and performs the access and then restores the index register. If it does
	26	* not, it locks normally.
	27	*
	28	* Note that since we are working with NMIs, we need this lock even in
	29	* a non-SMP machine just to mark that the lock is owned.
	30	*
	31	* This only works with compare-and-swap. There is no other way to
	32	* atomically claim the lock and set the owner.
	33	*/
	34	#include <linux/smp.h>
	35	extern volatile unsigned long cmos_lock;
	36
	37	/*
	38	* All of these below must be called with interrupts off, preempt
	39	* disabled, etc.
	40	*/
	41
	42	static inline void lock_cmos(unsigned char reg)
	43	{
	44	unsigned long new;
933a4415	45	new = ((smp_processor_id() + 1) << 8) \| reg;
6ce60b07 TG	46	for (;;) {
	47	if (cmos_lock) {
	48	cpu_relax();
	49	continue;
	50	}
	51	if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
	52	return;
	53	}
	54	}
	55
	56	static inline void unlock_cmos(void)
	57	{
	58	cmos_lock = 0;
	59	}
933a4415	60
6ce60b07 TG	61	static inline int do_i_have_lock_cmos(void)
6ce60b07 TG	62	{
933a4415	63	return (cmos_lock >> 8) == (smp_processor_id() + 1);
6ce60b07	64	}
933a4415	65
6ce60b07 TG	66	static inline unsigned char current_lock_cmos_reg(void)
	67	{
	68	return cmos_lock & 0xff;
	69	}
933a4415 JP	70
933a4415 JP	71	#define lock_cmos_prefix(reg) \
6ce60b07 TG	72	do { \
	73	unsigned long cmos_flags; \
	74	local_irq_save(cmos_flags); \
	75	lock_cmos(reg)
933a4415 JP	76
	77	#define lock_cmos_suffix(reg) \
	78	unlock_cmos(); \
	79	local_irq_restore(cmos_flags); \
6ce60b07	80	} while (0)
96a388de	81	#else
6ce60b07 TG	82	#define lock_cmos_prefix(reg) do {} while (0)
	83	#define lock_cmos_suffix(reg) do {} while (0)
	84	#define lock_cmos(reg)
	85	#define unlock_cmos()
	86	#define do_i_have_lock_cmos() 0
	87	#define current_lock_cmos_reg() 0
96a388de	88	#endif
6ce60b07 TG	89
	90	/*
	91	* The yet supported machines all access the RTC index register via
	92	* an ISA port access but the way to access the date register differs ...
	93	*/
	94	#define CMOS_READ(addr) rtc_cmos_read(addr)
	95	#define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
	96	unsigned char rtc_cmos_read(unsigned char addr);
	97	void rtc_cmos_write(unsigned char val, unsigned char addr);
	98
fe599f9f TG	99	extern int mach_set_rtc_mmss(unsigned long nowtime);
	100	extern unsigned long mach_get_cmos_time(void);
	101
6ce60b07 TG	102	#define RTC_IRQ 8
6ce60b07 TG	103
1965aae3	104	#endif /* _ASM_X86_MC146818RTC_H */