KVM: x86: switch kvm_set_memory_alias to SRCU update
[linux-2.6-block.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
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2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
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11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
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14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
229456fc 17#include <linux/tracepoint.h>
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18
19#include <linux/kvm.h>
20#include <linux/kvm_para.h>
edf88417 21#include <linux/kvm_types.h>
34c16eec 22
50d0a0f9 23#include <asm/pvclock-abi.h>
e01a1b57 24#include <asm/desc.h>
0bed3b56 25#include <asm/mtrr.h>
9962d032 26#include <asm/msr-index.h>
e01a1b57 27
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28#define KVM_MAX_VCPUS 16
29#define KVM_MEMORY_SLOTS 32
30/* memory slots that does not exposed to userspace */
31#define KVM_PRIVATE_MEM_SLOTS 4
32
33#define KVM_PIO_PAGE_OFFSET 1
542472b5 34#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 35
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36#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
37#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
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38#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
39 0xFFFFFF0000000000ULL)
cd6e8f87 40
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41#define INVALID_PAGE (~(hpa_t)0)
42#define UNMAPPED_GVA (~(gpa_t)0)
43
ec04b260 44/* KVM Hugepage definitions for x86 */
04326caa 45#define KVM_NR_PAGE_SIZES 3
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46#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + (((x) - 1) * 9))
47#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
48#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
49#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
05da4558 50
cd6e8f87 51#define DE_VECTOR 0
19bd8afd 52#define DB_VECTOR 1
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53#define BP_VECTOR 3
54#define OF_VECTOR 4
55#define BR_VECTOR 5
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56#define UD_VECTOR 6
57#define NM_VECTOR 7
58#define DF_VECTOR 8
59#define TS_VECTOR 10
60#define NP_VECTOR 11
61#define SS_VECTOR 12
62#define GP_VECTOR 13
63#define PF_VECTOR 14
77ab6db0 64#define MF_VECTOR 16
53371b50 65#define MC_VECTOR 18
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66
67#define SELECTOR_TI_MASK (1 << 2)
68#define SELECTOR_RPL_MASK 0x03
69
70#define IOPL_SHIFT 12
71
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72#define KVM_ALIAS_SLOTS 4
73
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74#define KVM_PERMILLE_MMU_PAGES 20
75#define KVM_MIN_ALLOC_MMU_PAGES 64
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76#define KVM_MMU_HASH_SHIFT 10
77#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
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78#define KVM_MIN_FREE_MMU_PAGES 5
79#define KVM_REFILL_PAGES 25
80#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 81#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 82#define KVM_NR_VAR_MTRR 8
d657a98e 83
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84extern spinlock_t kvm_lock;
85extern struct list_head vm_list;
86
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87struct kvm_vcpu;
88struct kvm;
89
5fdbf976 90enum kvm_reg {
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91 VCPU_REGS_RAX = 0,
92 VCPU_REGS_RCX = 1,
93 VCPU_REGS_RDX = 2,
94 VCPU_REGS_RBX = 3,
95 VCPU_REGS_RSP = 4,
96 VCPU_REGS_RBP = 5,
97 VCPU_REGS_RSI = 6,
98 VCPU_REGS_RDI = 7,
99#ifdef CONFIG_X86_64
100 VCPU_REGS_R8 = 8,
101 VCPU_REGS_R9 = 9,
102 VCPU_REGS_R10 = 10,
103 VCPU_REGS_R11 = 11,
104 VCPU_REGS_R12 = 12,
105 VCPU_REGS_R13 = 13,
106 VCPU_REGS_R14 = 14,
107 VCPU_REGS_R15 = 15,
108#endif
5fdbf976 109 VCPU_REGS_RIP,
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110 NR_VCPU_REGS
111};
112
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113enum kvm_reg_ex {
114 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
115};
116
2b3ccfa0 117enum {
81609e3e 118 VCPU_SREG_ES,
2b3ccfa0 119 VCPU_SREG_CS,
81609e3e 120 VCPU_SREG_SS,
2b3ccfa0 121 VCPU_SREG_DS,
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122 VCPU_SREG_FS,
123 VCPU_SREG_GS,
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124 VCPU_SREG_TR,
125 VCPU_SREG_LDTR,
126};
127
56e82318 128#include <asm/kvm_emulate.h>
2b3ccfa0 129
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130#define KVM_NR_MEM_OBJS 40
131
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132#define KVM_NR_DB_REGS 4
133
134#define DR6_BD (1 << 13)
135#define DR6_BS (1 << 14)
136#define DR6_FIXED_1 0xffff0ff0
137#define DR6_VOLATILE 0x0000e00f
138
139#define DR7_BP_EN_MASK 0x000000ff
140#define DR7_GE (1 << 9)
141#define DR7_GD (1 << 13)
142#define DR7_FIXED_1 0x00000400
143#define DR7_VOLATILE 0xffff23ff
144
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145/*
146 * We don't want allocation failures within the mmu code, so we preallocate
147 * enough memory for a single page fault in a cache.
148 */
149struct kvm_mmu_memory_cache {
150 int nobjs;
151 void *objects[KVM_NR_MEM_OBJS];
152};
153
154#define NR_PTE_CHAIN_ENTRIES 5
155
156struct kvm_pte_chain {
157 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
158 struct hlist_node link;
159};
160
161/*
162 * kvm_mmu_page_role, below, is defined as:
163 *
164 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
165 * bits 4:7 - page table level for this shadow (1-4)
166 * bits 8:9 - page table quadrant for 2-level guests
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167 * bit 16 - direct mapping of virtual to physical mapping at gfn
168 * used for real mode and two-dimensional paging
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169 * bits 17:19 - common access permissions for all ptes in this shadow page
170 */
171union kvm_mmu_page_role {
172 unsigned word;
173 struct {
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174 unsigned glevels:4;
175 unsigned level:4;
176 unsigned quadrant:2;
177 unsigned pad_for_nice_hex_output:6;
f6e2c02b 178 unsigned direct:1;
7d76b4d3 179 unsigned access:3;
2e53d63a 180 unsigned invalid:1;
2f0b3d60 181 unsigned cr4_pge:1;
9645bb56 182 unsigned nxe:1;
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183 };
184};
185
186struct kvm_mmu_page {
187 struct list_head link;
188 struct hlist_node hash_link;
189
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190 struct list_head oos_link;
191
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192 /*
193 * The following two entries are used to key the shadow page in the
194 * hash table.
195 */
196 gfn_t gfn;
197 union kvm_mmu_page_role role;
198
199 u64 *spt;
200 /* hold the gfn of each spte inside spt */
201 gfn_t *gfns;
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202 /*
203 * One bit set per slot which has memory
204 * in this shadow page.
205 */
206 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
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207 int multimapped; /* More than one parent_pte? */
208 int root_count; /* Currently serving as active root */
4731d4c7 209 bool unsync;
60c8aec6 210 unsigned int unsync_children;
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211 union {
212 u64 *parent_pte; /* !multimapped */
213 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
214 };
0074ff63 215 DECLARE_BITMAP(unsync_child_bitmap, 512);
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216};
217
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218struct kvm_pv_mmu_op_buffer {
219 void *ptr;
220 unsigned len;
221 unsigned processed;
222 char buf[512] __aligned(sizeof(long));
223};
224
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225struct kvm_pio_request {
226 unsigned long count;
227 int cur_count;
228 gva_t guest_gva;
229 int in;
230 int port;
231 int size;
232 int string;
233 int down;
234 int rep;
235};
236
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237/*
238 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
239 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
240 * mode.
241 */
242struct kvm_mmu {
243 void (*new_cr3)(struct kvm_vcpu *vcpu);
244 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
245 void (*free)(struct kvm_vcpu *vcpu);
246 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
247 void (*prefetch_page)(struct kvm_vcpu *vcpu,
248 struct kvm_mmu_page *page);
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249 int (*sync_page)(struct kvm_vcpu *vcpu,
250 struct kvm_mmu_page *sp);
a7052897 251 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
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252 hpa_t root_hpa;
253 int root_level;
254 int shadow_root_level;
a770f6f2 255 union kvm_mmu_page_role base_role;
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256
257 u64 *pae_root;
82725b20 258 u64 rsvd_bits_mask[2][4];
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259};
260
ad312c7c 261struct kvm_vcpu_arch {
34c16eec 262 u64 host_tsc;
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263 /*
264 * rip and regs accesses must go through
265 * kvm_{register,rip}_{read,write} functions.
266 */
267 unsigned long regs[NR_VCPU_REGS];
268 u32 regs_avail;
269 u32 regs_dirty;
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270
271 unsigned long cr0;
272 unsigned long cr2;
273 unsigned long cr3;
274 unsigned long cr4;
fc78f519 275 unsigned long cr4_guest_owned_bits;
34c16eec 276 unsigned long cr8;
1371d904 277 u32 hflags;
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278 u64 pdptrs[4]; /* pae */
279 u64 shadow_efer;
280 u64 apic_base;
281 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 282 int32_t apic_arb_prio;
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283 int mp_state;
284 int sipi_vector;
285 u64 ia32_misc_enable_msr;
b209749f 286 bool tpr_access_reporting;
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287
288 struct kvm_mmu mmu;
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289 /* only needed in kvm_pv_mmu_op() path, but it's hot so
290 * put it here to avoid allocation */
291 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
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292
293 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
294 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
295 struct kvm_mmu_memory_cache mmu_page_cache;
296 struct kvm_mmu_memory_cache mmu_page_header_cache;
297
298 gfn_t last_pt_write_gfn;
299 int last_pt_write_count;
300 u64 *last_pte_updated;
1b7fcd32 301 gfn_t last_pte_gfn;
34c16eec 302
d7824fff 303 struct {
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304 gfn_t gfn; /* presumed gfn during guest pte update */
305 pfn_t pfn; /* pfn corresponding to that gfn */
e930bffe 306 unsigned long mmu_seq;
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307 } update_pte;
308
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309 struct i387_fxsave_struct host_fx_image;
310 struct i387_fxsave_struct guest_fx_image;
311
312 gva_t mmio_fault_cr2;
313 struct kvm_pio_request pio;
314 void *pio_data;
315
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316 u8 event_exit_inst_len;
317
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318 struct kvm_queued_exception {
319 bool pending;
320 bool has_error_code;
321 u8 nr;
322 u32 error_code;
323 } exception;
324
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325 struct kvm_queued_interrupt {
326 bool pending;
66fd3f7f 327 bool soft;
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328 u8 nr;
329 } interrupt;
330
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331 int halt_request; /* real mode on Intel only */
332
333 int cpuid_nent;
07716717 334 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
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335 /* emulate context */
336
337 struct x86_emulate_ctxt emulate_ctxt;
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338
339 gpa_t time;
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340 struct pvclock_vcpu_time_info hv_clock;
341 unsigned int hv_clock_tsc_khz;
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342 unsigned int time_offset;
343 struct page *time_page;
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344
345 bool nmi_pending;
668f612f 346 bool nmi_injected;
9ba075a6 347
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348 struct mtrr_state_type mtrr_state;
349 u32 pat;
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350
351 int switch_db_regs;
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352 unsigned long db[KVM_NR_DB_REGS];
353 unsigned long dr6;
354 unsigned long dr7;
355 unsigned long eff_db[KVM_NR_DB_REGS];
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356
357 u64 mcg_cap;
358 u64 mcg_status;
359 u64 mcg_ctl;
360 u64 *mce_banks;
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361
362 /* used for guest single stepping over the given code position */
363 u16 singlestep_cs;
364 unsigned long singlestep_rip;
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365};
366
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367struct kvm_mem_alias {
368 gfn_t base_gfn;
369 unsigned long npages;
370 gfn_t target_gfn;
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371#define KVM_ALIAS_INVALID 1UL
372 unsigned long flags;
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373};
374
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375#define KVM_ARCH_HAS_UNALIAS_INSTANTIATION
376
fef9cce0 377struct kvm_mem_aliases {
d69fb81f 378 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
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379 int naliases;
380};
381
382struct kvm_arch {
383 struct kvm_mem_aliases *aliases;
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384
385 unsigned int n_free_mmu_pages;
386 unsigned int n_requested_mmu_pages;
387 unsigned int n_alloc_mmu_pages;
388 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
389 /*
390 * Hash table of struct kvm_mmu_page.
391 */
392 struct list_head active_mmu_pages;
4d5c5d0f 393 struct list_head assigned_dev_head;
19de40a8 394 struct iommu_domain *iommu_domain;
522c68c4 395 int iommu_flags;
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396 struct kvm_pic *vpic;
397 struct kvm_ioapic *vioapic;
7837699f 398 struct kvm_pit *vpit;
cc6e462c 399 int vapics_in_nmi_mode;
bfc6d222 400
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401 unsigned int tss_addr;
402 struct page *apic_access_page;
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403
404 gpa_t wall_clock;
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405
406 struct page *ept_identity_pagetable;
407 bool ept_identity_pagetable_done;
b927a3ce 408 gpa_t ept_identity_map_addr;
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409
410 unsigned long irq_sources_bitmap;
53f658b3 411 u64 vm_init_tsc;
afbcf7ab 412 s64 kvmclock_offset;
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413
414 struct kvm_xen_hvm_config xen_hvm_config;
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415};
416
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417struct kvm_vm_stat {
418 u32 mmu_shadow_zapped;
419 u32 mmu_pte_write;
420 u32 mmu_pte_updated;
421 u32 mmu_pde_zapped;
422 u32 mmu_flooded;
423 u32 mmu_recycled;
dfc5aa00 424 u32 mmu_cache_miss;
4731d4c7 425 u32 mmu_unsync;
0711456c 426 u32 remote_tlb_flush;
05da4558 427 u32 lpages;
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428};
429
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430struct kvm_vcpu_stat {
431 u32 pf_fixed;
432 u32 pf_guest;
433 u32 tlb_flush;
434 u32 invlpg;
435
436 u32 exits;
437 u32 io_exits;
438 u32 mmio_exits;
439 u32 signal_exits;
440 u32 irq_window_exits;
f08864b4 441 u32 nmi_window_exits;
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442 u32 halt_exits;
443 u32 halt_wakeup;
444 u32 request_irq_exits;
445 u32 irq_exits;
446 u32 host_state_reload;
447 u32 efer_reload;
448 u32 fpu_reload;
449 u32 insn_emulation;
450 u32 insn_emulation_fail;
f11c3a8d 451 u32 hypercalls;
fa89a817 452 u32 irq_injections;
c4abb7c9 453 u32 nmi_injections;
77b4c255 454};
ad312c7c 455
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456struct descriptor_table {
457 u16 limit;
458 unsigned long base;
459} __attribute__((packed));
460
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461struct kvm_x86_ops {
462 int (*cpu_has_kvm_support)(void); /* __init */
463 int (*disabled_by_bios)(void); /* __init */
10474ae8 464 int (*hardware_enable)(void *dummy);
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465 void (*hardware_disable)(void *dummy);
466 void (*check_processor_compatibility)(void *rtn);
467 int (*hardware_setup)(void); /* __init */
468 void (*hardware_unsetup)(void); /* __exit */
774ead3a 469 bool (*cpu_has_accelerated_tpr)(void);
0e851880 470 void (*cpuid_update)(struct kvm_vcpu *vcpu);
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471
472 /* Create, but do not attach this VCPU */
473 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
474 void (*vcpu_free)(struct kvm_vcpu *vcpu);
475 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
476
477 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
478 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
479 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8 480
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481 void (*set_guest_debug)(struct kvm_vcpu *vcpu,
482 struct kvm_guest_debug *dbg);
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483 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
484 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
485 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
486 void (*get_segment)(struct kvm_vcpu *vcpu,
487 struct kvm_segment *var, int seg);
2e4d2653 488 int (*get_cpl)(struct kvm_vcpu *vcpu);
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489 void (*set_segment)(struct kvm_vcpu *vcpu,
490 struct kvm_segment *var, int seg);
491 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
492 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
493 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
494 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
495 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
496 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
497 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
498 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
499 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
500 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
501 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
502 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
503 int *exception);
5fdbf976 504 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
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505 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
506 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
507
508 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 509
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510 void (*run)(struct kvm_vcpu *vcpu);
511 int (*handle_exit)(struct kvm_vcpu *vcpu);
ea4a5ff8 512 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
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513 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
514 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
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515 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
516 unsigned char *hypercall_addr);
66fd3f7f 517 void (*set_irq)(struct kvm_vcpu *vcpu);
95ba8273 518 void (*set_nmi)(struct kvm_vcpu *vcpu);
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519 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
520 bool has_error_code, u32 error_code);
78646121 521 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273 522 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
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523 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
524 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
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525 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
526 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
527 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
ea4a5ff8 528 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 529 int (*get_tdp_level)(void);
4b12f0de 530 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
344f414f 531 bool (*gb_page_enable)(void);
4e47c7a6 532 bool (*rdtscp_supported)(void);
344f414f 533
229456fc 534 const struct trace_print_flags *exit_reasons_str;
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535};
536
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537extern struct kvm_x86_ops *kvm_x86_ops;
538
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539int kvm_mmu_module_init(void);
540void kvm_mmu_module_exit(void);
541
542void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
543int kvm_mmu_create(struct kvm_vcpu *vcpu);
544int kvm_mmu_setup(struct kvm_vcpu *vcpu);
545void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY
546void kvm_mmu_set_base_ptes(u64 base_pte);
547void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 548 u64 dirty_mask, u64 nx_mask, u64 x_mask);
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ZX
549
550int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
551void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
552void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 553unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
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ZX
554void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
555
cc4b6871
JR
556int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
557
3200f405 558int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 559 const void *val, int bytes);
2f333bcb
MT
560int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
561 gpa_t addr, unsigned long *ret);
4b12f0de 562u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
2f333bcb
MT
563
564extern bool tdp_enabled;
9f811285 565
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566enum emulation_result {
567 EMULATE_DONE, /* no further processing */
568 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
569 EMULATE_FAIL, /* can't emulate this instruction */
570};
571
571008da
SY
572#define EMULTYPE_NO_DECODE (1 << 0)
573#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 574#define EMULTYPE_SKIP (1 << 2)
851ba692 575int emulate_instruction(struct kvm_vcpu *vcpu,
571008da 576 unsigned long cr2, u16 error_code, int emulation_type);
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577void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
578void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
579void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
580void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
581 unsigned long *rflags);
582
583unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
584void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
585 unsigned long *rflags);
f2b4b7dd 586void kvm_enable_efer_bits(u64);
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587int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
588int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
589
590struct x86_emulate_ctxt;
591
851ba692 592int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in,
54f1585a 593 int size, unsigned port);
851ba692 594int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
54f1585a
ZX
595 int size, unsigned long count, int down,
596 gva_t address, int rep, unsigned port);
597void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
598int kvm_emulate_halt(struct kvm_vcpu *vcpu);
599int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
600int emulate_clts(struct kvm_vcpu *vcpu);
601int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
602 unsigned long *dest);
603int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
604 unsigned long value);
605
3e6e0aab
GT
606void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
607int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
608 int type_bits, int seg);
609
37817f29
IE
610int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
611
2d3ad1f4 612void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR
613void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
614void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
615void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK
616unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
617void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
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618void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
619
620int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
621int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
622
91586a3b
JK
623unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
624void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
625
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AK
626void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
627void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK
628void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
629 u32 error_code);
0a79b009 630bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
298101da 631
4925663a 632int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 633
3419ffc8
SY
634void kvm_inject_nmi(struct kvm_vcpu *vcpu);
635
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636void fx_init(struct kvm_vcpu *vcpu);
637
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638int emulator_write_emulated(unsigned long addr,
639 const void *val,
640 unsigned int bytes,
641 struct kvm_vcpu *vcpu);
642
643unsigned long segment_base(u16 selector);
644
d835dfec 645void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 646void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
647 const u8 *new, int bytes,
648 bool guest_initiated);
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ZX
649int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
650void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
651int kvm_mmu_load(struct kvm_vcpu *vcpu);
652void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 653void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
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654
655int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
656
657int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
658
3067714c 659int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 660void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 661
18552672 662void kvm_enable_tdp(void);
5f4cb662 663void kvm_disable_tdp(void);
18552672 664
a03490ed 665int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 666int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d 667
2843099f
IE
668struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
669
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ZX
670static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
671{
672 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
673
674 return (struct kvm_mmu_page *)page_private(page);
675}
676
d6e88aec 677static inline u16 kvm_read_fs(void)
ec6d273d
ZX
678{
679 u16 seg;
680 asm("mov %%fs, %0" : "=g"(seg));
681 return seg;
682}
683
d6e88aec 684static inline u16 kvm_read_gs(void)
ec6d273d
ZX
685{
686 u16 seg;
687 asm("mov %%gs, %0" : "=g"(seg));
688 return seg;
689}
690
d6e88aec 691static inline u16 kvm_read_ldt(void)
ec6d273d
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692{
693 u16 ldt;
694 asm("sldt %0" : "=g"(ldt));
695 return ldt;
696}
697
d6e88aec 698static inline void kvm_load_fs(u16 sel)
ec6d273d
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699{
700 asm("mov %0, %%fs" : : "rm"(sel));
701}
702
d6e88aec 703static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX
704{
705 asm("mov %0, %%gs" : : "rm"(sel));
706}
707
d6e88aec 708static inline void kvm_load_ldt(u16 sel)
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709{
710 asm("lldt %0" : : "rm"(sel));
711}
ec6d273d 712
d6e88aec 713static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
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714{
715 asm("sidt %0" : "=m"(*table));
716}
717
d6e88aec 718static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
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719{
720 asm("sgdt %0" : "=m"(*table));
721}
722
d6e88aec 723static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX
724{
725 u16 tr;
726 asm("str %0" : "=g"(tr));
727 return segment_base(tr);
728}
729
730#ifdef CONFIG_X86_64
731static inline unsigned long read_msr(unsigned long msr)
732{
733 u64 value;
734
735 rdmsrl(msr, value);
736 return value;
737}
738#endif
739
d6e88aec 740static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX
741{
742 asm("fxsave (%0)":: "r" (image));
743}
744
d6e88aec 745static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX
746{
747 asm("fxrstor (%0)":: "r" (image));
748}
749
d6e88aec 750static inline void kvm_fx_finit(void)
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751{
752 asm("finit");
753}
754
755static inline u32 get_rdx_init_val(void)
756{
757 return 0x600; /* P6 family */
758}
759
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760static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
761{
762 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
763}
764
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765#define TSS_IOPB_BASE_OFFSET 0x66
766#define TSS_BASE_SIZE 0x68
767#define TSS_IOPB_SIZE (65536 / 8)
768#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP
769#define RMODE_TSS_SIZE \
770 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 771
37817f29
IE
772enum {
773 TASK_SWITCH_CALL = 0,
774 TASK_SWITCH_IRET = 1,
775 TASK_SWITCH_JMP = 2,
776 TASK_SWITCH_GATE = 3,
777};
778
1371d904 779#define HF_GIF_MASK (1 << 0)
3d6368ef
AG
780#define HF_HIF_MASK (1 << 1)
781#define HF_VINTR_MASK (1 << 2)
95ba8273 782#define HF_NMI_MASK (1 << 3)
44c11430 783#define HF_IRET_MASK (1 << 4)
1371d904 784
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785/*
786 * Hardware virtualization extension instructions may fault if a
787 * reboot turns off virtualization while processes are running.
788 * Trap the fault and ignore the instruction if that happens.
789 */
790asmlinkage void kvm_handle_fault_on_reboot(void);
791
792#define __kvm_handle_fault_on_reboot(insn) \
793 "666: " insn "\n\t" \
18b13e54 794 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 795 "667: \n\t" \
8ceed347 796 __ASM_SIZE(push) " $666b \n\t" \
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797 "jmp kvm_handle_fault_on_reboot \n\t" \
798 ".popsection \n\t" \
799 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 800 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
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801 ".popsection"
802
e930bffe
AA
803#define KVM_ARCH_WANT_MMU_NOTIFIER
804int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
805int kvm_age_hva(struct kvm *kvm, unsigned long hva);
3da0dd43 806void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
82725b20 807int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
a1b37100
GN
808int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
809int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
0b71785d 810int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
e930bffe 811
18863bdd 812void kvm_define_shared_msr(unsigned index, u32 msr);
d5696725 813void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
18863bdd 814
1965aae3 815#endif /* _ASM_X86_KVM_HOST_H */