Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
6abcd98f GOC |
2 | #ifndef _X86_IRQFLAGS_H_ |
3 | #define _X86_IRQFLAGS_H_ | |
4 | ||
5 | #include <asm/processor-flags.h> | |
6 | ||
7 | #ifndef __ASSEMBLY__ | |
6727ad9e | 8 | |
07f07f55 TG |
9 | #include <asm/nospec-branch.h> |
10 | ||
6abcd98f GOC |
11 | /* |
12 | * Interrupt control: | |
13 | */ | |
14 | ||
208cbb32 ND |
15 | /* Declaration required for gcc < 4.9 to prevent -Werror=missing-prototypes */ |
16 | extern inline unsigned long native_save_fl(void); | |
7a745be1 | 17 | extern __always_inline unsigned long native_save_fl(void) |
6abcd98f GOC |
18 | { |
19 | unsigned long flags; | |
20 | ||
f1f029c7 | 21 | /* |
ab94fcf5 PA |
22 | * "=rm" is safe here, because "pop" adjusts the stack before |
23 | * it evaluates its effective address -- this is part of the | |
24 | * documented behavior of the "pop" instruction. | |
f1f029c7 | 25 | */ |
cf7f7191 JP |
26 | asm volatile("# __raw_save_flags\n\t" |
27 | "pushf ; pop %0" | |
ab94fcf5 | 28 | : "=rm" (flags) |
cf7f7191 JP |
29 | : /* no input */ |
30 | : "memory"); | |
6abcd98f GOC |
31 | |
32 | return flags; | |
33 | } | |
34 | ||
7a745be1 | 35 | static __always_inline void native_irq_disable(void) |
6abcd98f GOC |
36 | { |
37 | asm volatile("cli": : :"memory"); | |
38 | } | |
39 | ||
7a745be1 | 40 | static __always_inline void native_irq_enable(void) |
6abcd98f GOC |
41 | { |
42 | asm volatile("sti": : :"memory"); | |
43 | } | |
44 | ||
2b5a0e42 | 45 | static __always_inline void native_safe_halt(void) |
6abcd98f | 46 | { |
07f07f55 | 47 | mds_idle_clear_cpu_buffers(); |
6abcd98f GOC |
48 | asm volatile("sti; hlt": : :"memory"); |
49 | } | |
50 | ||
2b5a0e42 | 51 | static __always_inline void native_halt(void) |
6abcd98f | 52 | { |
07f07f55 | 53 | mds_idle_clear_cpu_buffers(); |
6abcd98f GOC |
54 | asm volatile("hlt": : :"memory"); |
55 | } | |
56 | ||
b547fc2c TL |
57 | static __always_inline int native_irqs_disabled_flags(unsigned long flags) |
58 | { | |
59 | return !(flags & X86_EFLAGS_IF); | |
60 | } | |
61 | ||
62 | static __always_inline unsigned long native_local_irq_save(void) | |
63 | { | |
64 | unsigned long flags = native_save_fl(); | |
65 | ||
66 | native_irq_disable(); | |
67 | ||
68 | return flags; | |
69 | } | |
70 | ||
71 | static __always_inline void native_local_irq_restore(unsigned long flags) | |
72 | { | |
73 | if (!native_irqs_disabled_flags(flags)) | |
74 | native_irq_enable(); | |
75 | } | |
76 | ||
6abcd98f GOC |
77 | #endif |
78 | ||
6da63eb2 | 79 | #ifdef CONFIG_PARAVIRT_XXL |
6abcd98f GOC |
80 | #include <asm/paravirt.h> |
81 | #else | |
82 | #ifndef __ASSEMBLY__ | |
e08fbb78 | 83 | #include <linux/types.h> |
6abcd98f | 84 | |
7a745be1 | 85 | static __always_inline unsigned long arch_local_save_flags(void) |
6abcd98f GOC |
86 | { |
87 | return native_save_fl(); | |
88 | } | |
89 | ||
7a745be1 | 90 | static __always_inline void arch_local_irq_disable(void) |
6abcd98f GOC |
91 | { |
92 | native_irq_disable(); | |
93 | } | |
94 | ||
7a745be1 | 95 | static __always_inline void arch_local_irq_enable(void) |
6abcd98f GOC |
96 | { |
97 | native_irq_enable(); | |
98 | } | |
99 | ||
100 | /* | |
101 | * Used in the idle loop; sti takes one instruction cycle | |
102 | * to complete: | |
103 | */ | |
2b5a0e42 | 104 | static __always_inline void arch_safe_halt(void) |
6abcd98f GOC |
105 | { |
106 | native_safe_halt(); | |
107 | } | |
108 | ||
109 | /* | |
110 | * Used when interrupts are already enabled or to | |
111 | * shutdown the processor: | |
112 | */ | |
2b5a0e42 | 113 | static __always_inline void halt(void) |
6abcd98f GOC |
114 | { |
115 | native_halt(); | |
116 | } | |
117 | ||
118 | /* | |
119 | * For spinlocks, etc: | |
120 | */ | |
7a745be1 | 121 | static __always_inline unsigned long arch_local_irq_save(void) |
6abcd98f | 122 | { |
df9ee292 DH |
123 | unsigned long flags = arch_local_save_flags(); |
124 | arch_local_irq_disable(); | |
6abcd98f GOC |
125 | return flags; |
126 | } | |
127 | #else | |
128 | ||
9bad5658 JG |
129 | #ifdef CONFIG_X86_64 |
130 | #ifdef CONFIG_DEBUG_ENTRY | |
fafe5e74 | 131 | #define SAVE_FLAGS pushfq; popq %rax |
9bad5658 | 132 | #endif |
9bad5658 | 133 | |
6abcd98f GOC |
134 | #endif |
135 | ||
6abcd98f | 136 | #endif /* __ASSEMBLY__ */ |
9bad5658 | 137 | #endif /* CONFIG_PARAVIRT_XXL */ |
6abcd98f GOC |
138 | |
139 | #ifndef __ASSEMBLY__ | |
7a745be1 | 140 | static __always_inline int arch_irqs_disabled_flags(unsigned long flags) |
6abcd98f GOC |
141 | { |
142 | return !(flags & X86_EFLAGS_IF); | |
143 | } | |
144 | ||
7a745be1 | 145 | static __always_inline int arch_irqs_disabled(void) |
6abcd98f | 146 | { |
df9ee292 | 147 | unsigned long flags = arch_local_save_flags(); |
6abcd98f | 148 | |
df9ee292 | 149 | return arch_irqs_disabled_flags(flags); |
6abcd98f | 150 | } |
ab234a26 JG |
151 | |
152 | static __always_inline void arch_local_irq_restore(unsigned long flags) | |
153 | { | |
154 | if (!arch_irqs_disabled_flags(flags)) | |
155 | arch_local_irq_enable(); | |
156 | } | |
40e2ec65 | 157 | #endif /* !__ASSEMBLY__ */ |
6abcd98f | 158 | |
96a388de | 159 | #endif |