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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
6abcd98f GOC |
2 | #ifndef _X86_IRQFLAGS_H_ |
3 | #define _X86_IRQFLAGS_H_ | |
4 | ||
5 | #include <asm/processor-flags.h> | |
6 | ||
7 | #ifndef __ASSEMBLY__ | |
6727ad9e | 8 | |
07f07f55 TG |
9 | #include <asm/nospec-branch.h> |
10 | ||
6727ad9e | 11 | /* Provide __cpuidle; we can't safely include <linux/cpu.h> */ |
33def849 | 12 | #define __cpuidle __section(".cpuidle.text") |
6727ad9e | 13 | |
6abcd98f GOC |
14 | /* |
15 | * Interrupt control: | |
16 | */ | |
17 | ||
208cbb32 ND |
18 | /* Declaration required for gcc < 4.9 to prevent -Werror=missing-prototypes */ |
19 | extern inline unsigned long native_save_fl(void); | |
7a745be1 | 20 | extern __always_inline unsigned long native_save_fl(void) |
6abcd98f GOC |
21 | { |
22 | unsigned long flags; | |
23 | ||
f1f029c7 | 24 | /* |
ab94fcf5 PA |
25 | * "=rm" is safe here, because "pop" adjusts the stack before |
26 | * it evaluates its effective address -- this is part of the | |
27 | * documented behavior of the "pop" instruction. | |
f1f029c7 | 28 | */ |
cf7f7191 JP |
29 | asm volatile("# __raw_save_flags\n\t" |
30 | "pushf ; pop %0" | |
ab94fcf5 | 31 | : "=rm" (flags) |
cf7f7191 JP |
32 | : /* no input */ |
33 | : "memory"); | |
6abcd98f GOC |
34 | |
35 | return flags; | |
36 | } | |
37 | ||
7a745be1 | 38 | static __always_inline void native_irq_disable(void) |
6abcd98f GOC |
39 | { |
40 | asm volatile("cli": : :"memory"); | |
41 | } | |
42 | ||
7a745be1 | 43 | static __always_inline void native_irq_enable(void) |
6abcd98f GOC |
44 | { |
45 | asm volatile("sti": : :"memory"); | |
46 | } | |
47 | ||
6727ad9e | 48 | static inline __cpuidle void native_safe_halt(void) |
6abcd98f | 49 | { |
07f07f55 | 50 | mds_idle_clear_cpu_buffers(); |
6abcd98f GOC |
51 | asm volatile("sti; hlt": : :"memory"); |
52 | } | |
53 | ||
6727ad9e | 54 | static inline __cpuidle void native_halt(void) |
6abcd98f | 55 | { |
07f07f55 | 56 | mds_idle_clear_cpu_buffers(); |
6abcd98f GOC |
57 | asm volatile("hlt": : :"memory"); |
58 | } | |
59 | ||
60 | #endif | |
61 | ||
6da63eb2 | 62 | #ifdef CONFIG_PARAVIRT_XXL |
6abcd98f GOC |
63 | #include <asm/paravirt.h> |
64 | #else | |
65 | #ifndef __ASSEMBLY__ | |
e08fbb78 | 66 | #include <linux/types.h> |
6abcd98f | 67 | |
7a745be1 | 68 | static __always_inline unsigned long arch_local_save_flags(void) |
6abcd98f GOC |
69 | { |
70 | return native_save_fl(); | |
71 | } | |
72 | ||
7a745be1 | 73 | static __always_inline void arch_local_irq_disable(void) |
6abcd98f GOC |
74 | { |
75 | native_irq_disable(); | |
76 | } | |
77 | ||
7a745be1 | 78 | static __always_inline void arch_local_irq_enable(void) |
6abcd98f GOC |
79 | { |
80 | native_irq_enable(); | |
81 | } | |
82 | ||
83 | /* | |
84 | * Used in the idle loop; sti takes one instruction cycle | |
85 | * to complete: | |
86 | */ | |
6727ad9e | 87 | static inline __cpuidle void arch_safe_halt(void) |
6abcd98f GOC |
88 | { |
89 | native_safe_halt(); | |
90 | } | |
91 | ||
92 | /* | |
93 | * Used when interrupts are already enabled or to | |
94 | * shutdown the processor: | |
95 | */ | |
6727ad9e | 96 | static inline __cpuidle void halt(void) |
6abcd98f GOC |
97 | { |
98 | native_halt(); | |
99 | } | |
100 | ||
101 | /* | |
102 | * For spinlocks, etc: | |
103 | */ | |
7a745be1 | 104 | static __always_inline unsigned long arch_local_irq_save(void) |
6abcd98f | 105 | { |
df9ee292 DH |
106 | unsigned long flags = arch_local_save_flags(); |
107 | arch_local_irq_disable(); | |
6abcd98f GOC |
108 | return flags; |
109 | } | |
110 | #else | |
111 | ||
9bad5658 JG |
112 | #ifdef CONFIG_X86_64 |
113 | #ifdef CONFIG_DEBUG_ENTRY | |
fafe5e74 | 114 | #define SAVE_FLAGS pushfq; popq %rax |
9bad5658 | 115 | #endif |
9bad5658 | 116 | |
7209a75d | 117 | #define INTERRUPT_RETURN jmp native_iret |
2be29982 | 118 | |
6abcd98f GOC |
119 | #endif |
120 | ||
6abcd98f | 121 | #endif /* __ASSEMBLY__ */ |
9bad5658 | 122 | #endif /* CONFIG_PARAVIRT_XXL */ |
6abcd98f GOC |
123 | |
124 | #ifndef __ASSEMBLY__ | |
7a745be1 | 125 | static __always_inline int arch_irqs_disabled_flags(unsigned long flags) |
6abcd98f GOC |
126 | { |
127 | return !(flags & X86_EFLAGS_IF); | |
128 | } | |
129 | ||
7a745be1 | 130 | static __always_inline int arch_irqs_disabled(void) |
6abcd98f | 131 | { |
df9ee292 | 132 | unsigned long flags = arch_local_save_flags(); |
6abcd98f | 133 | |
df9ee292 | 134 | return arch_irqs_disabled_flags(flags); |
6abcd98f | 135 | } |
ab234a26 JG |
136 | |
137 | static __always_inline void arch_local_irq_restore(unsigned long flags) | |
138 | { | |
139 | if (!arch_irqs_disabled_flags(flags)) | |
140 | arch_local_irq_enable(); | |
141 | } | |
53c9d924 JG |
142 | #else |
143 | #ifdef CONFIG_X86_64 | |
144 | #ifdef CONFIG_XEN_PV | |
145 | #define SWAPGS ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV | |
146 | #else | |
147 | #define SWAPGS swapgs | |
148 | #endif | |
149 | #endif | |
40e2ec65 | 150 | #endif /* !__ASSEMBLY__ */ |
6abcd98f | 151 | |
96a388de | 152 | #endif |