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x86: Cleanup vector usage
[linux-2.6-block.git] / arch / x86 / include / asm / hw_irq.h
CommitLineData
1965aae3
PA		 1#ifndef _ASM_X86_HW_IRQ_H
2#define _ASM_X86_HW_IRQ_H
2e088436
TG		 3
4/*
5 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
6 *
7 * moved some of the old arch/i386/kernel/irq.h to here. VY
8 *
9 * IRQ/IPI changes taken from work by Thomas Radke
10 * <tomsoft@informatik.tu-chemnitz.de>
11 *
12 * hacked by Andi Kleen for x86-64.
13 * unified by tglx
14 */
15
9b7dc567 16#include <asm/irq_vectors.h>
2e088436
TG		 17
18#ifndef __ASSEMBLY__
19
20#include <linux/percpu.h>
21#include <linux/profile.h>
22#include <linux/smp.h>
23
24#include <asm/atomic.h>
25#include <asm/irq.h>
26#include <asm/sections.h>
27
2e088436
TG		 28/* Interrupt handlers registered during init_IRQ */
29extern void apic_timer_interrupt(void);
4a4de9c7 30extern void x86_platform_ipi(void);
2e088436 31extern void error_interrupt(void);
e360adbe 32extern void irq_work_interrupt(void);
241771ef 33
2e088436
TG		 34extern void spurious_interrupt(void);
35extern void thermal_interrupt(void);
36extern void reschedule_interrupt(void);
ccc3c319 37extern void mce_self_interrupt(void);
2e088436
TG		 38
39extern void invalidate_interrupt(void);
40extern void invalidate_interrupt0(void);
41extern void invalidate_interrupt1(void);
42extern void invalidate_interrupt2(void);
43extern void invalidate_interrupt3(void);
44extern void invalidate_interrupt4(void);
45extern void invalidate_interrupt5(void);
46extern void invalidate_interrupt6(void);
47extern void invalidate_interrupt7(void);
48
49extern void irq_move_cleanup_interrupt(void);
4ef702c1 50extern void reboot_interrupt(void);
2e088436
TG		 51extern void threshold_interrupt(void);
52
53extern void call_function_interrupt(void);
1a781a77 54extern void call_function_single_interrupt(void);
2e088436 55
2e088436 56/* IOAPIC */
abcaa2b8 57#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))
2e088436
TG		 58extern unsigned long io_apic_irqs;
59
60extern void init_VISWS_APIC_irqs(void);
61extern void setup_IO_APIC(void);
62extern void disable_IO_APIC(void);
e5198075
YL		 63
64struct io_apic_irq_attr {
65 int ioapic;
66 int ioapic_pin;
67 int trigger;
68 int polarity;
69};
70
71static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr,
72 int ioapic, int ioapic_pin,
73 int trigger, int polarity)
74{
9338ad6f
DS		 75 irq_attr->ioapic = ioapic;
76 irq_attr->ioapic_pin = ioapic_pin;
77 irq_attr->trigger = trigger;
78 irq_attr->polarity = polarity;
e5198075
YL		 79}
80
423f0859
TG		 81struct irq_2_iommu {
82 struct intel_iommu *iommu;
83 u16 irte_index;
84 u16 sub_handle;
85 u8 irte_mask;
86};
87
9338ad6f
DS		 88/*
89 * This is performance-critical, we want to do it O(1)
90 *
91 * Most irqs are mapped 1:1 with pins.
92 */
93struct irq_cfg {
94 struct irq_pin_list *irq_2_pin;
95 cpumask_var_t domain;
96 cpumask_var_t old_domain;
9338ad6f
DS		 97 u8 vector;
98 u8 move_in_progress : 1;
423f0859
TG		 99#ifdef CONFIG_INTR_REMAP
100 struct irq_2_iommu irq_2_iommu;
101#endif
9338ad6f
DS		 102};
103
9338ad6f
DS		 104extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);
105extern void send_cleanup_vector(struct irq_cfg *);
7ec13187 106
f7e909ea
TG		 107struct irq_data;
108int __ioapic_set_affinity(struct irq_data *, const struct cpumask *,
109 unsigned int *dest_id);
9338ad6f 110extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin, struct io_apic_irq_attr *irq_attr);
2e088436
TG		 111extern void setup_ioapic_dest(void);
112
97e7b6f5 113extern void enable_IO_APIC(void);
97e7b6f5 114
2e088436
TG		 115/* Statistics */
116extern atomic_t irq_err_count;
117extern atomic_t irq_mis_count;
118
1a331957
TG		 119/* EISA */
120extern void eisa_set_level_irq(unsigned int irq);
121
2b97df06
JS		 122/* SMP */
123extern void smp_apic_timer_interrupt(struct pt_regs *);
2b97df06 124extern void smp_spurious_interrupt(struct pt_regs *);
4a4de9c7 125extern void smp_x86_platform_ipi(struct pt_regs *);
2b97df06 126extern void smp_error_interrupt(struct pt_regs *);
2c1b284e
JSR		 127#ifdef CONFIG_X86_IO_APIC
128extern asmlinkage void smp_irq_move_cleanup_interrupt(void);
129#endif
3e5095d1 130#ifdef CONFIG_SMP
e7f08dfd
JS		 131extern void smp_reschedule_interrupt(struct pt_regs *);
132extern void smp_call_function_interrupt(struct pt_regs *);
133extern void smp_call_function_single_interrupt(struct pt_regs *);
b2139aa0
JS		 134#ifdef CONFIG_X86_32
135extern void smp_invalidate_interrupt(struct pt_regs *);
136#else
137extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *);
138#endif
e7f08dfd 139#endif
2b97df06 140
4687518c 141extern void (*__initconst interrupt[NR_VECTORS-FIRST_EXTERNAL_VECTOR])(void);
497c9a19 142
22dc12d1
TG		 143typedef int vector_irq_t[NR_VECTORS];
144DECLARE_PER_CPU(vector_irq_t, vector_irq);
36e9e1ea 145extern void setup_vector_irq(int cpu);
d388e5fd 146
497c9a19 147#ifdef CONFIG_X86_IO_APIC
d388e5fd
EB		 148extern void lock_vector_lock(void);
149extern void unlock_vector_lock(void);
150extern void __setup_vector_irq(int cpu);
151#else
152static inline void lock_vector_lock(void) {}
153static inline void unlock_vector_lock(void) {}
154static inline void __setup_vector_irq(int cpu) {}
155#endif
2e088436 156
22dc12d1
TG		 157#endif /* !ASSEMBLY_ */
158
1965aae3 159#endif /* _ASM_X86_HW_IRQ_H */
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