[linux-block.git] / arch / x86 / include / asm / hw_irq.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_HW_IRQ_H
#define _ASM_X86_HW_IRQ_H

/*
 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
 *
 * moved some of the old arch/i386/kernel/irq.h to here. VY
 *
 * IRQ/IPI changes taken from work by Thomas Radke
 * <tomsoft@informatik.tu-chemnitz.de>
 *
 * hacked by Andi Kleen for x86-64.
 * unified by tglx
 */

#include <asm/irq_vectors.h>

#ifndef __ASSEMBLY__

#include <linux/percpu.h>
#include <linux/profile.h>
#include <linux/smp.h>

#include <linux/atomic.h>
#include <asm/irq.h>
#include <asm/sections.h>

#ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
struct irq_data;
struct pci_dev;
struct msi_desc;

enum irq_alloc_type {
	X86_IRQ_ALLOC_TYPE_IOAPIC = 1,
	X86_IRQ_ALLOC_TYPE_HPET,
	X86_IRQ_ALLOC_TYPE_PCI_MSI,
	X86_IRQ_ALLOC_TYPE_PCI_MSIX,
	X86_IRQ_ALLOC_TYPE_DMAR,
	X86_IRQ_ALLOC_TYPE_AMDVI,
	X86_IRQ_ALLOC_TYPE_UV,
};

struct ioapic_alloc_info {
	int		pin;
	int		node;
	u32		is_level	: 1;
	u32		active_low	: 1;
	u32		valid		: 1;
};

struct uv_alloc_info {
	int		limit;
	int		blade;
	unsigned long	offset;
	char		*name;

};

/**
 * irq_alloc_info - X86 specific interrupt allocation info
 * @type:	X86 specific allocation type
 * @flags:	Flags for allocation tweaks
 * @devid:	Device ID for allocations
 * @hwirq:	Associated hw interrupt number in the domain
 * @mask:	CPU mask for vector allocation
 * @desc:	Pointer to msi descriptor
 * @data:	Allocation specific data
 *
 * @ioapic:	IOAPIC specific allocation data
 * @uv:		UV specific allocation data
*/
struct irq_alloc_info {
	enum irq_alloc_type	type;
	u32			flags;
	u32			devid;
	irq_hw_number_t		hwirq;
	const struct cpumask	*mask;
	struct msi_desc		*desc;
	void			*data;

	union {
		struct ioapic_alloc_info	ioapic;
		struct uv_alloc_info		uv;
	};
};

struct irq_cfg {
	unsigned int		dest_apicid;
	unsigned int		vector;
};

extern struct irq_cfg *irq_cfg(unsigned int irq);
extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
extern void lock_vector_lock(void);
extern void unlock_vector_lock(void);
#ifdef CONFIG_SMP
extern void vector_schedule_cleanup(struct irq_cfg *);
extern void irq_complete_move(struct irq_cfg *cfg);
#else
static inline void vector_schedule_cleanup(struct irq_cfg *c) { }
static inline void irq_complete_move(struct irq_cfg *c) { }
#endif

extern void apic_ack_edge(struct irq_data *data);
#else	/*  CONFIG_IRQ_DOMAIN_HIERARCHY */
static inline void lock_vector_lock(void) {}
static inline void unlock_vector_lock(void) {}
#endif	/* CONFIG_IRQ_DOMAIN_HIERARCHY */

/* Statistics */
extern atomic_t irq_err_count;
extern atomic_t irq_mis_count;

extern void elcr_set_level_irq(unsigned int irq);

extern char irq_entries_start[];
#ifdef CONFIG_TRACING
#define trace_irq_entries_start irq_entries_start
#endif

extern char spurious_entries_start[];

#define VECTOR_UNUSED		NULL
#define VECTOR_SHUTDOWN		((void *)-1L)
#define VECTOR_RETRIGGERED	((void *)-2L)

typedef struct irq_desc* vector_irq_t[NR_VECTORS];
DECLARE_PER_CPU(vector_irq_t, vector_irq);

#endif /* !ASSEMBLY_ */

#endif /* _ASM_X86_HW_IRQ_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1965aae3 PA	2	#ifndef _ASM_X86_HW_IRQ_H
1965aae3 PA	3	#define _ASM_X86_HW_IRQ_H
2e088436 TG	4
	5	/*
	6	* (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
	7	*
	8	* moved some of the old arch/i386/kernel/irq.h to here. VY
	9	*
	10	* IRQ/IPI changes taken from work by Thomas Radke
	11	* <tomsoft@informatik.tu-chemnitz.de>
	12	*
	13	* hacked by Andi Kleen for x86-64.
	14	* unified by tglx
	15	*/
	16
9b7dc567	17	#include <asm/irq_vectors.h>
2e088436 TG	18
	19	#ifndef __ASSEMBLY__
	20
	21	#include <linux/percpu.h>
	22	#include <linux/profile.h>
	23	#include <linux/smp.h>
	24
60063497	25	#include <linux/atomic.h>
2e088436 TG	26	#include <asm/irq.h>
	27	#include <asm/sections.h>
	28
441ccc35	29	#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
74afab7a	30	struct irq_data;
947045a2 JL	31	struct pci_dev;
	32	struct msi_desc;
	33
	34	enum irq_alloc_type {
	35	X86_IRQ_ALLOC_TYPE_IOAPIC = 1,
	36	X86_IRQ_ALLOC_TYPE_HPET,
801b5e4c TG	37	X86_IRQ_ALLOC_TYPE_PCI_MSI,
801b5e4c TG	38	X86_IRQ_ALLOC_TYPE_PCI_MSIX,
0921f1da	39	X86_IRQ_ALLOC_TYPE_DMAR,
d1adcfbb	40	X86_IRQ_ALLOC_TYPE_AMDVI,
43fe1abc	41	X86_IRQ_ALLOC_TYPE_UV,
947045a2	42	};
b5dc8e6c	43
33a65ba4	44	struct ioapic_alloc_info {
5d5a9713 DW	45	int pin;
	46	int node;
	47	u32 is_level : 1;
	48	u32 active_low : 1;
	49	u32 valid : 1;
33a65ba4 TG	50	};
33a65ba4 TG	51
0f5cbdaf TG	52	struct uv_alloc_info {
	53	int limit;
	54	int blade;
	55	unsigned long offset;
	56	char *name;
	57
	58	};
	59
874d9b3a TG	60	/**
	61	* irq_alloc_info - X86 specific interrupt allocation info
	62	* @type: X86 specific allocation type
	63	* @flags: Flags for allocation tweaks
	64	* @devid: Device ID for allocations
	65	* @hwirq: Associated hw interrupt number in the domain
	66	* @mask: CPU mask for vector allocation
	67	* @desc: Pointer to msi descriptor
	68	* @data: Allocation specific data
33a65ba4 TG	69	*
33a65ba4 TG	70	* @ioapic: IOAPIC specific allocation data
0f5cbdaf TG	71	* @uv: UV specific allocation data
0f5cbdaf TG	72	*/
b5dc8e6c	73	struct irq_alloc_info {
947045a2	74	enum irq_alloc_type type;
b5dc8e6c	75	u32 flags;
874d9b3a TG	76	u32 devid;
	77	irq_hw_number_t hwirq;
	78	const struct cpumask *mask;
	79	struct msi_desc *desc;
	80	void *data;
	81
947045a2	82	union {
33a65ba4	83	struct ioapic_alloc_info ioapic;
0f5cbdaf	84	struct uv_alloc_info uv;
947045a2	85	};
b5dc8e6c JL	86	};
b5dc8e6c JL	87
9338ad6f	88	struct irq_cfg {
5f0052f9	89	unsigned int dest_apicid;
ba224fea	90	unsigned int vector;
9338ad6f DS	91	};
9338ad6f DS	92
55a0e2b1 JL	93	extern struct irq_cfg *irq_cfg(unsigned int irq);
55a0e2b1 JL	94	extern struct irq_cfg irqd_cfg(struct irq_data irq_data);
74afab7a JL	95	extern void lock_vector_lock(void);
74afab7a JL	96	extern void unlock_vector_lock(void);
e32c67e0	97	#ifdef CONFIG_SMP
a539cc86	98	extern void vector_schedule_cleanup(struct irq_cfg *);
f0e5bf75	99	extern void irq_complete_move(struct irq_cfg *cfg);
e32c67e0	100	#else
a539cc86	101	static inline void vector_schedule_cleanup(struct irq_cfg *c) { }
f0e5bf75	102	static inline void irq_complete_move(struct irq_cfg *c) { }
e32c67e0	103	#endif
7ec13187	104
74afab7a	105	extern void apic_ack_edge(struct irq_data *data);
441ccc35	106	#else /* CONFIG_IRQ_DOMAIN_HIERARCHY */
26011eee JL	107	static inline void lock_vector_lock(void) {}
26011eee JL	108	static inline void unlock_vector_lock(void) {}
441ccc35	109	#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
26011eee	110
2e088436 TG	111	/* Statistics */
	112	extern atomic_t irq_err_count;
	113	extern atomic_t irq_mis_count;
	114
ea6cd250	115	extern void elcr_set_level_irq(unsigned int irq);
1a331957	116
3304c9c3	117	extern char irq_entries_start[];
25c74b10	118	#ifdef CONFIG_TRACING
3304c9c3	119	#define trace_irq_entries_start irq_entries_start
25c74b10	120	#endif
497c9a19	121
f8a8fe61 TG	122	extern char spurious_entries_start[];
f8a8fe61 TG	123
a782a7e4	124	#define VECTOR_UNUSED NULL
e30c44e2 HK	125	#define VECTOR_SHUTDOWN ((void *)-1L)
e30c44e2 HK	126	#define VECTOR_RETRIGGERED ((void *)-2L)
9345005f	127
a782a7e4	128	typedef struct irq_desc* vector_irq_t[NR_VECTORS];
22dc12d1	129	DECLARE_PER_CPU(vector_irq_t, vector_irq);
2e088436	130
22dc12d1 TG	131	#endif /* !ASSEMBLY_ */
22dc12d1 TG	132
1965aae3	133	#endif /* _ASM_X86_HW_IRQ_H */