Merge tag 'mm-hotfixes-stable-2025-07-11-16-16' of git://git.kernel.org/pub/scm/linux...
[linux-2.6-block.git] / arch / x86 / include / asm / cpufeature.h
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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2#ifndef _ASM_X86_CPUFEATURE_H
3#define _ASM_X86_CPUFEATURE_H
7b11fb51 4
d5a581d8 5#include <asm/processor.h>
c3462ba9 6
24a295e4 7#if defined(__KERNEL__) && !defined(__ASSEMBLER__)
c3462ba9 8
a3c8acd0 9#include <asm/asm.h>
fa1408e4 10#include <linux/bitops.h>
2fe2a2c7 11#include <asm/alternative.h>
84132633 12#include <asm/cpufeaturemasks.h>
fa1408e4 13
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14enum cpuid_leafs
15{
16 CPUID_1_EDX = 0,
17 CPUID_8000_0001_EDX,
18 CPUID_8086_0001_EDX,
19 CPUID_LNX_1,
20 CPUID_1_ECX,
21 CPUID_C000_0001_EDX,
22 CPUID_8000_0001_ECX,
23 CPUID_LNX_2,
24 CPUID_LNX_3,
25 CPUID_7_0_EBX,
26 CPUID_D_1_EAX,
acec0ce0 27 CPUID_LNX_4,
b302e4b1 28 CPUID_7_1_EAX,
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29 CPUID_8000_0008_EBX,
30 CPUID_6_EAX,
31 CPUID_8000_000A_EDX,
dfb4a70f 32 CPUID_7_ECX,
71faad43 33 CPUID_8000_0007_EBX,
95ca0ee8 34 CPUID_7_EDX,
fb35d30f 35 CPUID_8000_001F_EAX,
8415a748 36 CPUID_8000_0021_EAX,
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37 CPUID_LNX_5,
38 NR_CPUID_WORDS,
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39};
40
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41extern const char * const x86_cap_flags[NCAPINTS*32];
42extern const char * const x86_power_flags[32];
43
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44/*
45 * In order to save room, we index into this array by doing
46 * X86_BUG_<name> - NCAPINTS*32.
47 */
48extern const char * const x86_bug_flags[NBUGINTS*32];
ab68d2e3 49#define x86_bug_flag(flag) x86_bug_flags[flag]
80a208bd 50
0f8d2b92 51#define test_cpu_cap(c, bit) \
a6a5eb26 52 arch_test_bit(bit, (unsigned long *)((c)->x86_capability))
0f8d2b92 53
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54#define cpu_has(c, bit) \
55 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
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56 test_cpu_cap(c, bit))
57
349c004e 58#define this_cpu_has(bit) \
f6027c81 59 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
a3f8a3a2 60 x86_this_cpu_test_bit(bit, cpu_info.x86_capability))
349c004e 61
381aa07a 62/*
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63 * This is the default CPU features testing macro to use in code.
64 *
65 * It is for detection of features which need kernel infrastructure to be
66 * used. It may *not* directly test the CPU itself. Use the cpu_has() family
67 * if you want true runtime testing of CPU features, like in hypervisor code
68 * where you are supporting a possible guest feature where host support for it
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69 * is not relevant.
70 */
71#define cpu_feature_enabled(bit) \
f2cc8e07 72 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
381aa07a 73
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74#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
75
53756d37 76#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
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77
78extern void setup_clear_cpu_cap(unsigned int bit);
79extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
07e4a6ee 80void check_cpufeature_deps(struct cpuinfo_x86 *c);
0b00de85 81
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82#define setup_force_cpu_cap(bit) do { \
83 \
84 if (!boot_cpu_has(bit)) \
85 WARN_ON(alternatives_patched); \
86 \
87 set_cpu_cap(&boot_cpu_data, bit); \
3e0c3737 88 set_bit(bit, (unsigned long *)cpu_caps_set); \
404ee5b1 89} while (0)
53756d37 90
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91#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
92
a3c8acd0 93/*
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94 * Do not use an "m" constraint for [cap_byte] here: gcc doesn't know
95 * that this is only used on a fallback path and will sometimes cause
96 * it to manifest the address of boot_cpu_data in a register, fouling
97 * the mainline (post-initialization) code.
a3c8acd0 98 */
ae37a8cd 99static __always_inline bool _static_cpu_has(u16 bit)
4a90a99c 100{
a0c8cf97 101 asm goto(ALTERNATIVE_TERNARY("jmp 6f", %c[feature], "", "jmp %l[t_no]")
05075036 102 ".pushsection .altinstr_aux,\"ax\"\n"
2fe2a2c7 103 "6:\n"
d689863c 104 " testb %[bitnum], %a[cap_byte]\n"
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105 " jnz %l[t_yes]\n"
106 " jmp %l[t_no]\n"
05075036 107 ".popsection\n"
3197b04b 108 : : [feature] "i" (bit),
3197b04b 109 [bitnum] "i" (1 << (bit & 7)),
05075036 110 [cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3])
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111 : : t_yes, t_no);
112t_yes:
113 return true;
114t_no:
115 return false;
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116}
117
bc696ca0 118#define static_cpu_has(bit) \
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119( \
120 __builtin_constant_p(boot_cpu_has(bit)) ? \
121 boot_cpu_has(bit) : \
bc696ca0 122 _static_cpu_has(bit) \
4a90a99c 123)
a3c8acd0 124
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125#define cpu_has_bug(c, bit) cpu_has(c, (bit))
126#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
127#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
65fc985b 128
9b13a93d 129#define static_cpu_has_bug(bit) static_cpu_has((bit))
9b13a93d 130#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
a588b983 131#define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
65fc985b 132
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133#define MAX_CPU_FEATURES (NCAPINTS * 32)
134#define cpu_have_feature boot_cpu_has
2b9c1f03 135
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136#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
137#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
138 boot_cpu_data.x86_model
2b9c1f03 139
24a295e4 140#endif /* defined(__KERNEL__) && !defined(__ASSEMBLER__) */
1965aae3 141#endif /* _ASM_X86_CPUFEATURE_H */