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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1965aae3 PA |
2 | #ifndef _ASM_X86_CPUFEATURE_H |
3 | #define _ASM_X86_CPUFEATURE_H | |
7b11fb51 | 4 | |
d5a581d8 | 5 | #include <asm/processor.h> |
c3462ba9 IM |
6 | |
7 | #if defined(__KERNEL__) && !defined(__ASSEMBLY__) | |
8 | ||
a3c8acd0 | 9 | #include <asm/asm.h> |
fa1408e4 | 10 | #include <linux/bitops.h> |
2fe2a2c7 | 11 | #include <asm/alternative.h> |
fa1408e4 | 12 | |
39c06df4 BP |
13 | enum cpuid_leafs |
14 | { | |
15 | CPUID_1_EDX = 0, | |
16 | CPUID_8000_0001_EDX, | |
17 | CPUID_8086_0001_EDX, | |
18 | CPUID_LNX_1, | |
19 | CPUID_1_ECX, | |
20 | CPUID_C000_0001_EDX, | |
21 | CPUID_8000_0001_ECX, | |
22 | CPUID_LNX_2, | |
23 | CPUID_LNX_3, | |
24 | CPUID_7_0_EBX, | |
25 | CPUID_D_1_EAX, | |
acec0ce0 | 26 | CPUID_LNX_4, |
b302e4b1 | 27 | CPUID_7_1_EAX, |
39c06df4 BP |
28 | CPUID_8000_0008_EBX, |
29 | CPUID_6_EAX, | |
30 | CPUID_8000_000A_EDX, | |
dfb4a70f | 31 | CPUID_7_ECX, |
71faad43 | 32 | CPUID_8000_0007_EBX, |
95ca0ee8 | 33 | CPUID_7_EDX, |
fb35d30f | 34 | CPUID_8000_001F_EAX, |
8415a748 | 35 | CPUID_8000_0021_EAX, |
39c06df4 BP |
36 | }; |
37 | ||
1625c833 BP |
38 | #define X86_CAP_FMT_NUM "%d:%d" |
39 | #define x86_cap_flag_num(flag) ((flag) >> 5), ((flag) & 31) | |
40 | ||
9def39be | 41 | #ifdef CONFIG_X86_FEATURE_NAMES |
fa1408e4 PA |
42 | extern const char * const x86_cap_flags[NCAPINTS*32]; |
43 | extern const char * const x86_power_flags[32]; | |
9def39be JT |
44 | #define X86_CAP_FMT "%s" |
45 | #define x86_cap_flag(flag) x86_cap_flags[flag] | |
46 | #else | |
1625c833 BP |
47 | #define X86_CAP_FMT X86_CAP_FMT_NUM |
48 | #define x86_cap_flag x86_cap_flag_num | |
9def39be | 49 | #endif |
fa1408e4 | 50 | |
80a208bd BP |
51 | /* |
52 | * In order to save room, we index into this array by doing | |
53 | * X86_BUG_<name> - NCAPINTS*32. | |
54 | */ | |
55 | extern const char * const x86_bug_flags[NBUGINTS*32]; | |
56 | ||
0f8d2b92 | 57 | #define test_cpu_cap(c, bit) \ |
a6a5eb26 | 58 | arch_test_bit(bit, (unsigned long *)((c)->x86_capability)) |
0f8d2b92 | 59 | |
8eda072e DH |
60 | /* |
61 | * There are 32 bits/features in each mask word. The high bits | |
62 | * (selected with (bit>>5) give us the word number and the low 5 | |
63 | * bits give us the bit/feature number inside the word. | |
64 | * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can | |
65 | * see if it is set in the mask word. | |
66 | */ | |
67 | #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \ | |
68 | (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word )) | |
69 | ||
cbb1133b CJ |
70 | /* |
71 | * {REQUIRED,DISABLED}_MASK_CHECK below may seem duplicated with the | |
72 | * following BUILD_BUG_ON_ZERO() check but when NCAPINTS gets changed, all | |
73 | * header macros which use NCAPINTS need to be changed. The duplicated macro | |
74 | * use causes the compiler to issue errors for all headers so that all usage | |
75 | * sites can be corrected. | |
76 | */ | |
8eda072e DH |
77 | #define REQUIRED_MASK_BIT_SET(feature_bit) \ |
78 | ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \ | |
79 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \ | |
80 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \ | |
81 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \ | |
82 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \ | |
83 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \ | |
84 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \ | |
85 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \ | |
86 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \ | |
87 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \ | |
88 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \ | |
89 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \ | |
90 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \ | |
91 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \ | |
92 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \ | |
93 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \ | |
94 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \ | |
95 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \ | |
95ca0ee8 | 96 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \ |
fb35d30f | 97 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \ |
8415a748 | 98 | CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \ |
8eda072e | 99 | REQUIRED_MASK_CHECK || \ |
8415a748 | 100 | BUILD_BUG_ON_ZERO(NCAPINTS != 21)) |
349c004e | 101 | |
8eda072e DH |
102 | #define DISABLED_MASK_BIT_SET(feature_bit) \ |
103 | ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \ | |
104 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \ | |
105 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \ | |
106 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \ | |
107 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \ | |
108 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \ | |
109 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \ | |
110 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \ | |
111 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \ | |
112 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \ | |
113 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \ | |
114 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \ | |
115 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \ | |
116 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \ | |
117 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \ | |
118 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \ | |
119 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \ | |
120 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \ | |
95ca0ee8 | 121 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \ |
fb35d30f | 122 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \ |
8415a748 | 123 | CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \ |
8eda072e | 124 | DISABLED_MASK_CHECK || \ |
8415a748 | 125 | BUILD_BUG_ON_ZERO(NCAPINTS != 21)) |
381aa07a | 126 | |
349c004e CL |
127 | #define cpu_has(c, bit) \ |
128 | (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ | |
0f8d2b92 IM |
129 | test_cpu_cap(c, bit)) |
130 | ||
349c004e | 131 | #define this_cpu_has(bit) \ |
f6027c81 JH |
132 | (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ |
133 | x86_this_cpu_test_bit(bit, \ | |
134 | (unsigned long __percpu *)&cpu_info.x86_capability)) | |
349c004e | 135 | |
381aa07a DH |
136 | /* |
137 | * This macro is for detection of features which need kernel | |
138 | * infrastructure to be used. It may *not* directly test the CPU | |
139 | * itself. Use the cpu_has() family if you want true runtime | |
140 | * testing of CPU features, like in hypervisor code where you are | |
141 | * supporting a possible guest feature where host support for it | |
142 | * is not relevant. | |
143 | */ | |
144 | #define cpu_feature_enabled(bit) \ | |
f2cc8e07 | 145 | (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) |
381aa07a | 146 | |
7b11fb51 PA |
147 | #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) |
148 | ||
53756d37 | 149 | #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability)) |
0b00de85 AK |
150 | |
151 | extern void setup_clear_cpu_cap(unsigned int bit); | |
152 | extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit); | |
153 | ||
404ee5b1 AK |
154 | #define setup_force_cpu_cap(bit) do { \ |
155 | set_cpu_cap(&boot_cpu_data, bit); \ | |
3e0c3737 | 156 | set_bit(bit, (unsigned long *)cpu_caps_set); \ |
404ee5b1 | 157 | } while (0) |
53756d37 | 158 | |
6cbd2171 TG |
159 | #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit) |
160 | ||
a3c8acd0 | 161 | /* |
bfdd5a67 BP |
162 | * Static testing of CPU features. Used the same as boot_cpu_has(). It |
163 | * statically patches the target code for additional performance. Use | |
164 | * static_cpu_has() only in fast paths, where every cycle counts. Which | |
165 | * means that the boot_cpu_has() variant is already fast enough for the | |
166 | * majority of cases and you should stick to using it as it is generally | |
167 | * only two instructions: a RIP-relative MOV and a TEST. | |
05075036 PA |
168 | * |
169 | * Do not use an "m" constraint for [cap_byte] here: gcc doesn't know | |
170 | * that this is only used on a fallback path and will sometimes cause | |
171 | * it to manifest the address of boot_cpu_data in a register, fouling | |
172 | * the mainline (post-initialization) code. | |
a3c8acd0 | 173 | */ |
ae37a8cd | 174 | static __always_inline bool _static_cpu_has(u16 bit) |
4a90a99c | 175 | { |
2fe2a2c7 JG |
176 | asm_volatile_goto( |
177 | ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]") | |
05075036 | 178 | ".pushsection .altinstr_aux,\"ax\"\n" |
2fe2a2c7 | 179 | "6:\n" |
05075036 | 180 | " testb %[bitnum]," _ASM_RIP(%P[cap_byte]) "\n" |
2fe2a2c7 JG |
181 | " jnz %l[t_yes]\n" |
182 | " jmp %l[t_no]\n" | |
05075036 | 183 | ".popsection\n" |
3197b04b | 184 | : : [feature] "i" (bit), |
3197b04b | 185 | [bitnum] "i" (1 << (bit & 7)), |
05075036 | 186 | [cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3]) |
5355ccbe PZ |
187 | : : t_yes, t_no); |
188 | t_yes: | |
189 | return true; | |
190 | t_no: | |
191 | return false; | |
4a90a99c BP |
192 | } |
193 | ||
bc696ca0 | 194 | #define static_cpu_has(bit) \ |
4a90a99c BP |
195 | ( \ |
196 | __builtin_constant_p(boot_cpu_has(bit)) ? \ | |
197 | boot_cpu_has(bit) : \ | |
bc696ca0 | 198 | _static_cpu_has(bit) \ |
4a90a99c | 199 | ) |
a3c8acd0 | 200 | |
9b13a93d BP |
201 | #define cpu_has_bug(c, bit) cpu_has(c, (bit)) |
202 | #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) | |
203 | #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) | |
65fc985b | 204 | |
9b13a93d | 205 | #define static_cpu_has_bug(bit) static_cpu_has((bit)) |
9b13a93d | 206 | #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) |
a588b983 | 207 | #define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit)) |
65fc985b | 208 | |
9b13a93d BP |
209 | #define MAX_CPU_FEATURES (NCAPINTS * 32) |
210 | #define cpu_have_feature boot_cpu_has | |
2b9c1f03 | 211 | |
9b13a93d BP |
212 | #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X" |
213 | #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \ | |
214 | boot_cpu_data.x86_model | |
2b9c1f03 | 215 | |
c3462ba9 | 216 | #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ |
1965aae3 | 217 | #endif /* _ASM_X86_CPUFEATURE_H */ |