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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1965aae3 PA |
2 | #ifndef _ASM_X86_BOOT_H |
3 | #define _ASM_X86_BOOT_H | |
1da177e4 | 4 | |
95c4bff0 | 5 | |
658dbfeb | 6 | #include <asm/pgtable_types.h> |
af170c50 | 7 | #include <uapi/asm/boot.h> |
37ba7ab5 | 8 | |
beb7dd86 | 9 | /* Physical address where kernel should be loaded. */ |
dd0ec16f VG |
10 | #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ |
11 | + (CONFIG_PHYSICAL_ALIGN - 1)) \ | |
e69f202d VG |
12 | & ~(CONFIG_PHYSICAL_ALIGN - 1)) |
13 | ||
37ba7ab5 | 14 | /* Minimum kernel alignment, as a power of two */ |
22f4319d | 15 | #ifdef CONFIG_X86_64 |
8665e6ff | 16 | # define MIN_KERNEL_ALIGN_LG2 PMD_SHIFT |
37ba7ab5 | 17 | #else |
8665e6ff | 18 | # define MIN_KERNEL_ALIGN_LG2 (PAGE_SHIFT + THREAD_SIZE_ORDER) |
37ba7ab5 PA |
19 | #endif |
20 | #define MIN_KERNEL_ALIGN (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2) | |
21 | ||
22 | #if (CONFIG_PHYSICAL_ALIGN & (CONFIG_PHYSICAL_ALIGN-1)) || \ | |
6fc108a0 | 23 | (CONFIG_PHYSICAL_ALIGN < MIN_KERNEL_ALIGN) |
8665e6ff | 24 | # error "Invalid value for CONFIG_PHYSICAL_ALIGN" |
37ba7ab5 PA |
25 | #endif |
26 | ||
fb46d057 | 27 | #if defined(CONFIG_KERNEL_BZIP2) |
8665e6ff | 28 | # define BOOT_HEAP_SIZE 0x400000 |
fb46d057 NT |
29 | #elif defined(CONFIG_KERNEL_ZSTD) |
30 | /* | |
31 | * Zstd needs to allocate the ZSTD_DCtx in order to decompress the kernel. | |
32 | * The ZSTD_DCtx is ~160KB, so set the heap size to 192KB because it is a | |
33 | * round number and to allow some slack. | |
34 | */ | |
35 | # define BOOT_HEAP_SIZE 0x30000 | |
36 | #else | |
8665e6ff KC |
37 | # define BOOT_HEAP_SIZE 0x10000 |
38 | #endif | |
ae03c499 AK |
39 | |
40 | #ifdef CONFIG_X86_64 | |
8665e6ff | 41 | # define BOOT_STACK_SIZE 0x4000 |
3a94707d | 42 | |
f530ee95 KS |
43 | /* |
44 | * Used by decompressor's startup_32() to allocate page tables for identity | |
45 | * mapping of the 4G of RAM in 4-level paging mode: | |
46 | * - 1 level4 table; | |
47 | * - 1 level3 table; | |
48 | * - 4 level2 table that maps everything with 2M pages; | |
49 | * | |
50 | * The additional level5 table needed for 5-level paging is allocated from | |
51 | * trampoline_32bit memory. | |
52 | */ | |
3a94707d | 53 | # define BOOT_INIT_PGT_SIZE (6*4096) |
f530ee95 | 54 | |
3a94707d | 55 | /* |
f530ee95 KS |
56 | * Total number of page tables kernel_add_identity_map() can allocate, |
57 | * including page tables consumed by startup_32(). | |
58 | * | |
59 | * Worst-case scenario: | |
60 | * - 5-level paging needs 1 level5 table; | |
61 | * - KASLR needs to map kernel, boot_params, cmdline and randomized kernel, | |
62 | * assuming all of them cross 256T boundary: | |
63 | * + 4*2 level4 table; | |
64 | * + 4*2 level3 table; | |
65 | * + 4*2 level2 table; | |
66 | * - X86_VERBOSE_BOOTUP needs to map the first 2M (video RAM): | |
67 | * + 1 level4 table; | |
68 | * + 1 level3 table; | |
69 | * + 1 level2 table; | |
70 | * Total: 28 tables | |
71 | * | |
72 | * Add 4 spare table in case decompressor touches anything beyond what is | |
73 | * accounted above. Warn if it happens. | |
3a94707d | 74 | */ |
f530ee95 KS |
75 | # define BOOT_PGT_SIZE_WARN (28*4096) |
76 | # define BOOT_PGT_SIZE (32*4096) | |
3a94707d | 77 | |
8665e6ff KC |
78 | #else /* !CONFIG_X86_64 */ |
79 | # define BOOT_STACK_SIZE 0x1000 | |
7c539764 AH |
80 | #endif |
81 | ||
83381519 AB |
82 | #ifndef __ASSEMBLY__ |
83 | extern unsigned int output_len; | |
84 | extern const unsigned long kernel_total_size; | |
85 | ||
86 | unsigned long decompress_kernel(unsigned char *outbuf, unsigned long virt_addr, | |
87 | void (*error)(char *x)); | |
88 | #endif | |
89 | ||
1965aae3 | 90 | #endif /* _ASM_X86_BOOT_H */ |