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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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2 | #ifndef _ASM_X86_HWEIGHT_H |
3 | #define _ASM_X86_HWEIGHT_H | |
4 | ||
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5 | #include <asm/cpufeatures.h> |
6 | ||
d61931d8 | 7 | #ifdef CONFIG_64BIT |
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8 | #define REG_IN "D" |
9 | #define REG_OUT "a" | |
10 | #else | |
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11 | #define REG_IN "a" |
12 | #define REG_OUT "a" | |
13 | #endif | |
14 | ||
d14edb16 | 15 | static __always_inline unsigned int __arch_hweight32(unsigned int w) |
d61931d8 | 16 | { |
f5967101 | 17 | unsigned int res; |
d61931d8 | 18 | |
566b62a3 | 19 | asm (ALTERNATIVE("call __sw_hweight32", "popcntl %1, %0", X86_FEATURE_POPCNT) |
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20 | : "="REG_OUT (res) |
21 | : REG_IN (w)); | |
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22 | |
23 | return res; | |
24 | } | |
25 | ||
26 | static inline unsigned int __arch_hweight16(unsigned int w) | |
27 | { | |
28 | return __arch_hweight32(w & 0xffff); | |
29 | } | |
30 | ||
31 | static inline unsigned int __arch_hweight8(unsigned int w) | |
32 | { | |
33 | return __arch_hweight32(w & 0xff); | |
34 | } | |
35 | ||
d14edb16 | 36 | #ifdef CONFIG_X86_32 |
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37 | static inline unsigned long __arch_hweight64(__u64 w) |
38 | { | |
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39 | return __arch_hweight32((u32)w) + |
40 | __arch_hweight32((u32)(w >> 32)); | |
d14edb16 | 41 | } |
d61931d8 | 42 | #else |
d14edb16 DV |
43 | static __always_inline unsigned long __arch_hweight64(__u64 w) |
44 | { | |
f5967101 | 45 | unsigned long res; |
d14edb16 | 46 | |
566b62a3 | 47 | asm (ALTERNATIVE("call __sw_hweight64", "popcntq %1, %0", X86_FEATURE_POPCNT) |
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48 | : "="REG_OUT (res) |
49 | : REG_IN (w)); | |
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50 | |
51 | return res; | |
52 | } | |
d14edb16 | 53 | #endif /* CONFIG_X86_32 */ |
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54 | |
55 | #endif |