Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 | 2 | /* |
a49976d1 | 3 | * Copyright (C) 1991,1992 Linus Torvalds |
1da177e4 | 4 | * |
a49976d1 | 5 | * entry_32.S contains the system-call and low-level fault and trap handling routines. |
1da177e4 | 6 | * |
39e8701f | 7 | * Stack layout while running C code: |
a49976d1 IM |
8 | * ptrace needs to have all registers on the stack. |
9 | * If the order here is changed, it needs to be | |
10 | * updated in fork.c:copy_process(), signal.c:do_signal(), | |
1da177e4 LT |
11 | * ptrace.c and ptrace.h |
12 | * | |
13 | * 0(%esp) - %ebx | |
14 | * 4(%esp) - %ecx | |
15 | * 8(%esp) - %edx | |
9b47feb7 | 16 | * C(%esp) - %esi |
1da177e4 LT |
17 | * 10(%esp) - %edi |
18 | * 14(%esp) - %ebp | |
19 | * 18(%esp) - %eax | |
20 | * 1C(%esp) - %ds | |
21 | * 20(%esp) - %es | |
464d1a78 | 22 | * 24(%esp) - %fs |
ccbeed3a TH |
23 | * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS |
24 | * 2C(%esp) - orig_eax | |
25 | * 30(%esp) - %eip | |
26 | * 34(%esp) - %cs | |
27 | * 38(%esp) - %eflags | |
28 | * 3C(%esp) - %oldesp | |
29 | * 40(%esp) - %oldss | |
1da177e4 LT |
30 | */ |
31 | ||
1da177e4 | 32 | #include <linux/linkage.h> |
d7e7528b | 33 | #include <linux/err.h> |
1da177e4 | 34 | #include <asm/thread_info.h> |
55f327fa | 35 | #include <asm/irqflags.h> |
1da177e4 LT |
36 | #include <asm/errno.h> |
37 | #include <asm/segment.h> | |
38 | #include <asm/smp.h> | |
be44d2aa | 39 | #include <asm/percpu.h> |
ab68ed98 | 40 | #include <asm/processor-flags.h> |
9b7dc567 | 41 | #include <asm/irq_vectors.h> |
cd4d09ec | 42 | #include <asm/cpufeatures.h> |
b4ca46e4 | 43 | #include <asm/alternative-asm.h> |
6837a54d | 44 | #include <asm/asm.h> |
e59d1b0a | 45 | #include <asm/smap.h> |
4d516f41 | 46 | #include <asm/frame.h> |
2641f08b | 47 | #include <asm/nospec-branch.h> |
1da177e4 | 48 | |
afaef01c AP |
49 | #include "calling.h" |
50 | ||
ea714547 JO |
51 | .section .entry.text, "ax" |
52 | ||
139ec7c4 RR |
53 | /* |
54 | * We use macros for low-level operations which need to be overridden | |
55 | * for paravirtualization. The following will never clobber any registers: | |
56 | * INTERRUPT_RETURN (aka. "iret") | |
57 | * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax") | |
d75cd22f | 58 | * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit"). |
139ec7c4 RR |
59 | * |
60 | * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must | |
61 | * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY). | |
62 | * Allowing a register to be clobbered can shrink the paravirt replacement | |
63 | * enough to patch inline, increasing performance. | |
64 | */ | |
65 | ||
48593975 | 66 | #ifdef CONFIG_PREEMPTION |
a49976d1 | 67 | # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF |
1da177e4 | 68 | #else |
a49976d1 | 69 | # define preempt_stop(clobbers) |
1da177e4 LT |
70 | #endif |
71 | ||
55f327fa IM |
72 | .macro TRACE_IRQS_IRET |
73 | #ifdef CONFIG_TRACE_IRQFLAGS | |
a49976d1 IM |
74 | testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off? |
75 | jz 1f | |
55f327fa IM |
76 | TRACE_IRQS_ON |
77 | 1: | |
78 | #endif | |
79 | .endm | |
80 | ||
e464fb9f JR |
81 | #define PTI_SWITCH_MASK (1 << PAGE_SHIFT) |
82 | ||
ccbeed3a TH |
83 | /* |
84 | * User gs save/restore | |
85 | * | |
86 | * %gs is used for userland TLS and kernel only uses it for stack | |
87 | * canary which is required to be at %gs:20 by gcc. Read the comment | |
88 | * at the top of stackprotector.h for more info. | |
89 | * | |
90 | * Local labels 98 and 99 are used. | |
91 | */ | |
92 | #ifdef CONFIG_X86_32_LAZY_GS | |
93 | ||
94 | /* unfortunately push/pop can't be no-op */ | |
95 | .macro PUSH_GS | |
a49976d1 | 96 | pushl $0 |
ccbeed3a TH |
97 | .endm |
98 | .macro POP_GS pop=0 | |
a49976d1 | 99 | addl $(4 + \pop), %esp |
ccbeed3a TH |
100 | .endm |
101 | .macro POP_GS_EX | |
102 | .endm | |
103 | ||
104 | /* all the rest are no-op */ | |
105 | .macro PTGS_TO_GS | |
106 | .endm | |
107 | .macro PTGS_TO_GS_EX | |
108 | .endm | |
109 | .macro GS_TO_REG reg | |
110 | .endm | |
111 | .macro REG_TO_PTGS reg | |
112 | .endm | |
113 | .macro SET_KERNEL_GS reg | |
114 | .endm | |
115 | ||
116 | #else /* CONFIG_X86_32_LAZY_GS */ | |
117 | ||
118 | .macro PUSH_GS | |
a49976d1 | 119 | pushl %gs |
ccbeed3a TH |
120 | .endm |
121 | ||
122 | .macro POP_GS pop=0 | |
a49976d1 | 123 | 98: popl %gs |
ccbeed3a | 124 | .if \pop <> 0 |
9b47feb7 | 125 | add $\pop, %esp |
ccbeed3a TH |
126 | .endif |
127 | .endm | |
128 | .macro POP_GS_EX | |
129 | .pushsection .fixup, "ax" | |
a49976d1 IM |
130 | 99: movl $0, (%esp) |
131 | jmp 98b | |
ccbeed3a | 132 | .popsection |
a49976d1 | 133 | _ASM_EXTABLE(98b, 99b) |
ccbeed3a TH |
134 | .endm |
135 | ||
136 | .macro PTGS_TO_GS | |
a49976d1 | 137 | 98: mov PT_GS(%esp), %gs |
ccbeed3a TH |
138 | .endm |
139 | .macro PTGS_TO_GS_EX | |
140 | .pushsection .fixup, "ax" | |
a49976d1 IM |
141 | 99: movl $0, PT_GS(%esp) |
142 | jmp 98b | |
ccbeed3a | 143 | .popsection |
a49976d1 | 144 | _ASM_EXTABLE(98b, 99b) |
ccbeed3a TH |
145 | .endm |
146 | ||
147 | .macro GS_TO_REG reg | |
a49976d1 | 148 | movl %gs, \reg |
ccbeed3a TH |
149 | .endm |
150 | .macro REG_TO_PTGS reg | |
a49976d1 | 151 | movl \reg, PT_GS(%esp) |
ccbeed3a TH |
152 | .endm |
153 | .macro SET_KERNEL_GS reg | |
a49976d1 IM |
154 | movl $(__KERNEL_STACK_CANARY), \reg |
155 | movl \reg, %gs | |
ccbeed3a TH |
156 | .endm |
157 | ||
a49976d1 | 158 | #endif /* CONFIG_X86_32_LAZY_GS */ |
ccbeed3a | 159 | |
e464fb9f JR |
160 | /* Unconditionally switch to user cr3 */ |
161 | .macro SWITCH_TO_USER_CR3 scratch_reg:req | |
162 | ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI | |
163 | ||
164 | movl %cr3, \scratch_reg | |
165 | orl $PTI_SWITCH_MASK, \scratch_reg | |
166 | movl \scratch_reg, %cr3 | |
167 | .Lend_\@: | |
168 | .endm | |
169 | ||
97193702 JR |
170 | .macro BUG_IF_WRONG_CR3 no_user_check=0 |
171 | #ifdef CONFIG_DEBUG_ENTRY | |
172 | ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI | |
173 | .if \no_user_check == 0 | |
174 | /* coming from usermode? */ | |
81ff2c37 | 175 | testl $USER_SEGMENT_RPL_MASK, PT_CS(%esp) |
97193702 JR |
176 | jz .Lend_\@ |
177 | .endif | |
178 | /* On user-cr3? */ | |
179 | movl %cr3, %eax | |
180 | testl $PTI_SWITCH_MASK, %eax | |
181 | jnz .Lend_\@ | |
182 | /* From userspace with kernel cr3 - BUG */ | |
183 | ud2 | |
184 | .Lend_\@: | |
185 | #endif | |
186 | .endm | |
187 | ||
e464fb9f JR |
188 | /* |
189 | * Switch to kernel cr3 if not already loaded and return current cr3 in | |
190 | * \scratch_reg | |
191 | */ | |
192 | .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req | |
193 | ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI | |
194 | movl %cr3, \scratch_reg | |
195 | /* Test if we are already on kernel CR3 */ | |
196 | testl $PTI_SWITCH_MASK, \scratch_reg | |
197 | jz .Lend_\@ | |
198 | andl $(~PTI_SWITCH_MASK), \scratch_reg | |
199 | movl \scratch_reg, %cr3 | |
200 | /* Return original CR3 in \scratch_reg */ | |
201 | orl $PTI_SWITCH_MASK, \scratch_reg | |
202 | .Lend_\@: | |
203 | .endm | |
204 | ||
3c88c692 PZ |
205 | #define CS_FROM_ENTRY_STACK (1 << 31) |
206 | #define CS_FROM_USER_CR3 (1 << 30) | |
207 | #define CS_FROM_KERNEL (1 << 29) | |
89542907 | 208 | #define CS_FROM_ESPFIX (1 << 28) |
3c88c692 PZ |
209 | |
210 | .macro FIXUP_FRAME | |
211 | /* | |
212 | * The high bits of the CS dword (__csh) are used for CS_FROM_*. | |
213 | * Clear them in case hardware didn't do this for us. | |
214 | */ | |
82cb8a0b | 215 | andl $0x0000ffff, 4*4(%esp) |
3c88c692 PZ |
216 | |
217 | #ifdef CONFIG_VM86 | |
82cb8a0b | 218 | testl $X86_EFLAGS_VM, 5*4(%esp) |
3c88c692 PZ |
219 | jnz .Lfrom_usermode_no_fixup_\@ |
220 | #endif | |
82cb8a0b | 221 | testl $USER_SEGMENT_RPL_MASK, 4*4(%esp) |
3c88c692 PZ |
222 | jnz .Lfrom_usermode_no_fixup_\@ |
223 | ||
82cb8a0b | 224 | orl $CS_FROM_KERNEL, 4*4(%esp) |
3c88c692 PZ |
225 | |
226 | /* | |
227 | * When we're here from kernel mode; the (exception) stack looks like: | |
228 | * | |
82cb8a0b AL |
229 | * 6*4(%esp) - <previous context> |
230 | * 5*4(%esp) - flags | |
231 | * 4*4(%esp) - cs | |
232 | * 3*4(%esp) - ip | |
233 | * 2*4(%esp) - orig_eax | |
234 | * 1*4(%esp) - gs / function | |
235 | * 0*4(%esp) - fs | |
3c88c692 PZ |
236 | * |
237 | * Lets build a 5 entry IRET frame after that, such that struct pt_regs | |
238 | * is complete and in particular regs->sp is correct. This gives us | |
82cb8a0b | 239 | * the original 6 enties as gap: |
3c88c692 | 240 | * |
82cb8a0b AL |
241 | * 14*4(%esp) - <previous context> |
242 | * 13*4(%esp) - gap / flags | |
243 | * 12*4(%esp) - gap / cs | |
244 | * 11*4(%esp) - gap / ip | |
245 | * 10*4(%esp) - gap / orig_eax | |
246 | * 9*4(%esp) - gap / gs / function | |
247 | * 8*4(%esp) - gap / fs | |
248 | * 7*4(%esp) - ss | |
249 | * 6*4(%esp) - sp | |
250 | * 5*4(%esp) - flags | |
251 | * 4*4(%esp) - cs | |
252 | * 3*4(%esp) - ip | |
253 | * 2*4(%esp) - orig_eax | |
254 | * 1*4(%esp) - gs / function | |
255 | * 0*4(%esp) - fs | |
3c88c692 PZ |
256 | */ |
257 | ||
258 | pushl %ss # ss | |
259 | pushl %esp # sp (points at ss) | |
82cb8a0b AL |
260 | addl $7*4, (%esp) # point sp back at the previous context |
261 | pushl 7*4(%esp) # flags | |
262 | pushl 7*4(%esp) # cs | |
263 | pushl 7*4(%esp) # ip | |
264 | pushl 7*4(%esp) # orig_eax | |
265 | pushl 7*4(%esp) # gs / function | |
266 | pushl 7*4(%esp) # fs | |
3c88c692 PZ |
267 | .Lfrom_usermode_no_fixup_\@: |
268 | .endm | |
269 | ||
270 | .macro IRET_FRAME | |
4c4fd55d AL |
271 | /* |
272 | * We're called with %ds, %es, %fs, and %gs from the interrupted | |
273 | * frame, so we shouldn't use them. Also, we may be in ESPFIX | |
274 | * mode and therefore have a nonzero SS base and an offset ESP, | |
275 | * so any attempt to access the stack needs to use SS. (except for | |
276 | * accesses through %esp, which automatically use SS.) | |
277 | */ | |
3c88c692 PZ |
278 | testl $CS_FROM_KERNEL, 1*4(%esp) |
279 | jz .Lfinished_frame_\@ | |
280 | ||
281 | /* | |
282 | * Reconstruct the 3 entry IRET frame right after the (modified) | |
283 | * regs->sp without lowering %esp in between, such that an NMI in the | |
284 | * middle doesn't scribble our stack. | |
285 | */ | |
286 | pushl %eax | |
287 | pushl %ecx | |
288 | movl 5*4(%esp), %eax # (modified) regs->sp | |
289 | ||
290 | movl 4*4(%esp), %ecx # flags | |
4c4fd55d | 291 | movl %ecx, %ss:-1*4(%eax) |
3c88c692 PZ |
292 | |
293 | movl 3*4(%esp), %ecx # cs | |
294 | andl $0x0000ffff, %ecx | |
4c4fd55d | 295 | movl %ecx, %ss:-2*4(%eax) |
3c88c692 PZ |
296 | |
297 | movl 2*4(%esp), %ecx # ip | |
4c4fd55d | 298 | movl %ecx, %ss:-3*4(%eax) |
3c88c692 PZ |
299 | |
300 | movl 1*4(%esp), %ecx # eax | |
4c4fd55d | 301 | movl %ecx, %ss:-4*4(%eax) |
3c88c692 PZ |
302 | |
303 | popl %ecx | |
4c4fd55d | 304 | lea -4*4(%eax), %esp |
3c88c692 PZ |
305 | popl %eax |
306 | .Lfinished_frame_\@: | |
307 | .endm | |
308 | ||
a1a338e5 | 309 | .macro SAVE_ALL pt_regs_ax=%eax switch_stacks=0 skip_gs=0 unwind_espfix=0 |
f0d96110 | 310 | cld |
e67f1c11 | 311 | .if \skip_gs == 0 |
ccbeed3a | 312 | PUSH_GS |
e67f1c11 | 313 | .endif |
a49976d1 | 314 | pushl %fs |
a1a338e5 AL |
315 | |
316 | pushl %eax | |
317 | movl $(__KERNEL_PERCPU), %eax | |
318 | movl %eax, %fs | |
319 | .if \unwind_espfix > 0 | |
320 | UNWIND_ESPFIX_STACK | |
321 | .endif | |
322 | popl %eax | |
323 | ||
82cb8a0b | 324 | FIXUP_FRAME |
a49976d1 IM |
325 | pushl %es |
326 | pushl %ds | |
150ac78d | 327 | pushl \pt_regs_ax |
a49976d1 IM |
328 | pushl %ebp |
329 | pushl %edi | |
330 | pushl %esi | |
331 | pushl %edx | |
332 | pushl %ecx | |
333 | pushl %ebx | |
334 | movl $(__USER_DS), %edx | |
335 | movl %edx, %ds | |
336 | movl %edx, %es | |
e67f1c11 | 337 | .if \skip_gs == 0 |
ccbeed3a | 338 | SET_KERNEL_GS %edx |
e67f1c11 | 339 | .endif |
45d7b255 JR |
340 | /* Switch to kernel stack if necessary */ |
341 | .if \switch_stacks > 0 | |
342 | SWITCH_TO_KERNEL_STACK | |
343 | .endif | |
f0d96110 | 344 | .endm |
1da177e4 | 345 | |
89542907 PZ |
346 | .macro SAVE_ALL_NMI cr3_reg:req unwind_espfix=0 |
347 | SAVE_ALL unwind_espfix=\unwind_espfix | |
b65bef40 | 348 | |
97193702 JR |
349 | BUG_IF_WRONG_CR3 |
350 | ||
b65bef40 JR |
351 | /* |
352 | * Now switch the CR3 when PTI is enabled. | |
353 | * | |
354 | * We can enter with either user or kernel cr3, the code will | |
355 | * store the old cr3 in \cr3_reg and switches to the kernel cr3 | |
356 | * if necessary. | |
357 | */ | |
358 | SWITCH_TO_KERNEL_CR3 scratch_reg=\cr3_reg | |
359 | ||
360 | .Lend_\@: | |
8b376fae | 361 | .endm |
97193702 | 362 | |
f0d96110 | 363 | .macro RESTORE_INT_REGS |
a49976d1 IM |
364 | popl %ebx |
365 | popl %ecx | |
366 | popl %edx | |
367 | popl %esi | |
368 | popl %edi | |
369 | popl %ebp | |
370 | popl %eax | |
f0d96110 | 371 | .endm |
1da177e4 | 372 | |
ccbeed3a | 373 | .macro RESTORE_REGS pop=0 |
f0d96110 | 374 | RESTORE_INT_REGS |
a49976d1 IM |
375 | 1: popl %ds |
376 | 2: popl %es | |
377 | 3: popl %fs | |
ccbeed3a | 378 | POP_GS \pop |
40ad2199 | 379 | IRET_FRAME |
f0d96110 | 380 | .pushsection .fixup, "ax" |
a49976d1 IM |
381 | 4: movl $0, (%esp) |
382 | jmp 1b | |
383 | 5: movl $0, (%esp) | |
384 | jmp 2b | |
385 | 6: movl $0, (%esp) | |
386 | jmp 3b | |
f95d47ca | 387 | .popsection |
a49976d1 IM |
388 | _ASM_EXTABLE(1b, 4b) |
389 | _ASM_EXTABLE(2b, 5b) | |
390 | _ASM_EXTABLE(3b, 6b) | |
ccbeed3a | 391 | POP_GS_EX |
f0d96110 | 392 | .endm |
1da177e4 | 393 | |
b65bef40 JR |
394 | .macro RESTORE_ALL_NMI cr3_reg:req pop=0 |
395 | /* | |
396 | * Now switch the CR3 when PTI is enabled. | |
397 | * | |
398 | * We enter with kernel cr3 and switch the cr3 to the value | |
399 | * stored on \cr3_reg, which is either a user or a kernel cr3. | |
400 | */ | |
401 | ALTERNATIVE "jmp .Lswitched_\@", "", X86_FEATURE_PTI | |
402 | ||
403 | testl $PTI_SWITCH_MASK, \cr3_reg | |
404 | jz .Lswitched_\@ | |
405 | ||
406 | /* User cr3 in \cr3_reg - write it to hardware cr3 */ | |
407 | movl \cr3_reg, %cr3 | |
408 | ||
409 | .Lswitched_\@: | |
410 | ||
97193702 JR |
411 | BUG_IF_WRONG_CR3 |
412 | ||
8b376fae JR |
413 | RESTORE_REGS pop=\pop |
414 | .endm | |
415 | ||
46eabca2 JR |
416 | .macro CHECK_AND_APPLY_ESPFIX |
417 | #ifdef CONFIG_X86_ESPFIX32 | |
4a13b0e3 AL |
418 | #define GDT_ESPFIX_OFFSET (GDT_ENTRY_ESPFIX_SS * 8) |
419 | #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + GDT_ESPFIX_OFFSET | |
46eabca2 JR |
420 | |
421 | ALTERNATIVE "jmp .Lend_\@", "", X86_BUG_ESPFIX | |
422 | ||
423 | movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS | |
424 | /* | |
425 | * Warning: PT_OLDSS(%esp) contains the wrong/random values if we | |
426 | * are returning to the kernel. | |
427 | * See comments in process.c:copy_thread() for details. | |
428 | */ | |
429 | movb PT_OLDSS(%esp), %ah | |
430 | movb PT_CS(%esp), %al | |
431 | andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax | |
432 | cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax | |
433 | jne .Lend_\@ # returning to user-space with LDT SS | |
434 | ||
435 | /* | |
436 | * Setup and switch to ESPFIX stack | |
437 | * | |
438 | * We're returning to userspace with a 16 bit stack. The CPU will not | |
439 | * restore the high word of ESP for us on executing iret... This is an | |
440 | * "official" bug of all the x86-compatible CPUs, which we can work | |
441 | * around to make dosemu and wine happy. We do this by preloading the | |
442 | * high word of ESP with the high word of the userspace ESP while | |
443 | * compensating for the offset by changing to the ESPFIX segment with | |
444 | * a base address that matches for the difference. | |
445 | */ | |
446 | mov %esp, %edx /* load kernel esp */ | |
447 | mov PT_OLDESP(%esp), %eax /* load userspace esp */ | |
448 | mov %dx, %ax /* eax: new kernel esp */ | |
449 | sub %eax, %edx /* offset (low word is 0) */ | |
450 | shr $16, %edx | |
451 | mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */ | |
452 | mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */ | |
453 | pushl $__ESPFIX_SS | |
454 | pushl %eax /* new kernel esp */ | |
455 | /* | |
456 | * Disable interrupts, but do not irqtrace this section: we | |
457 | * will soon execute iret and the tracer was already set to | |
458 | * the irqstate after the IRET: | |
459 | */ | |
460 | DISABLE_INTERRUPTS(CLBR_ANY) | |
461 | lss (%esp), %esp /* switch to espfix segment */ | |
462 | .Lend_\@: | |
463 | #endif /* CONFIG_X86_ESPFIX32 */ | |
464 | .endm | |
45d7b255 | 465 | |
45d7b255 JR |
466 | /* |
467 | * Called with pt_regs fully populated and kernel segments loaded, | |
468 | * so we can access PER_CPU and use the integer registers. | |
469 | * | |
470 | * We need to be very careful here with the %esp switch, because an NMI | |
471 | * can happen everywhere. If the NMI handler finds itself on the | |
472 | * entry-stack, it will overwrite the task-stack and everything we | |
473 | * copied there. So allocate the stack-frame on the task-stack and | |
474 | * switch to it before we do any copying. | |
475 | */ | |
b92a165d | 476 | |
45d7b255 JR |
477 | .macro SWITCH_TO_KERNEL_STACK |
478 | ||
479 | ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV | |
480 | ||
97193702 JR |
481 | BUG_IF_WRONG_CR3 |
482 | ||
e464fb9f JR |
483 | SWITCH_TO_KERNEL_CR3 scratch_reg=%eax |
484 | ||
485 | /* | |
486 | * %eax now contains the entry cr3 and we carry it forward in | |
487 | * that register for the time this macro runs | |
488 | */ | |
489 | ||
45d7b255 JR |
490 | /* Are we on the entry stack? Bail out if not! */ |
491 | movl PER_CPU_VAR(cpu_entry_area), %ecx | |
492 | addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx | |
493 | subl %esp, %ecx /* ecx = (end of entry_stack) - esp */ | |
494 | cmpl $SIZEOF_entry_stack, %ecx | |
495 | jae .Lend_\@ | |
496 | ||
497 | /* Load stack pointer into %esi and %edi */ | |
498 | movl %esp, %esi | |
499 | movl %esi, %edi | |
500 | ||
501 | /* Move %edi to the top of the entry stack */ | |
502 | andl $(MASK_entry_stack), %edi | |
503 | addl $(SIZEOF_entry_stack), %edi | |
504 | ||
505 | /* Load top of task-stack into %edi */ | |
506 | movl TSS_entry2task_stack(%edi), %edi | |
507 | ||
b92a165d | 508 | /* Special case - entry from kernel mode via entry stack */ |
d5e84c21 JR |
509 | #ifdef CONFIG_VM86 |
510 | movl PT_EFLAGS(%esp), %ecx # mix EFLAGS and CS | |
511 | movb PT_CS(%esp), %cl | |
512 | andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %ecx | |
513 | #else | |
514 | movl PT_CS(%esp), %ecx | |
515 | andl $SEGMENT_RPL_MASK, %ecx | |
516 | #endif | |
517 | cmpl $USER_RPL, %ecx | |
518 | jb .Lentry_from_kernel_\@ | |
b92a165d | 519 | |
45d7b255 JR |
520 | /* Bytes to copy */ |
521 | movl $PTREGS_SIZE, %ecx | |
522 | ||
523 | #ifdef CONFIG_VM86 | |
524 | testl $X86_EFLAGS_VM, PT_EFLAGS(%esi) | |
525 | jz .Lcopy_pt_regs_\@ | |
526 | ||
527 | /* | |
528 | * Stack-frame contains 4 additional segment registers when | |
529 | * coming from VM86 mode | |
530 | */ | |
531 | addl $(4 * 4), %ecx | |
532 | ||
45d7b255 | 533 | #endif |
b92a165d | 534 | .Lcopy_pt_regs_\@: |
45d7b255 JR |
535 | |
536 | /* Allocate frame on task-stack */ | |
537 | subl %ecx, %edi | |
538 | ||
539 | /* Switch to task-stack */ | |
540 | movl %edi, %esp | |
541 | ||
542 | /* | |
543 | * We are now on the task-stack and can safely copy over the | |
544 | * stack-frame | |
545 | */ | |
546 | shrl $2, %ecx | |
547 | cld | |
548 | rep movsl | |
549 | ||
b92a165d JR |
550 | jmp .Lend_\@ |
551 | ||
552 | .Lentry_from_kernel_\@: | |
553 | ||
554 | /* | |
555 | * This handles the case when we enter the kernel from | |
556 | * kernel-mode and %esp points to the entry-stack. When this | |
557 | * happens we need to switch to the task-stack to run C code, | |
558 | * but switch back to the entry-stack again when we approach | |
559 | * iret and return to the interrupted code-path. This usually | |
560 | * happens when we hit an exception while restoring user-space | |
e464fb9f JR |
561 | * segment registers on the way back to user-space or when the |
562 | * sysenter handler runs with eflags.tf set. | |
b92a165d JR |
563 | * |
564 | * When we switch to the task-stack here, we can't trust the | |
565 | * contents of the entry-stack anymore, as the exception handler | |
566 | * might be scheduled out or moved to another CPU. Therefore we | |
567 | * copy the complete entry-stack to the task-stack and set a | |
568 | * marker in the iret-frame (bit 31 of the CS dword) to detect | |
569 | * what we've done on the iret path. | |
570 | * | |
571 | * On the iret path we copy everything back and switch to the | |
572 | * entry-stack, so that the interrupted kernel code-path | |
573 | * continues on the same stack it was interrupted with. | |
574 | * | |
575 | * Be aware that an NMI can happen anytime in this code. | |
576 | * | |
577 | * %esi: Entry-Stack pointer (same as %esp) | |
578 | * %edi: Top of the task stack | |
e464fb9f | 579 | * %eax: CR3 on kernel entry |
b92a165d JR |
580 | */ |
581 | ||
582 | /* Calculate number of bytes on the entry stack in %ecx */ | |
583 | movl %esi, %ecx | |
584 | ||
585 | /* %ecx to the top of entry-stack */ | |
586 | andl $(MASK_entry_stack), %ecx | |
587 | addl $(SIZEOF_entry_stack), %ecx | |
588 | ||
589 | /* Number of bytes on the entry stack to %ecx */ | |
590 | sub %esi, %ecx | |
591 | ||
592 | /* Mark stackframe as coming from entry stack */ | |
593 | orl $CS_FROM_ENTRY_STACK, PT_CS(%esp) | |
594 | ||
e464fb9f JR |
595 | /* |
596 | * Test the cr3 used to enter the kernel and add a marker | |
597 | * so that we can switch back to it before iret. | |
598 | */ | |
599 | testl $PTI_SWITCH_MASK, %eax | |
600 | jz .Lcopy_pt_regs_\@ | |
601 | orl $CS_FROM_USER_CR3, PT_CS(%esp) | |
602 | ||
b92a165d JR |
603 | /* |
604 | * %esi and %edi are unchanged, %ecx contains the number of | |
605 | * bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate | |
606 | * the stack-frame on task-stack and copy everything over | |
607 | */ | |
608 | jmp .Lcopy_pt_regs_\@ | |
609 | ||
45d7b255 JR |
610 | .Lend_\@: |
611 | .endm | |
612 | ||
e5862d05 JR |
613 | /* |
614 | * Switch back from the kernel stack to the entry stack. | |
615 | * | |
616 | * The %esp register must point to pt_regs on the task stack. It will | |
617 | * first calculate the size of the stack-frame to copy, depending on | |
618 | * whether we return to VM86 mode or not. With that it uses 'rep movsl' | |
619 | * to copy the contents of the stack over to the entry stack. | |
620 | * | |
621 | * We must be very careful here, as we can't trust the contents of the | |
622 | * task-stack once we switched to the entry-stack. When an NMI happens | |
623 | * while on the entry-stack, the NMI handler will switch back to the top | |
624 | * of the task stack, overwriting our stack-frame we are about to copy. | |
625 | * Therefore we switch the stack only after everything is copied over. | |
626 | */ | |
627 | .macro SWITCH_TO_ENTRY_STACK | |
628 | ||
629 | ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV | |
630 | ||
631 | /* Bytes to copy */ | |
632 | movl $PTREGS_SIZE, %ecx | |
633 | ||
634 | #ifdef CONFIG_VM86 | |
635 | testl $(X86_EFLAGS_VM), PT_EFLAGS(%esp) | |
636 | jz .Lcopy_pt_regs_\@ | |
637 | ||
638 | /* Additional 4 registers to copy when returning to VM86 mode */ | |
639 | addl $(4 * 4), %ecx | |
640 | ||
641 | .Lcopy_pt_regs_\@: | |
642 | #endif | |
643 | ||
644 | /* Initialize source and destination for movsl */ | |
645 | movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi | |
646 | subl %ecx, %edi | |
647 | movl %esp, %esi | |
648 | ||
649 | /* Save future stack pointer in %ebx */ | |
650 | movl %edi, %ebx | |
651 | ||
652 | /* Copy over the stack-frame */ | |
653 | shrl $2, %ecx | |
654 | cld | |
655 | rep movsl | |
656 | ||
657 | /* | |
658 | * Switch to entry-stack - needs to happen after everything is | |
659 | * copied because the NMI handler will overwrite the task-stack | |
660 | * when on entry-stack | |
661 | */ | |
662 | movl %ebx, %esp | |
663 | ||
664 | .Lend_\@: | |
665 | .endm | |
666 | ||
b92a165d JR |
667 | /* |
668 | * This macro handles the case when we return to kernel-mode on the iret | |
e464fb9f | 669 | * path and have to switch back to the entry stack and/or user-cr3 |
b92a165d JR |
670 | * |
671 | * See the comments below the .Lentry_from_kernel_\@ label in the | |
672 | * SWITCH_TO_KERNEL_STACK macro for more details. | |
673 | */ | |
674 | .macro PARANOID_EXIT_TO_KERNEL_MODE | |
675 | ||
676 | /* | |
677 | * Test if we entered the kernel with the entry-stack. Most | |
678 | * likely we did not, because this code only runs on the | |
679 | * return-to-kernel path. | |
680 | */ | |
681 | testl $CS_FROM_ENTRY_STACK, PT_CS(%esp) | |
682 | jz .Lend_\@ | |
683 | ||
684 | /* Unlikely slow-path */ | |
685 | ||
686 | /* Clear marker from stack-frame */ | |
687 | andl $(~CS_FROM_ENTRY_STACK), PT_CS(%esp) | |
688 | ||
689 | /* Copy the remaining task-stack contents to entry-stack */ | |
690 | movl %esp, %esi | |
691 | movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi | |
692 | ||
693 | /* Bytes on the task-stack to ecx */ | |
694 | movl PER_CPU_VAR(cpu_tss_rw + TSS_sp1), %ecx | |
695 | subl %esi, %ecx | |
696 | ||
697 | /* Allocate stack-frame on entry-stack */ | |
698 | subl %ecx, %edi | |
699 | ||
700 | /* | |
701 | * Save future stack-pointer, we must not switch until the | |
702 | * copy is done, otherwise the NMI handler could destroy the | |
703 | * contents of the task-stack we are about to copy. | |
704 | */ | |
705 | movl %edi, %ebx | |
706 | ||
707 | /* Do the copy */ | |
708 | shrl $2, %ecx | |
709 | cld | |
710 | rep movsl | |
711 | ||
712 | /* Safe to switch to entry-stack now */ | |
713 | movl %ebx, %esp | |
714 | ||
e464fb9f JR |
715 | /* |
716 | * We came from entry-stack and need to check if we also need to | |
717 | * switch back to user cr3. | |
718 | */ | |
719 | testl $CS_FROM_USER_CR3, PT_CS(%esp) | |
720 | jz .Lend_\@ | |
721 | ||
722 | /* Clear marker from stack-frame */ | |
723 | andl $(~CS_FROM_USER_CR3), PT_CS(%esp) | |
724 | ||
725 | SWITCH_TO_USER_CR3 scratch_reg=%eax | |
726 | ||
b92a165d JR |
727 | .Lend_\@: |
728 | .endm | |
0100301b BG |
729 | /* |
730 | * %eax: prev task | |
731 | * %edx: next task | |
732 | */ | |
733 | ENTRY(__switch_to_asm) | |
734 | /* | |
735 | * Save callee-saved registers | |
736 | * This must match the order in struct inactive_task_frame | |
737 | */ | |
738 | pushl %ebp | |
739 | pushl %ebx | |
740 | pushl %edi | |
741 | pushl %esi | |
6690e86b | 742 | pushfl |
0100301b BG |
743 | |
744 | /* switch stack */ | |
745 | movl %esp, TASK_threadsp(%eax) | |
746 | movl TASK_threadsp(%edx), %esp | |
747 | ||
050e9baa | 748 | #ifdef CONFIG_STACKPROTECTOR |
0100301b BG |
749 | movl TASK_stack_canary(%edx), %ebx |
750 | movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset | |
751 | #endif | |
752 | ||
c995efd5 DW |
753 | #ifdef CONFIG_RETPOLINE |
754 | /* | |
755 | * When switching from a shallower to a deeper call stack | |
756 | * the RSB may either underflow or use entries populated | |
757 | * with userspace addresses. On CPUs where those concerns | |
758 | * exist, overwrite the RSB with entries which capture | |
759 | * speculative execution to prevent attack. | |
760 | */ | |
d1c99108 | 761 | FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW |
c995efd5 DW |
762 | #endif |
763 | ||
0100301b | 764 | /* restore callee-saved registers */ |
6690e86b | 765 | popfl |
0100301b BG |
766 | popl %esi |
767 | popl %edi | |
768 | popl %ebx | |
769 | popl %ebp | |
770 | ||
771 | jmp __switch_to | |
772 | END(__switch_to_asm) | |
773 | ||
ebd57499 JP |
774 | /* |
775 | * The unwinder expects the last frame on the stack to always be at the same | |
776 | * offset from the end of the page, which allows it to validate the stack. | |
777 | * Calling schedule_tail() directly would break that convention because its an | |
778 | * asmlinkage function so its argument has to be pushed on the stack. This | |
779 | * wrapper creates a proper "end of stack" frame header before the call. | |
780 | */ | |
781 | ENTRY(schedule_tail_wrapper) | |
782 | FRAME_BEGIN | |
783 | ||
784 | pushl %eax | |
785 | call schedule_tail | |
786 | popl %eax | |
787 | ||
788 | FRAME_END | |
789 | ret | |
790 | ENDPROC(schedule_tail_wrapper) | |
0100301b BG |
791 | /* |
792 | * A newly forked process directly context switches into this address. | |
793 | * | |
794 | * eax: prev task we switched from | |
616d2483 BG |
795 | * ebx: kernel thread func (NULL for user thread) |
796 | * edi: kernel thread arg | |
0100301b | 797 | */ |
1da177e4 | 798 | ENTRY(ret_from_fork) |
ebd57499 | 799 | call schedule_tail_wrapper |
39e8701f | 800 | |
616d2483 BG |
801 | testl %ebx, %ebx |
802 | jnz 1f /* kernel threads are uncommon */ | |
803 | ||
804 | 2: | |
39e8701f | 805 | /* When we fork, we trace the syscall return in the child, too. */ |
ebd57499 | 806 | movl %esp, %eax |
39e8701f | 807 | call syscall_return_slowpath |
afaef01c | 808 | STACKLEAK_ERASE |
39e8701f | 809 | jmp restore_all |
39e8701f | 810 | |
616d2483 BG |
811 | /* kernel thread */ |
812 | 1: movl %edi, %eax | |
2641f08b | 813 | CALL_NOSPEC %ebx |
39e8701f | 814 | /* |
616d2483 BG |
815 | * A kernel thread is allowed to return here after successfully |
816 | * calling do_execve(). Exit to userspace to complete the execve() | |
817 | * syscall. | |
39e8701f | 818 | */ |
616d2483 BG |
819 | movl $0, PT_EAX(%esp) |
820 | jmp 2b | |
821 | END(ret_from_fork) | |
6783eaa2 | 822 | |
1da177e4 LT |
823 | /* |
824 | * Return to user mode is not as complex as all this looks, | |
825 | * but we want the default path for a system call return to | |
826 | * go as quickly as possible which is why some of this is | |
827 | * less clear than it otherwise should be. | |
828 | */ | |
829 | ||
830 | # userspace resumption stub bypassing syscall exit tracing | |
831 | ALIGN | |
832 | ret_from_exception: | |
139ec7c4 | 833 | preempt_stop(CLBR_ANY) |
1da177e4 | 834 | ret_from_intr: |
29a2e283 | 835 | #ifdef CONFIG_VM86 |
a49976d1 IM |
836 | movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS |
837 | movb PT_CS(%esp), %al | |
838 | andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax | |
29a2e283 DA |
839 | #else |
840 | /* | |
6783eaa2 | 841 | * We can be coming here from child spawned by kernel_thread(). |
29a2e283 | 842 | */ |
a49976d1 IM |
843 | movl PT_CS(%esp), %eax |
844 | andl $SEGMENT_RPL_MASK, %eax | |
29a2e283 | 845 | #endif |
a49976d1 | 846 | cmpl $USER_RPL, %eax |
5e1246ff | 847 | jb restore_all_kernel # not returning to v8086 or userspace |
f95d47ca | 848 | |
1da177e4 | 849 | ENTRY(resume_userspace) |
5d73fc70 | 850 | DISABLE_INTERRUPTS(CLBR_ANY) |
e32e58a9 | 851 | TRACE_IRQS_OFF |
5d73fc70 AL |
852 | movl %esp, %eax |
853 | call prepare_exit_to_usermode | |
a49976d1 | 854 | jmp restore_all |
47a55cd7 | 855 | END(ret_from_exception) |
1da177e4 | 856 | |
f2b37575 AL |
857 | GLOBAL(__begin_SYSENTER_singlestep_region) |
858 | /* | |
859 | * All code from here through __end_SYSENTER_singlestep_region is subject | |
860 | * to being single-stepped if a user program sets TF and executes SYSENTER. | |
861 | * There is absolutely nothing that we can do to prevent this from happening | |
862 | * (thanks Intel!). To keep our handling of this situation as simple as | |
863 | * possible, we handle TF just like AC and NT, except that our #DB handler | |
864 | * will ignore all of the single-step traps generated in this range. | |
865 | */ | |
866 | ||
28c11b0f | 867 | #ifdef CONFIG_XEN_PV |
f2b37575 AL |
868 | /* |
869 | * Xen doesn't set %esp to be precisely what the normal SYSENTER | |
870 | * entry point expects, so fix it up before using the normal path. | |
871 | */ | |
872 | ENTRY(xen_sysenter_target) | |
873 | addl $5*4, %esp /* remove xen-provided frame */ | |
1b00255f | 874 | jmp .Lsysenter_past_esp |
f2b37575 AL |
875 | #endif |
876 | ||
fda57b22 AL |
877 | /* |
878 | * 32-bit SYSENTER entry. | |
879 | * | |
880 | * 32-bit system calls through the vDSO's __kernel_vsyscall enter here | |
881 | * if X86_FEATURE_SEP is available. This is the preferred system call | |
882 | * entry on 32-bit systems. | |
883 | * | |
884 | * The SYSENTER instruction, in principle, should *only* occur in the | |
885 | * vDSO. In practice, a small number of Android devices were shipped | |
886 | * with a copy of Bionic that inlined a SYSENTER instruction. This | |
887 | * never happened in any of Google's Bionic versions -- it only happened | |
888 | * in a narrow range of Intel-provided versions. | |
889 | * | |
890 | * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs. | |
891 | * IF and VM in RFLAGS are cleared (IOW: interrupts are off). | |
892 | * SYSENTER does not save anything on the stack, | |
893 | * and does not save old EIP (!!!), ESP, or EFLAGS. | |
894 | * | |
895 | * To avoid losing track of EFLAGS.VM (and thus potentially corrupting | |
896 | * user and/or vm86 state), we explicitly disable the SYSENTER | |
897 | * instruction in vm86 mode by reprogramming the MSRs. | |
898 | * | |
899 | * Arguments: | |
900 | * eax system call number | |
901 | * ebx arg1 | |
902 | * ecx arg2 | |
903 | * edx arg3 | |
904 | * esi arg4 | |
905 | * edi arg5 | |
906 | * ebp user stack | |
907 | * 0(%ebp) arg6 | |
908 | */ | |
4c8cd0c5 | 909 | ENTRY(entry_SYSENTER_32) |
e464fb9f JR |
910 | /* |
911 | * On entry-stack with all userspace-regs live - save and | |
912 | * restore eflags and %eax to use it as scratch-reg for the cr3 | |
913 | * switch. | |
914 | */ | |
915 | pushfl | |
916 | pushl %eax | |
97193702 | 917 | BUG_IF_WRONG_CR3 no_user_check=1 |
e464fb9f JR |
918 | SWITCH_TO_KERNEL_CR3 scratch_reg=%eax |
919 | popl %eax | |
920 | popfl | |
921 | ||
922 | /* Stack empty again, switch to task stack */ | |
ae2e565b | 923 | movl TSS_entry2task_stack(%esp), %esp |
e464fb9f | 924 | |
1b00255f | 925 | .Lsysenter_past_esp: |
5f310f73 | 926 | pushl $__USER_DS /* pt_regs->ss */ |
30bfa7b3 | 927 | pushl %ebp /* pt_regs->sp (stashed in bp) */ |
5f310f73 AL |
928 | pushfl /* pt_regs->flags (except IF = 0) */ |
929 | orl $X86_EFLAGS_IF, (%esp) /* Fix IF */ | |
930 | pushl $__USER_CS /* pt_regs->cs */ | |
931 | pushl $0 /* pt_regs->ip = 0 (placeholder) */ | |
932 | pushl %eax /* pt_regs->orig_ax */ | |
45d7b255 | 933 | SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest, stack already switched */ |
5f310f73 | 934 | |
67f590e8 | 935 | /* |
f2b37575 AL |
936 | * SYSENTER doesn't filter flags, so we need to clear NT, AC |
937 | * and TF ourselves. To save a few cycles, we can check whether | |
67f590e8 AL |
938 | * either was set instead of doing an unconditional popfq. |
939 | * This needs to happen before enabling interrupts so that | |
940 | * we don't get preempted with NT set. | |
941 | * | |
f2b37575 AL |
942 | * If TF is set, we will single-step all the way to here -- do_debug |
943 | * will ignore all the traps. (Yes, this is slow, but so is | |
944 | * single-stepping in general. This allows us to avoid having | |
945 | * a more complicated code to handle the case where a user program | |
946 | * forces us to single-step through the SYSENTER entry code.) | |
947 | * | |
67f590e8 AL |
948 | * NB.: .Lsysenter_fix_flags is a label with the code under it moved |
949 | * out-of-line as an optimization: NT is unlikely to be set in the | |
950 | * majority of the cases and instead of polluting the I$ unnecessarily, | |
951 | * we're keeping that code behind a branch which will predict as | |
952 | * not-taken and therefore its instructions won't be fetched. | |
953 | */ | |
f2b37575 | 954 | testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp) |
67f590e8 AL |
955 | jnz .Lsysenter_fix_flags |
956 | .Lsysenter_flags_fixed: | |
957 | ||
55f327fa | 958 | /* |
5f310f73 AL |
959 | * User mode is traced as though IRQs are on, and SYSENTER |
960 | * turned them off. | |
e6e5494c | 961 | */ |
55f327fa | 962 | TRACE_IRQS_OFF |
5f310f73 AL |
963 | |
964 | movl %esp, %eax | |
965 | call do_fast_syscall_32 | |
91e2eea9 BO |
966 | /* XEN PV guests always use IRET path */ |
967 | ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ | |
968 | "jmp .Lsyscall_32_done", X86_FEATURE_XENPV | |
5f310f73 | 969 | |
afaef01c AP |
970 | STACKLEAK_ERASE |
971 | ||
5f310f73 AL |
972 | /* Opportunistic SYSEXIT */ |
973 | TRACE_IRQS_ON /* User mode traces as IRQs on. */ | |
e5862d05 JR |
974 | |
975 | /* | |
976 | * Setup entry stack - we keep the pointer in %eax and do the | |
977 | * switch after almost all user-state is restored. | |
978 | */ | |
979 | ||
980 | /* Load entry stack pointer and allocate frame for eflags/eax */ | |
981 | movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %eax | |
982 | subl $(2*4), %eax | |
983 | ||
984 | /* Copy eflags and eax to entry stack */ | |
985 | movl PT_EFLAGS(%esp), %edi | |
986 | movl PT_EAX(%esp), %esi | |
987 | movl %edi, (%eax) | |
988 | movl %esi, 4(%eax) | |
989 | ||
990 | /* Restore user registers and segments */ | |
5f310f73 AL |
991 | movl PT_EIP(%esp), %edx /* pt_regs->ip */ |
992 | movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */ | |
3bd29515 AL |
993 | 1: mov PT_FS(%esp), %fs |
994 | PTGS_TO_GS | |
e5862d05 | 995 | |
5f310f73 AL |
996 | popl %ebx /* pt_regs->bx */ |
997 | addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */ | |
998 | popl %esi /* pt_regs->si */ | |
999 | popl %edi /* pt_regs->di */ | |
1000 | popl %ebp /* pt_regs->bp */ | |
e5862d05 JR |
1001 | |
1002 | /* Switch to entry stack */ | |
1003 | movl %eax, %esp | |
5f310f73 | 1004 | |
e464fb9f JR |
1005 | /* Now ready to switch the cr3 */ |
1006 | SWITCH_TO_USER_CR3 scratch_reg=%eax | |
1007 | ||
c2c9b52f AL |
1008 | /* |
1009 | * Restore all flags except IF. (We restore IF separately because | |
1010 | * STI gives a one-instruction window in which we won't be interrupted, | |
1011 | * whereas POPF does not.) | |
1012 | */ | |
236f0cd2 | 1013 | btrl $X86_EFLAGS_IF_BIT, (%esp) |
97193702 | 1014 | BUG_IF_WRONG_CR3 no_user_check=1 |
c2c9b52f | 1015 | popfl |
e5862d05 | 1016 | popl %eax |
c2c9b52f | 1017 | |
5f310f73 AL |
1018 | /* |
1019 | * Return back to the vDSO, which will pop ecx and edx. | |
1020 | * Don't bother with DS and ES (they already contain __USER_DS). | |
1021 | */ | |
88c15ec9 BO |
1022 | sti |
1023 | sysexit | |
af0575bb | 1024 | |
a49976d1 IM |
1025 | .pushsection .fixup, "ax" |
1026 | 2: movl $0, PT_FS(%esp) | |
1027 | jmp 1b | |
f95d47ca | 1028 | .popsection |
a49976d1 | 1029 | _ASM_EXTABLE(1b, 2b) |
ccbeed3a | 1030 | PTGS_TO_GS_EX |
67f590e8 AL |
1031 | |
1032 | .Lsysenter_fix_flags: | |
1033 | pushl $X86_EFLAGS_FIXED | |
1034 | popfl | |
1035 | jmp .Lsysenter_flags_fixed | |
f2b37575 | 1036 | GLOBAL(__end_SYSENTER_singlestep_region) |
4c8cd0c5 | 1037 | ENDPROC(entry_SYSENTER_32) |
1da177e4 | 1038 | |
fda57b22 AL |
1039 | /* |
1040 | * 32-bit legacy system call entry. | |
1041 | * | |
1042 | * 32-bit x86 Linux system calls traditionally used the INT $0x80 | |
1043 | * instruction. INT $0x80 lands here. | |
1044 | * | |
1045 | * This entry point can be used by any 32-bit perform system calls. | |
1046 | * Instances of INT $0x80 can be found inline in various programs and | |
1047 | * libraries. It is also used by the vDSO's __kernel_vsyscall | |
1048 | * fallback for hardware that doesn't support a faster entry method. | |
1049 | * Restarted 32-bit system calls also fall back to INT $0x80 | |
1050 | * regardless of what instruction was originally used to do the system | |
1051 | * call. (64-bit programs can use INT $0x80 as well, but they can | |
1052 | * only run on 64-bit kernels and therefore land in | |
1053 | * entry_INT80_compat.) | |
1054 | * | |
1055 | * This is considered a slow path. It is not used by most libc | |
1056 | * implementations on modern hardware except during process startup. | |
1057 | * | |
1058 | * Arguments: | |
1059 | * eax system call number | |
1060 | * ebx arg1 | |
1061 | * ecx arg2 | |
1062 | * edx arg3 | |
1063 | * esi arg4 | |
1064 | * edi arg5 | |
1065 | * ebp arg6 | |
1066 | */ | |
b2502b41 | 1067 | ENTRY(entry_INT80_32) |
e59d1b0a | 1068 | ASM_CLAC |
150ac78d | 1069 | pushl %eax /* pt_regs->orig_ax */ |
45d7b255 JR |
1070 | |
1071 | SAVE_ALL pt_regs_ax=$-ENOSYS switch_stacks=1 /* save rest */ | |
150ac78d AL |
1072 | |
1073 | /* | |
a798f091 AL |
1074 | * User mode is traced as though IRQs are on, and the interrupt gate |
1075 | * turned them off. | |
150ac78d | 1076 | */ |
a798f091 | 1077 | TRACE_IRQS_OFF |
150ac78d AL |
1078 | |
1079 | movl %esp, %eax | |
a798f091 | 1080 | call do_int80_syscall_32 |
5f310f73 | 1081 | .Lsyscall_32_done: |
1da177e4 | 1082 | |
afaef01c AP |
1083 | STACKLEAK_ERASE |
1084 | ||
1da177e4 | 1085 | restore_all: |
2e04bc76 | 1086 | TRACE_IRQS_IRET |
e5862d05 | 1087 | SWITCH_TO_ENTRY_STACK |
1b00255f | 1088 | .Lrestore_all_notrace: |
46eabca2 | 1089 | CHECK_AND_APPLY_ESPFIX |
1b00255f | 1090 | .Lrestore_nocheck: |
e464fb9f JR |
1091 | /* Switch back to user CR3 */ |
1092 | SWITCH_TO_USER_CR3 scratch_reg=%eax | |
1093 | ||
97193702 JR |
1094 | BUG_IF_WRONG_CR3 |
1095 | ||
e464fb9f JR |
1096 | /* Restore user state */ |
1097 | RESTORE_REGS pop=4 # skip orig_eax/error_code | |
1b00255f | 1098 | .Lirq_return: |
10bcc80e MD |
1099 | /* |
1100 | * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization | |
1101 | * when returning from IPI handler and when returning from | |
1102 | * scheduler to user-space. | |
1103 | */ | |
3701d863 | 1104 | INTERRUPT_RETURN |
1b00255f | 1105 | |
0d2eb73b | 1106 | restore_all_kernel: |
48593975 | 1107 | #ifdef CONFIG_PREEMPTION |
5e1246ff PZ |
1108 | DISABLE_INTERRUPTS(CLBR_ANY) |
1109 | cmpl $0, PER_CPU_VAR(__preempt_count) | |
1110 | jnz .Lno_preempt | |
1111 | testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ? | |
1112 | jz .Lno_preempt | |
1113 | call preempt_schedule_irq | |
1114 | .Lno_preempt: | |
1115 | #endif | |
0d2eb73b | 1116 | TRACE_IRQS_IRET |
b92a165d | 1117 | PARANOID_EXIT_TO_KERNEL_MODE |
97193702 | 1118 | BUG_IF_WRONG_CR3 |
0d2eb73b JR |
1119 | RESTORE_REGS 4 |
1120 | jmp .Lirq_return | |
1121 | ||
a49976d1 IM |
1122 | .section .fixup, "ax" |
1123 | ENTRY(iret_exc ) | |
1124 | pushl $0 # no error code | |
1125 | pushl $do_iret_error | |
97193702 JR |
1126 | |
1127 | #ifdef CONFIG_DEBUG_ENTRY | |
1128 | /* | |
1129 | * The stack-frame here is the one that iret faulted on, so its a | |
1130 | * return-to-user frame. We are on kernel-cr3 because we come here from | |
1131 | * the fixup code. This confuses the CR3 checker, so switch to user-cr3 | |
1132 | * as the checker expects it. | |
1133 | */ | |
1134 | pushl %eax | |
1135 | SWITCH_TO_USER_CR3 scratch_reg=%eax | |
1136 | popl %eax | |
1137 | #endif | |
1138 | ||
7252c4c3 | 1139 | jmp common_exception |
1da177e4 | 1140 | .previous |
1b00255f | 1141 | _ASM_EXTABLE(.Lirq_return, iret_exc) |
b2502b41 | 1142 | ENDPROC(entry_INT80_32) |
1da177e4 | 1143 | |
f0d96110 | 1144 | .macro FIXUP_ESPFIX_STACK |
dc4c2a0a AH |
1145 | /* |
1146 | * Switch back for ESPFIX stack to the normal zerobased stack | |
1147 | * | |
1148 | * We can't call C functions using the ESPFIX stack. This code reads | |
1149 | * the high word of the segment base from the GDT and swiches to the | |
1150 | * normal stack and adjusts ESP with the matching offset. | |
4a13b0e3 AL |
1151 | * |
1152 | * We might be on user CR3 here, so percpu data is not mapped and we can't | |
1153 | * access the GDT through the percpu segment. Instead, use SGDT to find | |
1154 | * the cpu_entry_area alias of the GDT. | |
dc4c2a0a | 1155 | */ |
34273f41 | 1156 | #ifdef CONFIG_X86_ESPFIX32 |
dc4c2a0a | 1157 | /* fixup the stack */ |
4a13b0e3 AL |
1158 | pushl %ecx |
1159 | subl $2*4, %esp | |
1160 | sgdt (%esp) | |
1161 | movl 2(%esp), %ecx /* GDT address */ | |
1162 | /* | |
1163 | * Careful: ECX is a linear pointer, so we need to force base | |
1164 | * zero. %cs is the only known-linear segment we have right now. | |
1165 | */ | |
1166 | mov %cs:GDT_ESPFIX_OFFSET + 4(%ecx), %al /* bits 16..23 */ | |
1167 | mov %cs:GDT_ESPFIX_OFFSET + 7(%ecx), %ah /* bits 24..31 */ | |
9b47feb7 | 1168 | shl $16, %eax |
4a13b0e3 AL |
1169 | addl $2*4, %esp |
1170 | popl %ecx | |
a49976d1 IM |
1171 | addl %esp, %eax /* the adjusted stack pointer */ |
1172 | pushl $__KERNEL_DS | |
1173 | pushl %eax | |
1174 | lss (%esp), %esp /* switch to the normal stack segment */ | |
34273f41 | 1175 | #endif |
f0d96110 | 1176 | .endm |
a1a338e5 | 1177 | |
f0d96110 | 1178 | .macro UNWIND_ESPFIX_STACK |
a1a338e5 | 1179 | /* It's safe to clobber %eax, all other regs need to be preserved */ |
34273f41 | 1180 | #ifdef CONFIG_X86_ESPFIX32 |
a49976d1 | 1181 | movl %ss, %eax |
f0d96110 | 1182 | /* see if on espfix stack */ |
a49976d1 | 1183 | cmpw $__ESPFIX_SS, %ax |
a1a338e5 | 1184 | jne .Lno_fixup_\@ |
f0d96110 TH |
1185 | /* switch to normal stack */ |
1186 | FIXUP_ESPFIX_STACK | |
a1a338e5 | 1187 | .Lno_fixup_\@: |
34273f41 | 1188 | #endif |
f0d96110 | 1189 | .endm |
1da177e4 LT |
1190 | |
1191 | /* | |
3304c9c3 DV |
1192 | * Build the entry stubs with some assembler magic. |
1193 | * We pack 1 stub into every 8-byte block. | |
1da177e4 | 1194 | */ |
3304c9c3 | 1195 | .align 8 |
1da177e4 | 1196 | ENTRY(irq_entries_start) |
3304c9c3 DV |
1197 | vector=FIRST_EXTERNAL_VECTOR |
1198 | .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) | |
a49976d1 | 1199 | pushl $(~vector+0x80) /* Note: always in signed byte range */ |
3304c9c3 DV |
1200 | vector=vector+1 |
1201 | jmp common_interrupt | |
3304c9c3 DV |
1202 | .align 8 |
1203 | .endr | |
47a55cd7 JB |
1204 | END(irq_entries_start) |
1205 | ||
f8a8fe61 TG |
1206 | #ifdef CONFIG_X86_LOCAL_APIC |
1207 | .align 8 | |
1208 | ENTRY(spurious_entries_start) | |
1209 | vector=FIRST_SYSTEM_VECTOR | |
1210 | .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR) | |
1211 | pushl $(~vector+0x80) /* Note: always in signed byte range */ | |
1212 | vector=vector+1 | |
1213 | jmp common_spurious | |
1214 | .align 8 | |
1215 | .endr | |
1216 | END(spurious_entries_start) | |
1217 | ||
1218 | common_spurious: | |
1219 | ASM_CLAC | |
1220 | addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */ | |
1221 | SAVE_ALL switch_stacks=1 | |
1222 | ENCODE_FRAME_POINTER | |
1223 | TRACE_IRQS_OFF | |
1224 | movl %esp, %eax | |
1225 | call smp_spurious_interrupt | |
1226 | jmp ret_from_intr | |
1cbec37b | 1227 | ENDPROC(common_spurious) |
f8a8fe61 TG |
1228 | #endif |
1229 | ||
55f327fa IM |
1230 | /* |
1231 | * the CPU automatically disables interrupts when executing an IRQ vector, | |
1232 | * so IRQ-flags tracing has to follow that: | |
1233 | */ | |
b7c6244f | 1234 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
1da177e4 | 1235 | common_interrupt: |
e59d1b0a | 1236 | ASM_CLAC |
a49976d1 | 1237 | addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */ |
45d7b255 JR |
1238 | |
1239 | SAVE_ALL switch_stacks=1 | |
946c1911 | 1240 | ENCODE_FRAME_POINTER |
55f327fa | 1241 | TRACE_IRQS_OFF |
a49976d1 IM |
1242 | movl %esp, %eax |
1243 | call do_IRQ | |
1244 | jmp ret_from_intr | |
47a55cd7 | 1245 | ENDPROC(common_interrupt) |
1da177e4 | 1246 | |
45d7b255 JR |
1247 | #define BUILD_INTERRUPT3(name, nr, fn) \ |
1248 | ENTRY(name) \ | |
1249 | ASM_CLAC; \ | |
1250 | pushl $~(nr); \ | |
1251 | SAVE_ALL switch_stacks=1; \ | |
1252 | ENCODE_FRAME_POINTER; \ | |
1253 | TRACE_IRQS_OFF \ | |
1254 | movl %esp, %eax; \ | |
1255 | call fn; \ | |
1256 | jmp ret_from_intr; \ | |
47a55cd7 | 1257 | ENDPROC(name) |
1da177e4 | 1258 | |
a49976d1 IM |
1259 | #define BUILD_INTERRUPT(name, nr) \ |
1260 | BUILD_INTERRUPT3(name, nr, smp_##name); \ | |
02cf94c3 | 1261 | |
1da177e4 | 1262 | /* The include is where all of the SMP etc. interrupts come from */ |
1164dd00 | 1263 | #include <asm/entry_arch.h> |
1da177e4 | 1264 | |
1da177e4 | 1265 | ENTRY(coprocessor_error) |
e59d1b0a | 1266 | ASM_CLAC |
a49976d1 IM |
1267 | pushl $0 |
1268 | pushl $do_coprocessor_error | |
7252c4c3 | 1269 | jmp common_exception |
47a55cd7 | 1270 | END(coprocessor_error) |
1da177e4 LT |
1271 | |
1272 | ENTRY(simd_coprocessor_error) | |
e59d1b0a | 1273 | ASM_CLAC |
a49976d1 | 1274 | pushl $0 |
40d2e763 BG |
1275 | #ifdef CONFIG_X86_INVD_BUG |
1276 | /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */ | |
a49976d1 IM |
1277 | ALTERNATIVE "pushl $do_general_protection", \ |
1278 | "pushl $do_simd_coprocessor_error", \ | |
8e65f6e0 | 1279 | X86_FEATURE_XMM |
40d2e763 | 1280 | #else |
a49976d1 | 1281 | pushl $do_simd_coprocessor_error |
40d2e763 | 1282 | #endif |
7252c4c3 | 1283 | jmp common_exception |
47a55cd7 | 1284 | END(simd_coprocessor_error) |
1da177e4 LT |
1285 | |
1286 | ENTRY(device_not_available) | |
e59d1b0a | 1287 | ASM_CLAC |
a49976d1 IM |
1288 | pushl $-1 # mark this as an int |
1289 | pushl $do_device_not_available | |
7252c4c3 | 1290 | jmp common_exception |
47a55cd7 | 1291 | END(device_not_available) |
1da177e4 | 1292 | |
d3561b7f RR |
1293 | #ifdef CONFIG_PARAVIRT |
1294 | ENTRY(native_iret) | |
3701d863 | 1295 | iret |
6837a54d | 1296 | _ASM_EXTABLE(native_iret, iret_exc) |
47a55cd7 | 1297 | END(native_iret) |
d3561b7f RR |
1298 | #endif |
1299 | ||
1da177e4 | 1300 | ENTRY(overflow) |
e59d1b0a | 1301 | ASM_CLAC |
a49976d1 IM |
1302 | pushl $0 |
1303 | pushl $do_overflow | |
7252c4c3 | 1304 | jmp common_exception |
47a55cd7 | 1305 | END(overflow) |
1da177e4 LT |
1306 | |
1307 | ENTRY(bounds) | |
e59d1b0a | 1308 | ASM_CLAC |
a49976d1 IM |
1309 | pushl $0 |
1310 | pushl $do_bounds | |
7252c4c3 | 1311 | jmp common_exception |
47a55cd7 | 1312 | END(bounds) |
1da177e4 LT |
1313 | |
1314 | ENTRY(invalid_op) | |
e59d1b0a | 1315 | ASM_CLAC |
a49976d1 IM |
1316 | pushl $0 |
1317 | pushl $do_invalid_op | |
7252c4c3 | 1318 | jmp common_exception |
47a55cd7 | 1319 | END(invalid_op) |
1da177e4 LT |
1320 | |
1321 | ENTRY(coprocessor_segment_overrun) | |
e59d1b0a | 1322 | ASM_CLAC |
a49976d1 IM |
1323 | pushl $0 |
1324 | pushl $do_coprocessor_segment_overrun | |
7252c4c3 | 1325 | jmp common_exception |
47a55cd7 | 1326 | END(coprocessor_segment_overrun) |
1da177e4 LT |
1327 | |
1328 | ENTRY(invalid_TSS) | |
e59d1b0a | 1329 | ASM_CLAC |
a49976d1 | 1330 | pushl $do_invalid_TSS |
7252c4c3 | 1331 | jmp common_exception |
47a55cd7 | 1332 | END(invalid_TSS) |
1da177e4 LT |
1333 | |
1334 | ENTRY(segment_not_present) | |
e59d1b0a | 1335 | ASM_CLAC |
a49976d1 | 1336 | pushl $do_segment_not_present |
7252c4c3 | 1337 | jmp common_exception |
47a55cd7 | 1338 | END(segment_not_present) |
1da177e4 LT |
1339 | |
1340 | ENTRY(stack_segment) | |
e59d1b0a | 1341 | ASM_CLAC |
a49976d1 | 1342 | pushl $do_stack_segment |
7252c4c3 | 1343 | jmp common_exception |
47a55cd7 | 1344 | END(stack_segment) |
1da177e4 | 1345 | |
1da177e4 | 1346 | ENTRY(alignment_check) |
e59d1b0a | 1347 | ASM_CLAC |
a49976d1 | 1348 | pushl $do_alignment_check |
7252c4c3 | 1349 | jmp common_exception |
47a55cd7 | 1350 | END(alignment_check) |
1da177e4 | 1351 | |
d28c4393 | 1352 | ENTRY(divide_error) |
e59d1b0a | 1353 | ASM_CLAC |
a49976d1 IM |
1354 | pushl $0 # no error code |
1355 | pushl $do_divide_error | |
7252c4c3 | 1356 | jmp common_exception |
47a55cd7 | 1357 | END(divide_error) |
1da177e4 LT |
1358 | |
1359 | #ifdef CONFIG_X86_MCE | |
1360 | ENTRY(machine_check) | |
e59d1b0a | 1361 | ASM_CLAC |
a49976d1 IM |
1362 | pushl $0 |
1363 | pushl machine_check_vector | |
7252c4c3 | 1364 | jmp common_exception |
47a55cd7 | 1365 | END(machine_check) |
1da177e4 LT |
1366 | #endif |
1367 | ||
1368 | ENTRY(spurious_interrupt_bug) | |
e59d1b0a | 1369 | ASM_CLAC |
a49976d1 IM |
1370 | pushl $0 |
1371 | pushl $do_spurious_interrupt_bug | |
7252c4c3 | 1372 | jmp common_exception |
47a55cd7 | 1373 | END(spurious_interrupt_bug) |
1da177e4 | 1374 | |
28c11b0f | 1375 | #ifdef CONFIG_XEN_PV |
5ead97c8 | 1376 | ENTRY(xen_hypervisor_callback) |
a49976d1 IM |
1377 | /* |
1378 | * Check to see if we got the event in the critical | |
1379 | * region in xen_iret_direct, after we've reenabled | |
1380 | * events and checked for pending events. This simulates | |
1381 | * iret instruction's behaviour where it delivers a | |
1382 | * pending interrupt when enabling interrupts: | |
1383 | */ | |
29b810f5 | 1384 | cmpl $xen_iret_start_crit, (%esp) |
a49976d1 | 1385 | jb 1f |
29b810f5 | 1386 | cmpl $xen_iret_end_crit, (%esp) |
a49976d1 | 1387 | jae 1f |
29b810f5 JB |
1388 | call xen_iret_crit_fixup |
1389 | 1: | |
1390 | pushl $-1 /* orig_ax = -1 => not a system call */ | |
1391 | SAVE_ALL | |
1392 | ENCODE_FRAME_POINTER | |
1393 | TRACE_IRQS_OFF | |
1394 | mov %esp, %eax | |
a49976d1 | 1395 | call xen_evtchn_do_upcall |
48593975 | 1396 | #ifndef CONFIG_PREEMPTION |
a49976d1 | 1397 | call xen_maybe_preempt_hcall |
fdfd811d | 1398 | #endif |
a49976d1 | 1399 | jmp ret_from_intr |
5ead97c8 JF |
1400 | ENDPROC(xen_hypervisor_callback) |
1401 | ||
a49976d1 IM |
1402 | /* |
1403 | * Hypervisor uses this for application faults while it executes. | |
1404 | * We get here for two reasons: | |
1405 | * 1. Fault while reloading DS, ES, FS or GS | |
1406 | * 2. Fault while executing IRET | |
1407 | * Category 1 we fix up by reattempting the load, and zeroing the segment | |
1408 | * register if the load fails. | |
1409 | * Category 2 we fix up by jumping to do_iret_error. We cannot use the | |
1410 | * normal Linux return path in this case because if we use the IRET hypercall | |
1411 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1412 | * We distinguish between categories by maintaining a status value in EAX. | |
1413 | */ | |
5ead97c8 | 1414 | ENTRY(xen_failsafe_callback) |
a49976d1 IM |
1415 | pushl %eax |
1416 | movl $1, %eax | |
1417 | 1: mov 4(%esp), %ds | |
1418 | 2: mov 8(%esp), %es | |
1419 | 3: mov 12(%esp), %fs | |
1420 | 4: mov 16(%esp), %gs | |
a349e23d DV |
1421 | /* EAX == 0 => Category 1 (Bad segment) |
1422 | EAX != 0 => Category 2 (Bad IRET) */ | |
a49976d1 IM |
1423 | testl %eax, %eax |
1424 | popl %eax | |
1425 | lea 16(%esp), %esp | |
1426 | jz 5f | |
1427 | jmp iret_exc | |
1428 | 5: pushl $-1 /* orig_ax = -1 => not a system call */ | |
5ead97c8 | 1429 | SAVE_ALL |
946c1911 | 1430 | ENCODE_FRAME_POINTER |
a49976d1 IM |
1431 | jmp ret_from_exception |
1432 | ||
1433 | .section .fixup, "ax" | |
1434 | 6: xorl %eax, %eax | |
1435 | movl %eax, 4(%esp) | |
1436 | jmp 1b | |
1437 | 7: xorl %eax, %eax | |
1438 | movl %eax, 8(%esp) | |
1439 | jmp 2b | |
1440 | 8: xorl %eax, %eax | |
1441 | movl %eax, 12(%esp) | |
1442 | jmp 3b | |
1443 | 9: xorl %eax, %eax | |
1444 | movl %eax, 16(%esp) | |
1445 | jmp 4b | |
5ead97c8 | 1446 | .previous |
a49976d1 IM |
1447 | _ASM_EXTABLE(1b, 6b) |
1448 | _ASM_EXTABLE(2b, 7b) | |
1449 | _ASM_EXTABLE(3b, 8b) | |
1450 | _ASM_EXTABLE(4b, 9b) | |
5ead97c8 | 1451 | ENDPROC(xen_failsafe_callback) |
28c11b0f | 1452 | #endif /* CONFIG_XEN_PV */ |
5ead97c8 | 1453 | |
28c11b0f | 1454 | #ifdef CONFIG_XEN_PVHVM |
bc2b0331 | 1455 | BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR, |
4b9a8dca | 1456 | xen_evtchn_do_upcall) |
28c11b0f | 1457 | #endif |
38e20b07 | 1458 | |
bc2b0331 S |
1459 | |
1460 | #if IS_ENABLED(CONFIG_HYPERV) | |
1461 | ||
1462 | BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR, | |
4b9a8dca | 1463 | hyperv_vector_handler) |
bc2b0331 | 1464 | |
93286261 VK |
1465 | BUILD_INTERRUPT3(hyperv_reenlightenment_vector, HYPERV_REENLIGHTENMENT_VECTOR, |
1466 | hyperv_reenlightenment_intr) | |
1467 | ||
248e742a MK |
1468 | BUILD_INTERRUPT3(hv_stimer0_callback_vector, HYPERV_STIMER0_VECTOR, |
1469 | hv_stimer0_vector_handler) | |
1470 | ||
bc2b0331 | 1471 | #endif /* CONFIG_HYPERV */ |
5ead97c8 | 1472 | |
d211af05 | 1473 | ENTRY(page_fault) |
e59d1b0a | 1474 | ASM_CLAC |
b8f70953 MM |
1475 | pushl $do_page_fault |
1476 | jmp common_exception_read_cr2 | |
1477 | END(page_fault) | |
a0d14b89 | 1478 | |
b8f70953 MM |
1479 | common_exception_read_cr2: |
1480 | /* the function address is in %gs's slot on the stack */ | |
a1a338e5 | 1481 | SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1 |
a0d14b89 PZ |
1482 | |
1483 | ENCODE_FRAME_POINTER | |
a0d14b89 PZ |
1484 | |
1485 | /* fixup %gs */ | |
1486 | GS_TO_REG %ecx | |
b8f70953 | 1487 | movl PT_GS(%esp), %edi |
a0d14b89 PZ |
1488 | REG_TO_PTGS %ecx |
1489 | SET_KERNEL_GS %ecx | |
1490 | ||
1491 | GET_CR2_INTO(%ecx) # might clobber %eax | |
1492 | ||
1493 | /* fixup orig %eax */ | |
1494 | movl PT_ORIG_EAX(%esp), %edx # get the error code | |
1495 | movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart | |
1496 | ||
1497 | TRACE_IRQS_OFF | |
1498 | movl %esp, %eax # pt_regs pointer | |
b8f70953 | 1499 | CALL_NOSPEC %edi |
a0d14b89 | 1500 | jmp ret_from_exception |
b8f70953 | 1501 | END(common_exception_read_cr2) |
7252c4c3 JP |
1502 | |
1503 | common_exception: | |
ccbeed3a | 1504 | /* the function address is in %gs's slot on the stack */ |
a1a338e5 | 1505 | SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1 |
946c1911 | 1506 | ENCODE_FRAME_POINTER |
e67f1c11 PZ |
1507 | |
1508 | /* fixup %gs */ | |
ccbeed3a | 1509 | GS_TO_REG %ecx |
a49976d1 | 1510 | movl PT_GS(%esp), %edi # get the function address |
ccbeed3a TH |
1511 | REG_TO_PTGS %ecx |
1512 | SET_KERNEL_GS %ecx | |
e67f1c11 PZ |
1513 | |
1514 | /* fixup orig %eax */ | |
1515 | movl PT_ORIG_EAX(%esp), %edx # get the error code | |
1516 | movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart | |
1517 | ||
d211af05 | 1518 | TRACE_IRQS_OFF |
a49976d1 | 1519 | movl %esp, %eax # pt_regs pointer |
2641f08b | 1520 | CALL_NOSPEC %edi |
a49976d1 | 1521 | jmp ret_from_exception |
7252c4c3 | 1522 | END(common_exception) |
d211af05 | 1523 | |
d211af05 | 1524 | ENTRY(debug) |
7536656f | 1525 | /* |
929b44eb | 1526 | * Entry from sysenter is now handled in common_exception |
7536656f | 1527 | */ |
e59d1b0a | 1528 | ASM_CLAC |
a49976d1 | 1529 | pushl $-1 # mark this as an int |
929b44eb JR |
1530 | pushl $do_debug |
1531 | jmp common_exception | |
d211af05 AH |
1532 | END(debug) |
1533 | ||
1534 | /* | |
7536656f AL |
1535 | * NMI is doubly nasty. It can happen on the first instruction of |
1536 | * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning | |
1537 | * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32 | |
1538 | * switched stacks. We handle both conditions by simply checking whether we | |
1539 | * interrupted kernel code running on the SYSENTER stack. | |
d211af05 AH |
1540 | */ |
1541 | ENTRY(nmi) | |
e59d1b0a | 1542 | ASM_CLAC |
45d7b255 | 1543 | |
34273f41 | 1544 | #ifdef CONFIG_X86_ESPFIX32 |
89542907 PZ |
1545 | /* |
1546 | * ESPFIX_SS is only ever set on the return to user path | |
1547 | * after we've switched to the entry stack. | |
1548 | */ | |
a49976d1 IM |
1549 | pushl %eax |
1550 | movl %ss, %eax | |
1551 | cmpw $__ESPFIX_SS, %ax | |
1552 | popl %eax | |
1b00255f | 1553 | je .Lnmi_espfix_stack |
34273f41 | 1554 | #endif |
7536656f AL |
1555 | |
1556 | pushl %eax # pt_regs->orig_ax | |
b65bef40 | 1557 | SAVE_ALL_NMI cr3_reg=%edi |
946c1911 | 1558 | ENCODE_FRAME_POINTER |
a49976d1 IM |
1559 | xorl %edx, %edx # zero error code |
1560 | movl %esp, %eax # pt_regs pointer | |
7536656f AL |
1561 | |
1562 | /* Are we currently on the SYSENTER stack? */ | |
72f5e08d | 1563 | movl PER_CPU_VAR(cpu_entry_area), %ecx |
4fe2d8b1 DH |
1564 | addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx |
1565 | subl %eax, %ecx /* ecx = (end of entry_stack) - esp */ | |
1566 | cmpl $SIZEOF_entry_stack, %ecx | |
7536656f AL |
1567 | jb .Lnmi_from_sysenter_stack |
1568 | ||
1569 | /* Not on SYSENTER stack. */ | |
a49976d1 | 1570 | call do_nmi |
8e676ced | 1571 | jmp .Lnmi_return |
d211af05 | 1572 | |
7536656f AL |
1573 | .Lnmi_from_sysenter_stack: |
1574 | /* | |
1575 | * We're on the SYSENTER stack. Switch off. No one (not even debug) | |
1576 | * is using the thread stack right now, so it's safe for us to use it. | |
1577 | */ | |
946c1911 | 1578 | movl %esp, %ebx |
7536656f AL |
1579 | movl PER_CPU_VAR(cpu_current_top_of_stack), %esp |
1580 | call do_nmi | |
946c1911 | 1581 | movl %ebx, %esp |
8e676ced JR |
1582 | |
1583 | .Lnmi_return: | |
89542907 PZ |
1584 | #ifdef CONFIG_X86_ESPFIX32 |
1585 | testl $CS_FROM_ESPFIX, PT_CS(%esp) | |
1586 | jnz .Lnmi_from_espfix | |
1587 | #endif | |
1588 | ||
8e676ced | 1589 | CHECK_AND_APPLY_ESPFIX |
b65bef40 | 1590 | RESTORE_ALL_NMI cr3_reg=%edi pop=4 |
8e676ced | 1591 | jmp .Lirq_return |
d211af05 | 1592 | |
34273f41 | 1593 | #ifdef CONFIG_X86_ESPFIX32 |
1b00255f | 1594 | .Lnmi_espfix_stack: |
131484c8 | 1595 | /* |
89542907 | 1596 | * Create the pointer to LSS back |
d211af05 | 1597 | */ |
a49976d1 IM |
1598 | pushl %ss |
1599 | pushl %esp | |
1600 | addl $4, (%esp) | |
89542907 PZ |
1601 | |
1602 | /* Copy the (short) IRET frame */ | |
1603 | pushl 4*4(%esp) # flags | |
1604 | pushl 4*4(%esp) # cs | |
1605 | pushl 4*4(%esp) # ip | |
1606 | ||
1607 | pushl %eax # orig_ax | |
1608 | ||
1609 | SAVE_ALL_NMI cr3_reg=%edi unwind_espfix=1 | |
946c1911 | 1610 | ENCODE_FRAME_POINTER |
89542907 PZ |
1611 | |
1612 | /* clear CS_FROM_KERNEL, set CS_FROM_ESPFIX */ | |
1613 | xorl $(CS_FROM_ESPFIX | CS_FROM_KERNEL), PT_CS(%esp) | |
1614 | ||
a49976d1 | 1615 | xorl %edx, %edx # zero error code |
89542907 PZ |
1616 | movl %esp, %eax # pt_regs pointer |
1617 | jmp .Lnmi_from_sysenter_stack | |
1618 | ||
1619 | .Lnmi_from_espfix: | |
b65bef40 | 1620 | RESTORE_ALL_NMI cr3_reg=%edi |
89542907 PZ |
1621 | /* |
1622 | * Because we cleared CS_FROM_KERNEL, IRET_FRAME 'forgot' to | |
1623 | * fix up the gap and long frame: | |
1624 | * | |
1625 | * 3 - original frame (exception) | |
1626 | * 2 - ESPFIX block (above) | |
1627 | * 6 - gap (FIXUP_FRAME) | |
1628 | * 5 - long frame (FIXUP_FRAME) | |
1629 | * 1 - orig_ax | |
1630 | */ | |
1631 | lss (1+5+6)*4(%esp), %esp # back to espfix stack | |
1b00255f | 1632 | jmp .Lirq_return |
34273f41 | 1633 | #endif |
d211af05 AH |
1634 | END(nmi) |
1635 | ||
1636 | ENTRY(int3) | |
e59d1b0a | 1637 | ASM_CLAC |
a49976d1 | 1638 | pushl $-1 # mark this as an int |
45d7b255 JR |
1639 | |
1640 | SAVE_ALL switch_stacks=1 | |
946c1911 | 1641 | ENCODE_FRAME_POINTER |
d211af05 | 1642 | TRACE_IRQS_OFF |
a49976d1 IM |
1643 | xorl %edx, %edx # zero error code |
1644 | movl %esp, %eax # pt_regs pointer | |
1645 | call do_int3 | |
1646 | jmp ret_from_exception | |
d211af05 AH |
1647 | END(int3) |
1648 | ||
1649 | ENTRY(general_protection) | |
a49976d1 | 1650 | pushl $do_general_protection |
7252c4c3 | 1651 | jmp common_exception |
d211af05 AH |
1652 | END(general_protection) |
1653 | ||
631bc487 GN |
1654 | #ifdef CONFIG_KVM_GUEST |
1655 | ENTRY(async_page_fault) | |
e59d1b0a | 1656 | ASM_CLAC |
a49976d1 | 1657 | pushl $do_async_page_fault |
b8f70953 | 1658 | jmp common_exception_read_cr2 |
2ae9d293 | 1659 | END(async_page_fault) |
631bc487 | 1660 | #endif |
2deb4be2 AL |
1661 | |
1662 | ENTRY(rewind_stack_do_exit) | |
1663 | /* Prevent any naive code from trying to unwind to our caller. */ | |
1664 | xorl %ebp, %ebp | |
1665 | ||
1666 | movl PER_CPU_VAR(cpu_current_top_of_stack), %esi | |
1667 | leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp | |
1668 | ||
1669 | call do_exit | |
1670 | 1: jmp 1b | |
1671 | END(rewind_stack_do_exit) |