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291f3632 MF |
1 | #ifndef BOOT_COMPRESSED_EBOOT_H |
2 | #define BOOT_COMPRESSED_EBOOT_H | |
3 | ||
4 | #define SEG_TYPE_DATA (0 << 3) | |
5 | #define SEG_TYPE_READ_WRITE (1 << 1) | |
6 | #define SEG_TYPE_CODE (1 << 3) | |
7 | #define SEG_TYPE_EXEC_READ (1 << 1) | |
8 | #define SEG_TYPE_TSS ((1 << 3) | (1 << 0)) | |
9 | #define SEG_OP_SIZE_32BIT (1 << 0) | |
10 | #define SEG_GRANULARITY_4KB (1 << 0) | |
11 | ||
12 | #define DESC_TYPE_CODE_DATA (1 << 0) | |
291f3632 | 13 | |
38cb5ef4 MG |
14 | #define EFI_CONSOLE_OUT_DEVICE_GUID \ |
15 | EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x0, 0x90, 0x27, \ | |
16 | 0x3f, 0xc1, 0x4d) | |
17 | ||
291f3632 MF |
18 | #define PIXEL_RGB_RESERVED_8BIT_PER_COLOR 0 |
19 | #define PIXEL_BGR_RESERVED_8BIT_PER_COLOR 1 | |
20 | #define PIXEL_BIT_MASK 2 | |
21 | #define PIXEL_BLT_ONLY 3 | |
22 | #define PIXEL_FORMAT_MAX 4 | |
23 | ||
24 | struct efi_pixel_bitmask { | |
25 | u32 red_mask; | |
26 | u32 green_mask; | |
27 | u32 blue_mask; | |
28 | u32 reserved_mask; | |
29 | }; | |
30 | ||
31 | struct efi_graphics_output_mode_info { | |
32 | u32 version; | |
33 | u32 horizontal_resolution; | |
34 | u32 vertical_resolution; | |
35 | int pixel_format; | |
36 | struct efi_pixel_bitmask pixel_information; | |
37 | u32 pixels_per_scan_line; | |
38 | } __packed; | |
39 | ||
40 | struct efi_graphics_output_protocol_mode { | |
41 | u32 max_mode; | |
42 | u32 mode; | |
43 | unsigned long info; | |
44 | unsigned long size_of_info; | |
45 | u64 frame_buffer_base; | |
46 | unsigned long frame_buffer_size; | |
47 | } __packed; | |
48 | ||
49 | struct efi_graphics_output_protocol { | |
50 | void *query_mode; | |
51 | unsigned long set_mode; | |
52 | unsigned long blt; | |
53 | struct efi_graphics_output_protocol_mode *mode; | |
54 | }; | |
55 | ||
56 | struct efi_uga_draw_protocol { | |
57 | void *get_mode; | |
58 | void *set_mode; | |
59 | void *blt; | |
60 | }; | |
61 | ||
62 | #endif /* BOOT_COMPRESSED_EBOOT_H */ |