KVM: x86: Fix guest debug across vcpu INIT reset
[linux-2.6-block.git] / arch / x86 / Kconfig.cpu
CommitLineData
96d55b88 1# Put here option for CPU selection and depending optimization
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2choice
3 prompt "Processor family"
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4 default M686 if X86_32
5 default GENERIC_CPU if X86_64
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6
7config M386
8 bool "386"
1032c0ba 9 depends on X86_32 && !UML
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10 ---help---
11 This is the processor type of your CPU. This information is used for
12 optimizing purposes. In order to compile a kernel that can run on
13 all x86 CPU types (albeit not optimally fast), you can specify
14 "386" here.
15
16 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486.
19
20 Here are the settings recommended for greatest speed:
21 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
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22 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386
23 class machine.
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24 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
25 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
26 - "586" for generic Pentium CPUs lacking the TSC
27 (time stamp counter) register.
28 - "Pentium-Classic" for the Intel Pentium.
29 - "Pentium-MMX" for the Intel Pentium MMX.
30 - "Pentium-Pro" for the Intel Pentium Pro.
31 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
32 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
33 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
34 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
35 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
36 - "Crusoe" for the Transmeta Crusoe series.
37 - "Efficeon" for the Transmeta Efficeon series.
38 - "Winchip-C6" for original IDT Winchip.
69d45dd1 39 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
96d55b88 40 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
f90b8116 41 - "Geode GX/LX" For AMD Geode GX and LX processors.
96d55b88 42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
48a1204c 43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
0949be35 44 - "VIA C7" for VIA C7.
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45
46 If you don't know what to do, choose "386".
47
48config M486
49 bool "486"
1032c0ba 50 depends on X86_32
8f9ca475 51 ---help---
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52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56
57config M586
58 bool "586/K5/5x86/6x86/6x86MX"
1032c0ba 59 depends on X86_32
8f9ca475 60 ---help---
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61 Select this for an 586 or 686 series processor such as the AMD K5,
62 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
63 assume the RDTSC (Read Time Stamp Counter) instruction.
64
65config M586TSC
66 bool "Pentium-Classic"
1032c0ba 67 depends on X86_32
8f9ca475 68 ---help---
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69 Select this for a Pentium Classic processor with the RDTSC (Read
70 Time Stamp Counter) instruction for benchmarking.
71
72config M586MMX
73 bool "Pentium-MMX"
1032c0ba 74 depends on X86_32
8f9ca475 75 ---help---
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76 Select this for a Pentium with the MMX graphics/multimedia
77 extended instructions.
78
79config M686
80 bool "Pentium-Pro"
1032c0ba 81 depends on X86_32
8f9ca475 82 ---help---
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83 Select this for Intel Pentium Pro chips. This enables the use of
84 Pentium Pro extended instructions, and disables the init-time guard
85 against the f00f bug found in earlier Pentiums.
86
87config MPENTIUMII
88 bool "Pentium-II/Celeron(pre-Coppermine)"
1032c0ba 89 depends on X86_32
8f9ca475 90 ---help---
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91 Select this for Intel chips based on the Pentium-II and
92 pre-Coppermine Celeron core. This option enables an unaligned
93 copy optimization, compiles the kernel with optimization flags
94 tailored for the chip, and applies any applicable Pentium Pro
95 optimizations.
96
97config MPENTIUMIII
98 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
1032c0ba 99 depends on X86_32
8f9ca475 100 ---help---
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101 Select this for Intel chips based on the Pentium-III and
102 Celeron-Coppermine core. This option enables use of some
103 extended prefetch instructions in addition to the Pentium II
104 extensions.
105
106config MPENTIUMM
107 bool "Pentium M"
1032c0ba 108 depends on X86_32
8f9ca475 109 ---help---
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110 Select this for Intel Pentium M (not Pentium-4 M)
111 notebook chips.
112
113config MPENTIUM4
c55d92d1 114 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
1032c0ba 115 depends on X86_32
8f9ca475 116 ---help---
96d55b88 117 Select this for Intel Pentium 4 chips. This includes the
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118 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
119 Pentium-4 M (not Pentium M) chips. This option enables compile
120 flags optimized for the chip, uses the correct cache line size, and
121 applies any applicable optimizations.
122
123 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
124
125 Select this for:
126 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
127 -Willamette
128 -Northwood
129 -Mobile Pentium 4
130 -Mobile Pentium 4 M
131 -Extreme Edition (Gallatin)
132 -Prescott
133 -Prescott 2M
134 -Cedar Mill
135 -Presler
136 -Smithfiled
137 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
138 -Foster
139 -Prestonia
140 -Gallatin
141 -Nocona
142 -Irwindale
143 -Cranford
144 -Potomac
145 -Paxville
146 -Dempsey
147
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148
149config MK6
150 bool "K6/K6-II/K6-III"
1032c0ba 151 depends on X86_32
8f9ca475 152 ---help---
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153 Select this for an AMD K6-family processor. Enables use of
154 some extended instructions, and passes appropriate optimization
155 flags to GCC.
156
157config MK7
158 bool "Athlon/Duron/K7"
1032c0ba 159 depends on X86_32
8f9ca475 160 ---help---
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161 Select this for an AMD Athlon K7-family processor. Enables use of
162 some extended instructions, and passes appropriate optimization
163 flags to GCC.
164
165config MK8
166 bool "Opteron/Athlon64/Hammer/K8"
8f9ca475 167 ---help---
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168 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
169 Enables use of some extended instructions, and passes appropriate
170 optimization flags to GCC.
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171
172config MCRUSOE
173 bool "Crusoe"
1032c0ba 174 depends on X86_32
8f9ca475 175 ---help---
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176 Select this for a Transmeta Crusoe processor. Treats the processor
177 like a 586 with TSC, and sets some GCC optimization flags (like a
178 Pentium Pro with no alignment requirements).
179
180config MEFFICEON
181 bool "Efficeon"
1032c0ba 182 depends on X86_32
8f9ca475 183 ---help---
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184 Select this for a Transmeta Efficeon processor.
185
186config MWINCHIPC6
187 bool "Winchip-C6"
1032c0ba 188 depends on X86_32
8f9ca475 189 ---help---
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190 Select this for an IDT Winchip C6 chip. Linux and GCC
191 treat this chip as a 586TSC with some extended instructions
192 and alignment requirements.
193
96d55b88 194config MWINCHIP3D
69d45dd1 195 bool "Winchip-2/Winchip-2A/Winchip-3"
1032c0ba 196 depends on X86_32
8f9ca475 197 ---help---
69d45dd1 198 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
96d55b88 199 treat this chip as a 586TSC with some extended instructions
3dde6ad8 200 and alignment requirements. Also enable out of order memory
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201 stores for this CPU, which can increase performance of some
202 operations.
203
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204config MELAN
205 bool "AMD Elan"
206 depends on X86_32
207 ---help---
208 Select this for an AMD Elan processor.
209
210 Do not use this option for K6/Athlon/Opteron processors!
211
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212config MGEODEGX1
213 bool "GeodeGX1"
1032c0ba 214 depends on X86_32
8f9ca475 215 ---help---
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216 Select this for a Geode GX1 (Cyrix MediaGX) chip.
217
f90b8116 218config MGEODE_LX
96daa8cd 219 bool "Geode GX/LX"
1032c0ba 220 depends on X86_32
8f9ca475 221 ---help---
96daa8cd 222 Select this for AMD Geode GX and LX processors.
f90b8116 223
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224config MCYRIXIII
225 bool "CyrixIII/VIA-C3"
1032c0ba 226 depends on X86_32
8f9ca475 227 ---help---
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228 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
229 treat this chip as a generic 586. Whilst the CPU is 686 class,
230 it lacks the cmov extension which gcc assumes is present when
231 generating 686 code.
232 Note that Nehemiah (Model 9) and above will not boot with this
233 kernel due to them lacking the 3DNow! instructions used in earlier
234 incarnations of the CPU.
235
236config MVIAC3_2
237 bool "VIA C3-2 (Nehemiah)"
1032c0ba 238 depends on X86_32
8f9ca475 239 ---help---
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240 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
241 of SSE and tells gcc to treat the CPU as a 686.
242 Note, this kernel will not boot on older (pre model 9) C3s.
243
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244config MVIAC7
245 bool "VIA C7"
1032c0ba 246 depends on X86_32
8f9ca475 247 ---help---
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248 Select this for a VIA C7. Selecting this uses the correct cache
249 shift and tells gcc to treat the CPU as a 686.
250
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251config MPSC
252 bool "Intel P4 / older Netburst based Xeon"
253 depends on X86_64
8f9ca475 254 ---help---
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255 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
256 Xeon CPUs with Intel 64bit which is compatible with x86-64.
257 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
96daa8cd 258 Netburst core and shouldn't use this option. You can distinguish them
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259 using the cpu family field
260 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
261
262config MCORE2
263 bool "Core 2/newer Xeon"
8f9ca475 264 ---help---
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265
266 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
267 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
268 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
269 (not a typo)
1032c0ba 270
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271config MATOM
272 bool "Intel Atom"
273 ---help---
274
275 Select this for the Intel Atom platform. Intel Atom CPUs have an
276 in-order pipelining architecture and thus can benefit from
277 accordingly optimized code. Use a recent GCC with specific Atom
278 support in order to fully benefit from selecting this option.
279
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280config GENERIC_CPU
281 bool "Generic-x86-64"
282 depends on X86_64
8f9ca475 283 ---help---
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284 Generic x86-64 CPU.
285 Run equally well on all x86-64 CPUs.
286
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287endchoice
288
289config X86_GENERIC
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290 bool "Generic x86 support"
291 depends on X86_32
8f9ca475 292 ---help---
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293 Instead of just including optimizations for the selected
294 x86 variant (e.g. PII, Crusoe or Athlon), include some more
295 generic optimizations as well. This will make the kernel
296 perform better on x86 CPUs other than that selected.
297
298 This is really intended for distributors who need more
299 generic optimizations.
300
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301#
302# Define implied options from the CPU selection here
350f8f56 303config X86_INTERNODE_CACHE_SHIFT
1032c0ba 304 int
350f8f56 305 default "12" if X86_VSMP
350f8f56 306 default X86_L1_CACHE_SHIFT
1032c0ba 307
96d55b88 308config X86_CMPXCHG
1032c0ba 309 def_bool X86_64 || (X86_32 && !M386)
96d55b88 310
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311config X86_L1_CACHE_SHIFT
312 int
0a2a18b7 313 default "7" if MPENTIUM4 || MPSC
350f8f56 314 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
ce9c99af 315 default "4" if MELAN || M486 || M386 || MGEODEGX1
69d45dd1 316 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
96d55b88 317
c7f81c94 318config X86_XADD
96daa8cd 319 def_bool y
bafaecd1 320 depends on X86_64 || !M386
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321
322config X86_PPRO_FENCE
fb0328e2 323 bool "PentiumPro memory ordering errata workaround"
96d55b88 324 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
8f9ca475 325 ---help---
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326 Old PentiumPro multiprocessor systems had errata that could cause
327 memory operations to violate the x86 ordering standard in rare cases.
328 Enabling this option will attempt to work around some (but not all)
0d2eb44f 329 occurrences of this problem, at the cost of much heavier spinlock and
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330 memory barrier operations.
331
332 If unsure, say n here. Even distro kernels should think twice before
333 enabling this: there are few systems, and an unlikely bug.
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334
335config X86_F00F_BUG
96daa8cd 336 def_bool y
96d55b88 337 depends on M586MMX || M586TSC || M586 || M486 || M386
96d55b88 338
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339config X86_INVD_BUG
340 def_bool y
341 depends on M486 || M386
342
96d55b88 343config X86_WP_WORKS_OK
96daa8cd 344 def_bool y
293e6a25 345 depends on !M386
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346
347config X86_INVLPG
96daa8cd 348 def_bool y
1032c0ba 349 depends on X86_32 && !M386
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350
351config X86_BSWAP
96daa8cd 352 def_bool y
1032c0ba 353 depends on X86_32 && !M386
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354
355config X86_POPAD_OK
96daa8cd 356 def_bool y
1032c0ba 357 depends on X86_32 && !M386
96d55b88 358
96d55b88 359config X86_ALIGNMENT_16
96daa8cd 360 def_bool y
ce9c99af 361 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
96d55b88 362
96d55b88 363config X86_INTEL_USERCOPY
96daa8cd 364 def_bool y
c55d92d1 365 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
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366
367config X86_USE_PPRO_CHECKSUM
96daa8cd 368 def_bool y
1eda75c1 369 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
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370
371config X86_USE_3DNOW
96daa8cd 372 def_bool y
1b4ad242 373 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
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374
375config X86_OOSTORE
96daa8cd 376 def_bool y
69d45dd1 377 depends on (MWINCHIP3D || MWINCHIPC6) && MTRR
96d55b88 378
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379#
380# P6_NOPs are a relatively minor optimization that require a family >=
381# 6 processor, except that it is broken on certain VIA chips.
382# Furthermore, AMD chips prefer a totally different sequence of NOPs
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383# (which work on all CPUs). In addition, it looks like Virtual PC
384# does not understand them.
385#
386# As a result, disallow these if we're not compiling for X86_64 (these
387# NOPs do work on all x86-64 capable chips); the list of processors in
388# the right-hand clause are the cores that benefit from this optimization.
959b3be6 389#
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390config X86_P6_NOP
391 def_bool y
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392 depends on X86_64
393 depends on (MCORE2 || MPENTIUM4 || MPSC)
7343b3b3 394
96d55b88 395config X86_TSC
96daa8cd 396 def_bool y
366d19e1 397 depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
c7f81c94 398
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399config X86_CMPXCHG64
400 def_bool y
db677ffa 401 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
f8096f92 402
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403# this should be set for all -march=.. options where the compiler
404# generates cmov.
405config X86_CMOV
96daa8cd 406 def_bool y
98059e34 407 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
c7f81c94 408
de32e041 409config X86_MINIMUM_CPU_FAMILY
c7f81c94 410 int
1032c0ba 411 default "64" if X86_64
7343b3b3 412 default "6" if X86_32 && X86_P6_NOP
982d007a 413 default "5" if X86_32 && X86_CMPXCHG64
1032c0ba 414 default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
de32e041 415 default "3"
c7f81c94 416
0a049bb0 417config X86_DEBUGCTLMSR
96daa8cd 418 def_bool y
5641f1fd 419 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML
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420
421menuconfig PROCESSOR_SELECT
6a108a14 422 bool "Supported processor vendors" if EXPERT
8f9ca475 423 ---help---
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424 This lets you choose what x86 vendor support code your kernel
425 will include.
426
879d792b 427config CPU_SUP_INTEL
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428 default y
429 bool "Support Intel processors" if PROCESSOR_SELECT
8f9ca475 430 ---help---
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431 This enables detection, tunings and quirks for Intel processors
432
433 You need this enabled if you want your kernel to run on an
434 Intel CPU. Disabling this option on other types of CPUs
435 makes the kernel a tiny bit smaller. Disabling it on an Intel
436 CPU might render the kernel unbootable.
437
438 If unsure, say N.
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439
440config CPU_SUP_CYRIX_32
441 default y
442 bool "Support Cyrix processors" if PROCESSOR_SELECT
0d2bf489 443 depends on M386 || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
8f9ca475 444 ---help---
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445 This enables detection, tunings and quirks for Cyrix processors
446
447 You need this enabled if you want your kernel to run on a
448 Cyrix CPU. Disabling this option on other types of CPUs
449 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
450 CPU might render the kernel unbootable.
451
452 If unsure, say N.
8d02c211 453
ff73152c 454config CPU_SUP_AMD
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455 default y
456 bool "Support AMD processors" if PROCESSOR_SELECT
8f9ca475 457 ---help---
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458 This enables detection, tunings and quirks for AMD processors
459
460 You need this enabled if you want your kernel to run on an
461 AMD CPU. Disabling this option on other types of CPUs
462 makes the kernel a tiny bit smaller. Disabling it on an AMD
463 CPU might render the kernel unbootable.
464
465 If unsure, say N.
8d02c211 466
48f4c485 467config CPU_SUP_CENTAUR
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468 default y
469 bool "Support Centaur processors" if PROCESSOR_SELECT
8f9ca475 470 ---help---
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471 This enables detection, tunings and quirks for Centaur processors
472
473 You need this enabled if you want your kernel to run on a
474 Centaur CPU. Disabling this option on other types of CPUs
475 makes the kernel a tiny bit smaller. Disabling it on a Centaur
476 CPU might render the kernel unbootable.
477
478 If unsure, say N.
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479
480config CPU_SUP_TRANSMETA_32
481 default y
482 bool "Support Transmeta processors" if PROCESSOR_SELECT
483 depends on !64BIT
8f9ca475 484 ---help---
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485 This enables detection, tunings and quirks for Transmeta processors
486
487 You need this enabled if you want your kernel to run on a
488 Transmeta CPU. Disabling this option on other types of CPUs
489 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
490 CPU might render the kernel unbootable.
491
492 If unsure, say N.
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493
494config CPU_SUP_UMC_32
495 default y
496 bool "Support UMC processors" if PROCESSOR_SELECT
0d2bf489 497 depends on M386 || M486 || (EXPERT && !64BIT)
8f9ca475 498 ---help---
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499 This enables detection, tunings and quirks for UMC processors
500
501 You need this enabled if you want your kernel to run on a
502 UMC CPU. Disabling this option on other types of CPUs
503 makes the kernel a tiny bit smaller. Disabling it on a UMC
504 CPU might render the kernel unbootable.
505
506 If unsure, say N.