Merge tag 'pm-6.16-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
[linux-2.6-block.git] / arch / x86 / Kconfig
CommitLineData
b2441318 1# SPDX-License-Identifier: GPL-2.0
daa93fab
SR
2# Select 32 or 64 bit
3config 64BIT
104daea1
MY
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
5 default "$(ARCH)" != "i386"
a7f7f624 6 help
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SR
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
9
10config X86_32
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JB
11 def_bool y
12 depends on !64BIT
341c787e
IM
13 # Options that are inherently 32-bit kernel only:
14 select ARCH_WANT_IPC_PARSE_VERSION
15 select CLKSRC_I8253
16 select CLONE_BACKWARDS
157e118b 17 select GENERIC_VDSO_32
117ed454 18 select HAVE_DEBUG_STACKOVERFLOW
157e118b 19 select KMAP_LOCAL
341c787e
IM
20 select MODULES_USE_ELF_REL
21 select OLD_SIGACTION
2ca408d9 22 select ARCH_SPLIT_ARG64
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SR
23
24config X86_64
3120e25e
JB
25 def_bool y
26 depends on 64BIT
d94e0685 27 # Options that are inherently 64-bit kernel only:
4eb0716e 28 select ARCH_HAS_GIGANTIC_PAGE
f9aad622 29 select ARCH_HAS_PTDUMP
3049def1 30 select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS
c12d3362 31 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
0bff0aae 32 select ARCH_SUPPORTS_PER_VMA_LOCK
75182022 33 select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE
d94e0685
IM
34 select HAVE_ARCH_SOFT_DIRTY
35 select MODULES_USE_ELF_RELA
f616ab59 36 select NEED_DMA_MAP_STATE
09230cbc 37 select SWIOTLB
7facdc42 38 select ARCH_HAS_ELFCORE_COMPAT
63703f37 39 select ZONE_DMA32
14e56fb2 40 select EXECMEM if DYNAMIC_FTRACE
b9020bdb 41 select ACPI_MRRM if ACPI
1032c0ba 42
518049d9
SRV
43config FORCE_DYNAMIC_FTRACE
44 def_bool y
45 depends on X86_32
46 depends on FUNCTION_TRACER
47 select DYNAMIC_FTRACE
48 help
758cd94a
JH
49 We keep the static function tracing (!DYNAMIC_FTRACE) around
50 in order to test the non static function tracing in the
51 generic code, as other architectures still use it. But we
52 only need to keep it around for x86_64. No need to keep it
53 for x86_32. For x86_32, force DYNAMIC_FTRACE.
d94e0685
IM
54#
55# Arch settings
56#
57# ( Note that options that are marked 'if X86_64' could in principle be
58# ported to 32-bit as well. )
59#
8d5fffb9 60config X86
3c2362e6 61 def_bool y
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IM
62 #
63 # Note: keep this list sorted alphabetically
64 #
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IM
65 select ACPI_LEGACY_TABLES_LOOKUP if ACPI
66 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
a02f66bb 67 select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU
942fa985 68 select ARCH_32BIT_OFF_T if X86_32
2a21ad57 69 select ARCH_CLOCKSOURCE_INIT
fe42754b 70 select ARCH_CONFIGURES_CPU_MITIGATIONS
1f6d3a8f 71 select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE
1e866974 72 select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION
5c11f00b 73 select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64
91024b3c 74 select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
cebc774f 75 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE)
1e866974 76 select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE
c763ea26 77 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
c2280be8 78 select ARCH_HAS_CACHE_LINE_SIZE
1156b441 79 select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
7c7077a7 80 select ARCH_HAS_CPU_FINALIZE_INIT
8f23f5db 81 select ARCH_HAS_CPU_PASID if IOMMU_SVA
55d1ecce 82 select ARCH_HAS_CRC32
4ffd5086 83 select ARCH_HAS_CRC64 if X86_64
dbdda1fd 84 select ARCH_HAS_CRC_T10DIF
2792d84e 85 select ARCH_HAS_CURRENT_STACK_POINTER
fa5b6ec9 86 select ARCH_HAS_DEBUG_VIRTUAL
399145f9 87 select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE
21266be9 88 select ARCH_HAS_DEVMEM_IS_ALLOWED
de6c85bf 89 select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN
b1a57bbf 90 select ARCH_HAS_EARLY_DEBUG if KGDB
6471b825 91 select ARCH_HAS_ELF_RANDOMIZE
47410d83 92 select ARCH_HAS_EXECMEM_ROX if X86_64 && STRICT_MODULE_RWX
72d93104 93 select ARCH_HAS_FAST_MULTIPLIER
6974f0c4 94 select ARCH_HAS_FORTIFY_SOURCE
957e3fac 95 select ARCH_HAS_GCOV_PROFILE_ALL
bece04b5 96 select ARCH_HAS_KCOV if X86_64
b0b8a15b 97 select ARCH_HAS_KERNEL_FPU_SUPPORT
0c9c1d56 98 select ARCH_HAS_MEM_ENCRYPT
10bcc80e 99 select ARCH_HAS_MEMBARRIER_SYNC_CORE
49f88c70 100 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
0ebeea8c 101 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
c763ea26 102 select ARCH_HAS_PMEM_API if X86_64
476e8583 103 select ARCH_HAS_PREEMPT_LAZY
17596731 104 select ARCH_HAS_PTE_DEVMAP if X86_64
3010a5ea 105 select ARCH_HAS_PTE_SPECIAL
71ce1ab5 106 select ARCH_HAS_HW_PTE_YOUNG
eed9a328 107 select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2
0aed55af 108 select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64
ec6347bb 109 select ARCH_HAS_COPY_MC if X86_64
d2852a22 110 select ARCH_HAS_SET_MEMORY
d253ca0c 111 select ARCH_HAS_SET_DIRECT_MAP
ad21fc4f
LA
112 select ARCH_HAS_STRICT_KERNEL_RWX
113 select ARCH_HAS_STRICT_MODULE_RWX
ac1ab12a 114 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE
25c619e5 115 select ARCH_HAS_SYSCALL_WRAPPER
918327e9 116 select ARCH_HAS_UBSAN
7e01ccb4 117 select ARCH_HAS_DEBUG_WX
63703f37 118 select ARCH_HAS_ZONE_DMA_SET if EXPERT
6471b825 119 select ARCH_HAVE_NMI_SAFE_CMPXCHG
ba386777 120 select ARCH_HAVE_EXTRA_ELF_NOTES
04d5ea46 121 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE
6471b825 122 select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI
77fbbc81 123 select ARCH_MIGHT_HAVE_PC_PARPORT
5e2c18c0 124 select ARCH_MIGHT_HAVE_PC_SERIO
3599fe12 125 select ARCH_STACKWALK
2c870e61 126 select ARCH_SUPPORTS_ACPI
6471b825 127 select ARCH_SUPPORTS_ATOMIC_RMW
5d6ad668 128 select ARCH_SUPPORTS_DEBUG_PAGEALLOC
d283d422 129 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64
6471b825 130 select ARCH_SUPPORTS_NUMA_BALANCING if X86_64
14df3267 131 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096
3c516f89
ST
132 select ARCH_SUPPORTS_CFI_CLANG if X86_64
133 select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG
583bfd48
NC
134 select ARCH_SUPPORTS_LTO_CLANG
135 select ARCH_SUPPORTS_LTO_CLANG_THIN
d2d6422f 136 select ARCH_SUPPORTS_RT
315ad878 137 select ARCH_SUPPORTS_AUTOFDO_CLANG
d5dc9583 138 select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64
6471b825 139 select ARCH_USE_BUILTIN_BSWAP
909639aa 140 select ARCH_USE_CMPXCHG_LOCKREF if X86_CX8
dce44566 141 select ARCH_USE_MEMTEST
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IM
142 select ARCH_USE_QUEUED_RWLOCKS
143 select ARCH_USE_QUEUED_SPINLOCKS
2ce0d7f9 144 select ARCH_USE_SYM_ANNOTATIONS
ce4a4e56 145 select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
81c22041 146 select ARCH_WANT_DEFAULT_BPF_JIT if X86_64
c763ea26 147 select ARCH_WANTS_DYNAMIC_TASK_STRUCT
51c2ee6d 148 select ARCH_WANTS_NO_INSTR
07431506 149 select ARCH_WANT_GENERAL_HUGETLB
3876d4a3 150 select ARCH_WANT_HUGE_PMD_SHARE
59612b24 151 select ARCH_WANT_LD_ORPHAN_WARN
0b6f1582
AK
152 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64
153 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64
08efe293 154 select ARCH_WANT_HUGETLB_VMEMMAP_PREINIT if X86_64
38d8b4e6 155 select ARCH_WANTS_THP_SWAP if X86_64
b5f06f64 156 select ARCH_HAS_PARANOID_L1D_FLUSH
af896715 157 select ARCH_WANT_IRQS_OFF_ACTIVATE_MM
10916706 158 select BUILDTIME_TABLE_SORT
6471b825 159 select CLKEVT_I8253
6471b825 160 select CLOCKSOURCE_WATCHDOG
7cf8f44a
AP
161 # Word-size accesses may read uninitialized data past the trailing \0
162 # in strings and cause false KMSAN reports.
163 select DCACHE_WORD_ACCESS if !KMSAN
3aac3ebe 164 select DYNAMIC_SIGFRAME
45471cd9
LT
165 select EDAC_ATOMIC_SCRUB
166 select EDAC_SUPPORT
6471b825 167 select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC)
cb81deef 168 select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST
6471b825
IM
169 select GENERIC_CLOCKEVENTS_MIN_ADJUST
170 select GENERIC_CMOS_UPDATE
171 select GENERIC_CPU_AUTOPROBE
5b95f94c 172 select GENERIC_CPU_DEVICES
61dc0f55 173 select GENERIC_CPU_VULNERABILITIES
5b7c73e0 174 select GENERIC_EARLY_IOREMAP
27d6b4d1 175 select GENERIC_ENTRY
6471b825 176 select GENERIC_IOMAP
c7d6c9dd 177 select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
0fa115da 178 select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC
ad7a929f 179 select GENERIC_IRQ_MIGRATION if SMP
6471b825 180 select GENERIC_IRQ_PROBE
c201c917 181 select GENERIC_IRQ_RESERVATION_MODE
6471b825
IM
182 select GENERIC_IRQ_SHOW
183 select GENERIC_PENDING_IRQ if SMP
184 select GENERIC_SMP_IDLE_THREAD
6471b825 185 select GENERIC_TIME_VSYSCALL
7ac87074 186 select GENERIC_GETTIMEOFDAY
dafde296 187 select GENERIC_VDSO_DATA_STORE
550a77a7 188 select GENERIC_VDSO_TIME_NS
7e90ffb7 189 select GENERIC_VDSO_OVERFLOW_PROTECT
6ca297d4 190 select GUP_GET_PXX_LOW_HIGH if X86_PAE
17e5888e 191 select HARDIRQS_SW_RESEND
7edaeb68 192 select HARDLOCKUP_CHECK_TIMESTAMP if X86_64
fcbfe812 193 select HAS_IOPORT
6471b825
IM
194 select HAVE_ACPI_APEI if ACPI
195 select HAVE_ACPI_APEI_NMI if ACPI
2a19be61 196 select HAVE_ALIGNED_STRUCT_PAGE
6471b825
IM
197 select HAVE_ARCH_AUDITSYSCALL
198 select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE
eed1fcee 199 select HAVE_ARCH_HUGE_VMALLOC if X86_64
6471b825 200 select HAVE_ARCH_JUMP_LABEL
b34006c4 201 select HAVE_ARCH_JUMP_LABEL_RELATIVE
d17a1d97 202 select HAVE_ARCH_KASAN if X86_64
0609ae01 203 select HAVE_ARCH_KASAN_VMALLOC if X86_64
1dc0da6e 204 select HAVE_ARCH_KFENCE
4ca8cc8d 205 select HAVE_ARCH_KMSAN if X86_64
6471b825 206 select HAVE_ARCH_KGDB
9e08f57d
DC
207 select HAVE_ARCH_MMAP_RND_BITS if MMU
208 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
1b028f78 209 select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT
271ca788 210 select HAVE_ARCH_PREL32_RELOCATIONS
6471b825 211 select HAVE_ARCH_SECCOMP_FILTER
f7d83c1c 212 select HAVE_ARCH_THREAD_STRUCT_WHITELIST
afaef01c 213 select HAVE_ARCH_STACKLEAK
6471b825
IM
214 select HAVE_ARCH_TRACEHOOK
215 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
a00cc7d9 216 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64
b64d8d1e 217 select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD
7677f7fd 218 select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD
e37e43a4 219 select HAVE_ARCH_VMAP_STACK if X86_64
fe950f60 220 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
c763ea26 221 select HAVE_ARCH_WITHIN_STACK_FRAMES
2ff2b7ec 222 select HAVE_ASM_MODVERSIONS
6471b825
IM
223 select HAVE_CMPXCHG_DOUBLE
224 select HAVE_CMPXCHG_LOCAL
24a9c541
FW
225 select HAVE_CONTEXT_TRACKING_USER if X86_64
226 select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER
cf4db259 227 select HAVE_C_RECORDMCOUNT
03f16cd0 228 select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL
280981d6 229 select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT
4ed308c4 230 select HAVE_BUILDTIME_MCOUNT_SORT
6471b825 231 select HAVE_DEBUG_KMEMLEAK
6471b825 232 select HAVE_DMA_CONTIGUOUS
677aa9f7 233 select HAVE_DYNAMIC_FTRACE
06aeaaea 234 select HAVE_DYNAMIC_FTRACE_WITH_REGS
02a474ca 235 select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64
762abbc0 236 select HAVE_FTRACE_REGS_HAVING_PT_REGS if X86_64
562955fe 237 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
c316eb44 238 select HAVE_SAMPLE_FTRACE_DIRECT if X86_64
503e4510 239 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64
03f5781b 240 select HAVE_EBPF_JIT
58340a07 241 select HAVE_EFFICIENT_UNALIGNED_ACCESS
976ba8da 242 select HAVE_EISA if X86_32
5f56a5df 243 select HAVE_EXIT_THREAD
25176ad0 244 select HAVE_GUP_FAST
644e0e8d 245 select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE
a762e926 246 select HAVE_FTRACE_GRAPH_FUNC if HAVE_FUNCTION_GRAPH_TRACER
6471b825 247 select HAVE_FTRACE_MCOUNT_RECORD
a3ed4157 248 select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER
4a30e4c9 249 select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE)
6471b825 250 select HAVE_FUNCTION_TRACER
6b90bd4b 251 select HAVE_GCC_PLUGINS
6471b825 252 select HAVE_HW_BREAKPOINT
6471b825 253 select HAVE_IOREMAP_PROT
624db9ea 254 select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64
6471b825 255 select HAVE_IRQ_TIME_ACCOUNTING
4ab7674f 256 select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL
2e9f3bdd 257 select HAVE_KERNEL_BZIP2
6471b825
IM
258 select HAVE_KERNEL_GZIP
259 select HAVE_KERNEL_LZ4
2e9f3bdd 260 select HAVE_KERNEL_LZMA
13510997 261 select HAVE_KERNEL_LZO
6471b825 262 select HAVE_KERNEL_XZ
fb46d057 263 select HAVE_KERNEL_ZSTD
6471b825
IM
264 select HAVE_KPROBES
265 select HAVE_KPROBES_ON_FTRACE
540adea3 266 select HAVE_FUNCTION_ERROR_INJECTION
6471b825 267 select HAVE_KRETPROBES
f3a112c0 268 select HAVE_RETHOOK
6471b825 269 select HAVE_LIVEPATCH if X86_64
0102752e 270 select HAVE_MIXED_BREAKPOINTS_REGS
ee9f8fce 271 select HAVE_MOD_ARCH_SPECIFIC
9f132f7e 272 select HAVE_MOVE_PMD
be37c98d 273 select HAVE_MOVE_PUD
22102f45 274 select HAVE_NOINSTR_HACK if HAVE_OBJTOOL
42a0bb3f 275 select HAVE_NMI
489e355b 276 select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL
03f16cd0 277 select HAVE_OBJTOOL if X86_64
6471b825 278 select HAVE_OPTPROBES
5394f1e9 279 select HAVE_PAGE_SIZE_4KB
6471b825
IM
280 select HAVE_PCSPKR_PLATFORM
281 select HAVE_PERF_EVENTS
c01d4323 282 select HAVE_PERF_EVENTS_NMI
92e5aae4 283 select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
eb01d42a 284 select HAVE_PCI
c5e63197 285 select HAVE_PERF_REGS
c5ebcedb 286 select HAVE_PERF_USER_STACK_DUMP
a3725973 287 select MMU_GATHER_RCU_TABLE_FREE
1e9fdf21 288 select MMU_GATHER_MERGE_VMAS
00998085 289 select HAVE_POSIX_CPU_TIMERS_TASK_WORK
6471b825 290 select HAVE_REGS_AND_STACK_ACCESS_API
03f16cd0 291 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION
3c88ee19 292 select HAVE_FUNCTION_ARG_ACCESS_API
7ecd19cf 293 select HAVE_SETUP_PER_CPU_AREA
cd1a41ce 294 select HAVE_SOFTIRQ_ON_OWN_STACK
0ee2689b 295 select HAVE_STACKPROTECTOR
03f16cd0 296 select HAVE_STACK_VALIDATION if HAVE_OBJTOOL
e6d6c071 297 select HAVE_STATIC_CALL
03f16cd0 298 select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL
99cf983c 299 select HAVE_PREEMPT_DYNAMIC_CALL
d6761b8f 300 select HAVE_RSEQ
09498135 301 select HAVE_RUST if X86_64
6471b825 302 select HAVE_SYSCALL_TRACEPOINTS
5f3da8c0 303 select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL
6471b825 304 select HAVE_UNSTABLE_SCHED_CLOCK
7c68af6e 305 select HAVE_USER_RETURN_NOTIFIER
7ac87074 306 select HAVE_GENERIC_VDSO
33385150 307 select VDSO_GETRANDOM if X86_64
0c7ffa32 308 select HOTPLUG_PARALLEL if SMP && X86_64
05736e4a 309 select HOTPLUG_SMT if SMP
0c7ffa32 310 select HOTPLUG_SPLIT_STARTUP if SMP && X86_32
c0185808 311 select IRQ_FORCED_THREADING
c2508ec5 312 select LOCK_MM_AND_FIND_VMA
7ecd19cf
KW
313 select NEED_PER_CPU_EMBED_FIRST_CHUNK
314 select NEED_PER_CPU_PAGE_FIRST_CHUNK
86596f0a 315 select NEED_SG_DMA_LENGTH
87482708 316 select NUMA_MEMBLKS if NUMA
2eac9c2d 317 select PCI_DOMAINS if PCI
625210cf 318 select PCI_LOCKLESS_CONFIG if PCI
6471b825 319 select PERF_EVENTS
3195ef59 320 select RTC_LIB
d6faca40 321 select RTC_MC146818_LIB
6471b825 322 select SPARSE_IRQ
6471b825 323 select SYSCTL_EXCEPTION_TRACE
15f4eae7 324 select THREAD_INFO_IN_TASK
4aae683f 325 select TRACE_IRQFLAGS_SUPPORT
4510bffb 326 select TRACE_IRQFLAGS_NMI_SUPPORT
6471b825 327 select USER_STACKTRACE_SUPPORT
3b02a051 328 select HAVE_ARCH_KCSAN if X86_64
0c608dad 329 select PROC_PID_ARCH_STATUS if PROC_FS
50468e43 330 select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX
d49a0626
PZ
331 select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16
332 select FUNCTION_ALIGNMENT_4B
9e2b4be3 333 imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI
ceea991a 334 select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
4817f70c 335 select ARCH_SUPPORTS_PT_RECLAIM if X86_64
7d8330a5 336
ba7e4d13 337config INSTRUCTION_DECODER
3120e25e
JB
338 def_bool y
339 depends on KPROBES || PERF_EVENTS || UPROBES
ba7e4d13 340
51b26ada
LT
341config OUTPUT_FORMAT
342 string
343 default "elf32-i386" if X86_32
344 default "elf64-x86-64" if X86_64
345
8d5fffb9 346config LOCKDEP_SUPPORT
3c2362e6 347 def_bool y
8d5fffb9
SR
348
349config STACKTRACE_SUPPORT
3c2362e6 350 def_bool y
8d5fffb9 351
8d5fffb9 352config MMU
3c2362e6 353 def_bool y
8d5fffb9 354
9e08f57d
DC
355config ARCH_MMAP_RND_BITS_MIN
356 default 28 if 64BIT
357 default 8
358
359config ARCH_MMAP_RND_BITS_MAX
360 default 32 if 64BIT
361 default 16
362
363config ARCH_MMAP_RND_COMPAT_BITS_MIN
364 default 8
365
366config ARCH_MMAP_RND_COMPAT_BITS_MAX
367 default 16
368
8d5fffb9
SR
369config SBUS
370 bool
371
372config GENERIC_ISA_DMA
3120e25e
JB
373 def_bool y
374 depends on ISA_DMA_API
8d5fffb9 375
d911c67e
AP
376config GENERIC_CSUM
377 bool
378 default y if KMSAN || KASAN
379
8d5fffb9 380config GENERIC_BUG
3c2362e6 381 def_bool y
8d5fffb9 382 depends on BUG
b93a531e
JB
383 select GENERIC_BUG_RELATIVE_POINTERS if X86_64
384
385config GENERIC_BUG_RELATIVE_POINTERS
386 bool
8d5fffb9 387
8d5fffb9 388config ARCH_MAY_HAVE_PC_FDC
3120e25e
JB
389 def_bool y
390 depends on ISA_DMA_API
8d5fffb9 391
1032c0ba
SR
392config GENERIC_CALIBRATE_DELAY
393 def_bool y
394
9a0b8415 395config ARCH_HAS_CPU_RELAX
396 def_bool y
397
801e4062
JB
398config ARCH_HIBERNATION_POSSIBLE
399 def_bool y
801e4062 400
f4cb5700
JB
401config ARCH_SUSPEND_POSSIBLE
402 def_bool y
f4cb5700 403
8d5fffb9 404config AUDIT_ARCH
e0fd24a3 405 def_bool y if X86_64
8d5fffb9 406
d6f2d75a
AR
407config KASAN_SHADOW_OFFSET
408 hex
409 depends on KASAN
410 default 0xdffffc0000000000
411
69575d38
SW
412config HAVE_INTEL_TXT
413 def_bool y
6ea30386 414 depends on INTEL_IOMMU && ACPI
69575d38 415
6b0c3d44
SR
416config X86_64_SMP
417 def_bool y
418 depends on X86_64 && SMP
419
2b144498
SD
420config ARCH_SUPPORTS_UPROBES
421 def_bool y
422
d20642f0
RH
423config FIX_EARLYCON_MEM
424 def_bool y
425
94d49eb3
KS
426config DYNAMIC_PHYSICAL_MASK
427 bool
428
98233368
KS
429config PGTABLE_LEVELS
430 int
7212b58d 431 default 5 if X86_64
98233368
KS
432 default 3 if X86_PAE
433 default 2
434
506f1d07
SR
435menu "Processor type and features"
436
506f1d07
SR
437config SMP
438 bool "Symmetric multi-processing support"
a7f7f624 439 help
506f1d07 440 This enables support for systems with more than one CPU. If you have
4a474157
RG
441 a system with only one CPU, say N. If you have a system with more
442 than one CPU, say Y.
506f1d07 443
4a474157 444 If you say N here, the kernel will run on uni- and multiprocessor
506f1d07
SR
445 machines, but will use only one CPU of a multiprocessor machine. If
446 you say Y here, the kernel will run on many, but not all,
4a474157 447 uniprocessor machines. On a uniprocessor machine, the kernel
506f1d07
SR
448 will run faster if you say N here.
449
450 Note that if you say Y here and choose architecture "586" or
451 "Pentium" under "Processor family", the kernel will not work on 486
452 architectures. Similarly, multiprocessor kernels for the "PPro"
453 architecture may not work on all Pentium based boards.
454
455 People using multiprocessor machines who say Y here should also say
456 Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
457 Management" code will be disabled if you say Y here.
458
ff61f079 459 See also <file:Documentation/arch/x86/i386/IO-APIC.rst>,
4f4cfa6c 460 <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
506f1d07
SR
461 <http://www.tldp.org/docs.html#howto>.
462
463 If you don't know what to do here, say N.
464
06cd9a7d 465config X86_X2APIC
9232c49f 466 bool "x2APIC interrupt controller architecture support"
19e3d60d 467 depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
9232c49f 468 default y
a7f7f624 469 help
9232c49f
MJ
470 x2APIC is an interrupt controller architecture, a component of which
471 (the local APIC) is present in the CPU. It allows faster access to
472 the local APIC and supports a larger number of CPUs in the system
473 than the predecessors.
06cd9a7d 474
9232c49f
MJ
475 x2APIC was introduced in Intel CPUs around 2008 and in AMD EPYC CPUs
476 in 2019, but it can be disabled by the BIOS. It is also frequently
477 emulated in virtual machines, even when the host CPU does not support
478 it. Support in the CPU can be checked by executing
99bb1bd8 479 grep x2apic /proc/cpuinfo
06cd9a7d 480
99bb1bd8
MJ
481 If this configuration option is disabled, the kernel will boot with
482 very reduced functionality and performance on some platforms that
483 have x2APIC enabled. On the other hand, on hardware that does not
484 support x2APIC, a kernel with this option enabled will just fallback
485 to older APIC implementations.
b8d1d163 486
99bb1bd8 487 If in doubt, say Y.
06cd9a7d 488
7fec07fd
JP
489config X86_POSTED_MSI
490 bool "Enable MSI and MSI-x delivery by posted interrupts"
491 depends on X86_64 && IRQ_REMAP
492 help
493 This enables MSIs that are under interrupt remapping to be delivered as
494 posted interrupts to the host kernel. Interrupt throughput can
495 potentially be improved by coalescing CPU notifications during high
496 frequency bursts.
b8d1d163 497
06cd9a7d
YL
498 If you don't know what to do here, say N.
499
6695c85b 500config X86_MPPARSE
4590d98f 501 bool "Enable MPS table" if ACPI
7a527688 502 default y
5ab74722 503 depends on X86_LOCAL_APIC
a7f7f624 504 help
6695c85b
YL
505 For old smp systems that do not have proper acpi support. Newer systems
506 (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
6695c85b 507
e6d42931
JW
508config X86_CPU_RESCTRL
509 bool "x86 CPU resource control support"
6fe07ce3 510 depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD)
bff70402
JM
511 depends on MISC_FILESYSTEMS
512 select ARCH_HAS_CPU_RESCTRL
513 select RESCTRL_FS
70288405 514 select RESCTRL_FS_PSEUDO_LOCK
78e99b4a 515 help
e6d42931 516 Enable x86 CPU resource control support.
6fe07ce3
BM
517
518 Provide support for the allocation and monitoring of system resources
519 usage by the CPU.
520
521 Intel calls this Intel Resource Director Technology
522 (Intel(R) RDT). More information about RDT can be found in the
523 Intel x86 Architecture Software Developer Manual.
524
525 AMD calls this AMD Platform Quality of Service (AMD QoS).
526 More information about AMD QoS can be found in the AMD64 Technology
527 Platform Quality of Service Extensions manual.
78e99b4a
FY
528
529 Say N if unsure.
530
2cce9591
PAI
531config X86_FRED
532 bool "Flexible Return and Event Delivery"
533 depends on X86_64
534 help
535 When enabled, try to use Flexible Return and Event Delivery
536 instead of the legacy SYSCALL/SYSENTER/IDT architecture for
537 ring transitions and exception/interrupt handling if the
3c41786c 538 system supports it.
2cce9591 539
c5c606d9
RT
540config X86_EXTENDED_PLATFORM
541 bool "Support for extended (non-PC) x86 platforms"
542 default y
a7f7f624 543 help
06ac8346
IM
544 If you disable this option then the kernel will only support
545 standard PC platforms. (which covers the vast majority of
546 systems out there.)
547
8425091f 548 If you enable this option then you'll be able to select support
71d99ea4
MY
549 for the following non-PC x86 platforms, depending on the value of
550 CONFIG_64BIT.
551
552 32-bit platforms (CONFIG_64BIT=n):
4047e877
MJ
553 Goldfish (mostly Android emulator)
554 Intel CE media processor (CE4100) SoC
4047e877 555 Intel Quark
8425091f 556 RDC R-321x SoC
06ac8346 557
71d99ea4 558 64-bit platforms (CONFIG_64BIT=y):
44b111b5 559 Numascale NumaChip
8425091f
RT
560 ScaleMP vSMP
561 SGI Ultraviolet
ca5955dd 562 Merrifield/Moorefield MID devices
4047e877 563 Goldfish (mostly Android emulator)
8425091f
RT
564
565 If you have one of these systems, or if you want to build a
566 generic distribution kernel, say Y here - otherwise say N.
71d99ea4 567
c5c606d9
RT
568# This is an alphabetically sorted list of 64 bit extended platforms
569# Please maintain the alphabetic order if and when there are additions
44b111b5
SP
570config X86_NUMACHIP
571 bool "Numascale NumaChip"
572 depends on X86_64
573 depends on X86_EXTENDED_PLATFORM
574 depends on NUMA
575 depends on SMP
576 depends on X86_X2APIC
f9726bfd 577 depends on PCI_MMCONFIG
a7f7f624 578 help
44b111b5
SP
579 Adds support for Numascale NumaChip large-SMP systems. Needed to
580 enable more than ~168 cores.
581 If you don't have one of these, you should say N here.
506f1d07 582
c5c606d9
RT
583config X86_VSMP
584 bool "ScaleMP vSMP"
6276a074 585 select HYPERVISOR_GUEST
c5c606d9
RT
586 select PARAVIRT
587 depends on X86_64 && PCI
588 depends on X86_EXTENDED_PLATFORM
ead91d4b 589 depends on SMP
a7f7f624 590 help
c5c606d9
RT
591 Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
592 supposed to run on these EM64T-based machines. Only choose this option
593 if you have one of these machines.
5e3a77e9 594
03b48632
NP
595config X86_UV
596 bool "SGI Ultraviolet"
597 depends on X86_64
c5c606d9 598 depends on X86_EXTENDED_PLATFORM
54c28d29 599 depends on NUMA
1ecb4ae5 600 depends on EFI
c2209ea5 601 depends on KEXEC_CORE
9d6c26e7 602 depends on X86_X2APIC
1222e564 603 depends on PCI
a7f7f624 604 help
03b48632
NP
605 This option is needed in order to support SGI Ultraviolet systems.
606 If you don't have one of these, you should say N here.
607
ca5955dd
AB
608config X86_INTEL_MID
609 bool "Intel Z34xx/Z35xx MID platform support"
610 depends on X86_EXTENDED_PLATFORM
611 depends on X86_PLATFORM_DEVICES
612 depends on PCI
613 depends on X86_64 || (EXPERT && PCI_GOANY)
614 depends on X86_IO_APIC
615 select I2C
616 select DW_APB_TIMER
617 select INTEL_SCU_PCI
618 help
619 Select to build a kernel capable of supporting 64-bit Intel MID
620 (Mobile Internet Device) platform systems which do not have
621 the PCI legacy interfaces.
622
623 The only supported devices are the 22nm Merrified (Z34xx)
624 and Moorefield (Z35xx) SoC used in the Intel Edison board and
625 a small number of Android devices such as the Asus Zenfone 2,
626 Asus FonePad 8 and Dell Venue 7.
627
628 If you are building for a PC class system or non-MID tablet
629 SoCs like Bay Trail (Z36xx/Z37xx), say N here.
630
631 Intel MID platforms are based on an Intel processor and chipset which
632 consume less power than most of the x86 derivatives.
506f1d07 633
ddd70cf9 634config X86_GOLDFISH
b03b016f
KK
635 bool "Goldfish (Virtual Platform)"
636 depends on X86_EXTENDED_PLATFORM
a7f7f624 637 help
758cd94a
JH
638 Enable support for the Goldfish virtual platform used primarily
639 for Android development. Unless you are building for the Android
640 Goldfish emulator say N here.
ddd70cf9 641
ca5955dd
AB
642# Following is an alphabetically sorted list of 32 bit extended platforms
643# Please maintain the alphabetic order if and when there are additions
644
c751e17b
TG
645config X86_INTEL_CE
646 bool "CE4100 TV platform"
647 depends on PCI
648 depends on PCI_GODIRECT
6084a6e2 649 depends on X86_IO_APIC
c751e17b
TG
650 depends on X86_32
651 depends on X86_EXTENDED_PLATFORM
37bc9f50 652 select X86_REBOOTFIXUPS
da6b737b
SAS
653 select OF
654 select OF_EARLY_FLATTREE
a7f7f624 655 help
c751e17b
TG
656 Select for the Intel CE media processor (CE4100) SOC.
657 This option compiles in support for the CE4100 SOC for settop
658 boxes and media devices.
659
8bbc2a13
BD
660config X86_INTEL_QUARK
661 bool "Intel Quark platform support"
662 depends on X86_32
663 depends on X86_EXTENDED_PLATFORM
664 depends on X86_PLATFORM_DEVICES
665 depends on X86_TSC
666 depends on PCI
667 depends on PCI_GOANY
668 depends on X86_IO_APIC
669 select IOSF_MBI
670 select INTEL_IMR
9ab6eb51 671 select COMMON_CLK
a7f7f624 672 help
8bbc2a13
BD
673 Select to include support for Quark X1000 SoC.
674 Say Y here if you have a Quark based system such as the Arduino
675 compatible Intel Galileo.
676
e35e328d
MJ
677config X86_RDC321X
678 bool "RDC R-321x SoC"
679 depends on X86_32
680 depends on X86_EXTENDED_PLATFORM
681 select M486
682 select X86_REBOOTFIXUPS
683 help
684 This option is needed for RDC R-321x system-on-chip, also known
685 as R-8610-(G).
686 If you don't have one of these chips, you should say N here.
687
3d48aab1
MW
688config X86_INTEL_LPSS
689 bool "Intel Low Power Subsystem Support"
5962dd22 690 depends on X86 && ACPI && PCI
3d48aab1 691 select COMMON_CLK
0f531431 692 select PINCTRL
eebb3e8d 693 select IOSF_MBI
a7f7f624 694 help
3d48aab1
MW
695 Select to build support for Intel Low Power Subsystem such as
696 found on Intel Lynxpoint PCH. Selecting this option enables
0f531431
MN
697 things like clock tree (common clock framework) and pincontrol
698 which are needed by the LPSS peripheral drivers.
3d48aab1 699
92082a88
KX
700config X86_AMD_PLATFORM_DEVICE
701 bool "AMD ACPI2Platform devices support"
702 depends on ACPI
703 select COMMON_CLK
704 select PINCTRL
a7f7f624 705 help
92082a88
KX
706 Select to interpret AMD specific ACPI device to platform device
707 such as I2C, UART, GPIO found on AMD Carrizo and later chipsets.
708 I2C and UART depend on COMMON_CLK to set clock. GPIO driver is
709 implemented under PINCTRL subsystem.
710
ced3ce76
DB
711config IOSF_MBI
712 tristate "Intel SoC IOSF Sideband support for SoC platforms"
713 depends on PCI
a7f7f624 714 help
ced3ce76
DB
715 This option enables sideband register access support for Intel SoC
716 platforms. On these platforms the IOSF sideband is used in lieu of
717 MSR's for some register accesses, mostly but not limited to thermal
718 and power. Drivers may query the availability of this device to
719 determine if they need the sideband in order to work on these
720 platforms. The sideband is available on the following SoC products.
721 This list is not meant to be exclusive.
722 - BayTrail
723 - Braswell
724 - Quark
725
726 You should say Y if you are running a kernel on one of these SoC's.
727
ed2226bd
DB
728config IOSF_MBI_DEBUG
729 bool "Enable IOSF sideband access through debugfs"
730 depends on IOSF_MBI && DEBUG_FS
a7f7f624 731 help
ed2226bd
DB
732 Select this option to expose the IOSF sideband access registers (MCR,
733 MDR, MCRX) through debugfs to write and read register information from
734 different units on the SoC. This is most useful for obtaining device
735 state information for debug and analysis. As this is a general access
736 mechanism, users of this option would have specific knowledge of the
737 device they want to access.
738
739 If you don't require the option or are in doubt, say N.
740
d949f36f 741config X86_SUPPORTS_MEMORY_FAILURE
6fc108a0 742 def_bool y
d949f36f
LT
743 # MCE code calls memory_failure():
744 depends on X86_MCE
745 # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
d949f36f
LT
746 # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
747 depends on X86_64 || !SPARSEMEM
748 select ARCH_SUPPORTS_MEMORY_FAILURE
d949f36f 749
82148d1d
S
750config X86_32_IRIS
751 tristate "Eurobraille/Iris poweroff module"
752 depends on X86_32
a7f7f624 753 help
82148d1d
S
754 The Iris machines from EuroBraille do not have APM or ACPI support
755 to shut themselves down properly. A special I/O sequence is
756 needed to do so, which is what this module does at
757 kernel shutdown.
758
759 This is only for Iris machines from EuroBraille.
760
761 If unused, say N.
762
ae1e9130 763config SCHED_OMIT_FRAME_POINTER
3c2362e6
HH
764 def_bool y
765 prompt "Single-depth WCHAN output"
a87d0914 766 depends on X86
a7f7f624 767 help
506f1d07
SR
768 Calculate simpler /proc/<PID>/wchan values. If this option
769 is disabled then wchan values will recurse back to the
770 caller function. This provides more accurate wchan values,
771 at the expense of slightly more scheduling overhead.
772
773 If in doubt, say "Y".
774
6276a074
BP
775menuconfig HYPERVISOR_GUEST
776 bool "Linux guest support"
a7f7f624 777 help
6276a074
BP
778 Say Y here to enable options for running Linux under various hyper-
779 visors. This option enables basic hypervisor detection and platform
780 setup.
506f1d07 781
6276a074
BP
782 If you say N, all options in this submenu will be skipped and
783 disabled, and Linux guest support won't be built in.
506f1d07 784
6276a074 785if HYPERVISOR_GUEST
506f1d07 786
e61bd94a
EPH
787config PARAVIRT
788 bool "Enable paravirtualization code"
a0e2bf7c 789 depends on HAVE_STATIC_CALL
a7f7f624 790 help
e61bd94a
EPH
791 This changes the kernel so it can modify itself when it is run
792 under a hypervisor, potentially improving performance significantly
793 over full virtualization. However, when run without a hypervisor
794 the kernel is theoretically slower and slightly larger.
795
c00a280a
JG
796config PARAVIRT_XXL
797 bool
09230b75 798 depends on X86_64
c00a280a 799
6276a074
BP
800config PARAVIRT_DEBUG
801 bool "paravirt-ops debugging"
802 depends on PARAVIRT && DEBUG_KERNEL
a7f7f624 803 help
6276a074
BP
804 Enable to debug paravirt_ops internals. Specifically, BUG if
805 a paravirt_op is missing when it is called.
806
b4ecc126
JF
807config PARAVIRT_SPINLOCKS
808 bool "Paravirtualization layer for spinlocks"
6ea30386 809 depends on PARAVIRT && SMP
a7f7f624 810 help
b4ecc126
JF
811 Paravirtualized spinlocks allow a pvops backend to replace the
812 spinlock implementation with something virtualization-friendly
813 (for example, block the virtual CPU rather than spinning).
814
4c4e4f61
R
815 It has a minimal impact on native kernels and gives a nice performance
816 benefit on paravirtualized KVM / Xen kernels.
b4ecc126 817
4c4e4f61 818 If you are unsure how to answer this question, answer Y.
b4ecc126 819
ecca2502
ZY
820config X86_HV_CALLBACK_VECTOR
821 def_bool n
822
6276a074 823source "arch/x86/xen/Kconfig"
7af192c9 824
6276a074
BP
825config KVM_GUEST
826 bool "KVM Guest support (including kvmclock)"
827 depends on PARAVIRT
828 select PARAVIRT_CLOCK
a1c4423b 829 select ARCH_CPUIDLE_HALTPOLL
b1d40575 830 select X86_HV_CALLBACK_VECTOR
6276a074 831 default y
a7f7f624 832 help
6276a074
BP
833 This option enables various optimizations for running under the KVM
834 hypervisor. It includes a paravirtualized clock, so that instead
835 of relying on a PIT (or probably other) emulation by the
836 underlying device model, the host provides the guest with
837 timing infrastructure such as time of day, and system time
506f1d07 838
a1c4423b 839config ARCH_CPUIDLE_HALTPOLL
b03b016f
KK
840 def_bool n
841 prompt "Disable host haltpoll when loading haltpoll driver"
842 help
a1c4423b
MT
843 If virtualized under KVM, disable host haltpoll.
844
7733607f
MW
845config PVH
846 bool "Support for running PVH guests"
a7f7f624 847 help
7733607f
MW
848 This option enables the PVH entry point for guest virtual machines
849 as specified in the x86/HVM direct boot ABI.
850
6276a074
BP
851config PARAVIRT_TIME_ACCOUNTING
852 bool "Paravirtual steal time accounting"
853 depends on PARAVIRT
a7f7f624 854 help
6276a074
BP
855 Select this option to enable fine granularity task steal time
856 accounting. Time spent executing other tasks in parallel with
857 the current vCPU is discounted from the vCPU power. To account for
858 that, there can be a small performance impact.
859
860 If in doubt, say N here.
861
862config PARAVIRT_CLOCK
863 bool
97349135 864
4a362601
JK
865config JAILHOUSE_GUEST
866 bool "Jailhouse non-root cell support"
abde587b 867 depends on X86_64 && PCI
87e65d05 868 select X86_PM_TIMER
a7f7f624 869 help
4a362601
JK
870 This option allows to run Linux as guest in a Jailhouse non-root
871 cell. You can leave this option disabled if you only want to start
872 Jailhouse and run Linux afterwards in the root cell.
873
ec7972c9
ZY
874config ACRN_GUEST
875 bool "ACRN Guest support"
876 depends on X86_64
498ad393 877 select X86_HV_CALLBACK_VECTOR
ec7972c9
ZY
878 help
879 This option allows to run Linux as guest in the ACRN hypervisor. ACRN is
880 a flexible, lightweight reference open-source hypervisor, built with
881 real-time and safety-criticality in mind. It is built for embedded
882 IOT with small footprint and real-time features. More details can be
883 found in https://projectacrn.org/.
884
59bd54a8
KS
885config INTEL_TDX_GUEST
886 bool "Intel TDX (Trust Domain Extensions) - Guest Support"
887 depends on X86_64 && CPU_SUP_INTEL
888 depends on X86_X2APIC
75d090fd 889 depends on EFI_STUB
9f98a4f4 890 depends on PARAVIRT
41394e33 891 select ARCH_HAS_CC_PLATFORM
968b4931 892 select X86_MEM_ENCRYPT
77a512e3 893 select X86_MCE
75d090fd 894 select UNACCEPTED_MEMORY
59bd54a8
KS
895 help
896 Support running as a guest under Intel TDX. Without this support,
897 the guest kernel can not boot or run under TDX.
898 TDX includes memory encryption and integrity capabilities
899 which protect the confidentiality and integrity of guest
900 memory contents and CPU state. TDX guests are protected from
901 some attacks from the VMM.
902
758cd94a 903endif # HYPERVISOR_GUEST
97349135 904
506f1d07
SR
905source "arch/x86/Kconfig.cpu"
906
907config HPET_TIMER
3c2362e6 908 def_bool X86_64
506f1d07 909 prompt "HPET Timer Support" if X86_32
a7f7f624 910 help
8f9ca475
IM
911 Use the IA-PC HPET (High Precision Event Timer) to manage
912 time in preference to the PIT and RTC, if a HPET is
913 present.
914 HPET is the next generation timer replacing legacy 8254s.
915 The HPET provides a stable time base on SMP
916 systems, unlike the TSC, but it is more expensive to access,
4e7f9df2
MT
917 as it is off-chip. The interface used is documented
918 in the HPET spec, revision 1.
506f1d07 919
8f9ca475
IM
920 You can safely choose Y here. However, HPET will only be
921 activated if the platform and the BIOS support this feature.
922 Otherwise the 8254 will be used for timing services.
506f1d07 923
8f9ca475 924 Choose N to continue using the legacy 8254 timer.
506f1d07
SR
925
926config HPET_EMULATE_RTC
3c2362e6 927 def_bool y
3228e1dc 928 depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
506f1d07 929
6a108a14 930# Mark as expert because too many people got it wrong.
506f1d07 931# The code disables itself when not needed.
7ae9392c
TP
932config DMI
933 default y
cf074402 934 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
6a108a14 935 bool "Enable DMI scanning" if EXPERT
a7f7f624 936 help
7ae9392c
TP
937 Enabled scanning of DMI to identify machine quirks. Say Y
938 here unless you have verified that your setup is not
939 affected by entries in the DMI blacklist. Required by PNP
940 BIOS code.
941
506f1d07 942config GART_IOMMU
38901f1c 943 bool "Old AMD GART IOMMU support"
a4ce5a48 944 select IOMMU_HELPER
506f1d07 945 select SWIOTLB
23ac4ae8 946 depends on X86_64 && PCI && AMD_NB
a7f7f624 947 help
ced3c42c
IM
948 Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron
949 GART based hardware IOMMUs.
950
951 The GART supports full DMA access for devices with 32-bit access
952 limitations, on systems with more than 3 GB. This is usually needed
953 for USB, sound, many IDE/SATA chipsets and some other devices.
954
955 Newer systems typically have a modern AMD IOMMU, supported via
956 the CONFIG_AMD_IOMMU=y config option.
957
958 In normal configurations this driver is only active when needed:
959 there's more than 3 GB of memory and the system contains a
960 32-bit limited device.
961
962 If unsure, say Y.
506f1d07 963
8b766b0f
MS
964config BOOT_VESA_SUPPORT
965 bool
966 help
967 If true, at least one selected framebuffer driver can take advantage
968 of VESA video modes set at an early boot stage via the vga= parameter.
506f1d07 969
1184dc2f 970config MAXSMP
ddb0c5a6 971 bool "Enable Maximum number of SMP Processors and NUMA Nodes"
6ea30386 972 depends on X86_64 && SMP && DEBUG_KERNEL
36f5101a 973 select CPUMASK_OFFSTACK
a7f7f624 974 help
ddb0c5a6 975 Enable maximum number of CPUS and NUMA Nodes for this architecture.
1184dc2f 976 If unsure, say N.
506f1d07 977
aec6487e
IM
978#
979# The maximum number of CPUs supported:
980#
981# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT,
982# and which can be configured interactively in the
983# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range.
984#
985# The ranges are different on 32-bit and 64-bit kernels, depending on
986# hardware capabilities and scalability features of the kernel.
987#
988# ( If MAXSMP is enabled we just use the highest possible value and disable
989# interactive configuration. )
990#
991
992config NR_CPUS_RANGE_BEGIN
a0d0bb4d 993 int
aec6487e
IM
994 default NR_CPUS_RANGE_END if MAXSMP
995 default 1 if !SMP
996 default 2
a0d0bb4d 997
aec6487e 998config NR_CPUS_RANGE_END
a0d0bb4d 999 int
aec6487e 1000 depends on X86_32
0abf5086 1001 default 8 if SMP
aec6487e 1002 default 1 if !SMP
a0d0bb4d 1003
aec6487e 1004config NR_CPUS_RANGE_END
a0d0bb4d 1005 int
aec6487e 1006 depends on X86_64
1edae1ae
SW
1007 default 8192 if SMP && CPUMASK_OFFSTACK
1008 default 512 if SMP && !CPUMASK_OFFSTACK
aec6487e 1009 default 1 if !SMP
a0d0bb4d 1010
aec6487e 1011config NR_CPUS_DEFAULT
a0d0bb4d
RD
1012 int
1013 depends on X86_32
aec6487e
IM
1014 default 8 if SMP
1015 default 1 if !SMP
a0d0bb4d 1016
aec6487e 1017config NR_CPUS_DEFAULT
a0d0bb4d
RD
1018 int
1019 depends on X86_64
aec6487e
IM
1020 default 8192 if MAXSMP
1021 default 64 if SMP
1022 default 1 if !SMP
a0d0bb4d 1023
506f1d07 1024config NR_CPUS
36f5101a 1025 int "Maximum number of CPUs" if SMP && !MAXSMP
aec6487e
IM
1026 range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END
1027 default NR_CPUS_DEFAULT
a7f7f624 1028 help
506f1d07 1029 This allows you to specify the maximum number of CPUs which this
bb61ccc7 1030 kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum
cad14bb9 1031 supported value is 8192, otherwise the maximum value is 512. The
506f1d07
SR
1032 minimum value which makes sense is 2.
1033
aec6487e
IM
1034 This is purely to save memory: each supported CPU adds about 8KB
1035 to the kernel image.
506f1d07 1036
66558b73
TC
1037config SCHED_CLUSTER
1038 bool "Cluster scheduler support"
1039 depends on SMP
1040 default y
1041 help
1042 Cluster scheduler support improves the CPU scheduler's decision
1043 making when dealing with machines that have clusters of CPUs.
1044 Cluster usually means a couple of CPUs which are placed closely
1045 by sharing mid-level caches, last-level cache tags or internal
1046 busses.
1047
506f1d07 1048config SCHED_SMT
dbe73364 1049 def_bool y if SMP
506f1d07
SR
1050
1051config SCHED_MC
3c2362e6
HH
1052 def_bool y
1053 prompt "Multi-core scheduler support"
c8e56d20 1054 depends on SMP
a7f7f624 1055 help
506f1d07
SR
1056 Multi-core scheduler support improves the CPU scheduler's decision
1057 making when dealing with multi-core CPU chips at a cost of slightly
1058 increased overhead in some places. If unsure say N here.
1059
de966cf4
TC
1060config SCHED_MC_PRIO
1061 bool "CPU core priorities scheduler support"
3598e577
ML
1062 depends on SCHED_MC
1063 select X86_INTEL_PSTATE if CPU_SUP_INTEL
1064 select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI
0a21fc12 1065 select CPU_FREQ
de966cf4 1066 default y
a7f7f624 1067 help
0a21fc12
IM
1068 Intel Turbo Boost Max Technology 3.0 enabled CPUs have a
1069 core ordering determined at manufacturing time, which allows
1070 certain cores to reach higher turbo frequencies (when running
1071 single threaded workloads) than others.
de966cf4 1072
0a21fc12
IM
1073 Enabling this kernel feature teaches the scheduler about
1074 the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the
1075 scheduler's CPU selection logic accordingly, so that higher
1076 overall system performance can be achieved.
de966cf4 1077
0a21fc12 1078 This feature will have no effect on CPUs without this feature.
de966cf4 1079
0a21fc12 1080 If unsure say Y here.
5e76b2ab 1081
30b8b006 1082config UP_LATE_INIT
b03b016f
KK
1083 def_bool y
1084 depends on !SMP && X86_LOCAL_APIC
30b8b006 1085
506f1d07 1086config X86_UP_APIC
50849eef
JB
1087 bool "Local APIC support on uniprocessors" if !PCI_MSI
1088 default PCI_MSI
dcbb01fb 1089 depends on X86_32 && !SMP
a7f7f624 1090 help
506f1d07
SR
1091 A local APIC (Advanced Programmable Interrupt Controller) is an
1092 integrated interrupt controller in the CPU. If you have a single-CPU
1093 system which has a processor with a local APIC, you can say Y here to
1094 enable and use it. If you say Y here even though your machine doesn't
1095 have a local APIC, then the kernel will still run with no slowdown at
1096 all. The local APIC supports CPU-generated self-interrupts (timer,
1097 performance counters), and the NMI watchdog which detects hard
1098 lockups.
1099
1100config X86_UP_IOAPIC
1101 bool "IO-APIC support on uniprocessors"
1102 depends on X86_UP_APIC
a7f7f624 1103 help
506f1d07
SR
1104 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
1105 SMP-capable replacement for PC-style interrupt controllers. Most
1106 SMP systems and many recent uniprocessor systems have one.
1107
1108 If you have a single-CPU system with an IO-APIC, you can say Y here
1109 to use it. If you say Y here even though your machine doesn't have
1110 an IO-APIC, then the kernel will still run with no slowdown at all.
1111
1112config X86_LOCAL_APIC
3c2362e6 1113 def_bool y
dcbb01fb 1114 depends on X86_64 || SMP || X86_UP_APIC || PCI_MSI
b5dc8e6c 1115 select IRQ_DOMAIN_HIERARCHY
506f1d07 1116
2b5e22af
KS
1117config ACPI_MADT_WAKEUP
1118 def_bool y
1119 depends on X86_64
1120 depends on ACPI
1121 depends on SMP
1122 depends on X86_LOCAL_APIC
1123
506f1d07 1124config X86_IO_APIC
b1da1e71
JB
1125 def_bool y
1126 depends on X86_LOCAL_APIC || X86_UP_IOAPIC
506f1d07 1127
41b9eb26
SA
1128config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
1129 bool "Reroute for broken boot IRQs"
41b9eb26 1130 depends on X86_IO_APIC
a7f7f624 1131 help
41b9eb26
SA
1132 This option enables a workaround that fixes a source of
1133 spurious interrupts. This is recommended when threaded
1134 interrupt handling is used on systems where the generation of
1135 superfluous "boot interrupts" cannot be disabled.
1136
1137 Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
1138 entry in the chipset's IO-APIC is masked (as, e.g. the RT
1139 kernel does during interrupt handling). On chipsets where this
1140 boot IRQ generation cannot be disabled, this workaround keeps
1141 the original IRQ line masked so that only the equivalent "boot
1142 IRQ" is delivered to the CPUs. The workaround also tells the
1143 kernel to set up the IRQ handler on the boot IRQ line. In this
1144 way only one interrupt is delivered to the kernel. Otherwise
1145 the spurious second interrupt may cause the kernel to bring
1146 down (vital) interrupt lines.
1147
1148 Only affects "broken" chipsets. Interrupt sharing may be
1149 increased on these systems.
1150
506f1d07 1151config X86_MCE
bab9bc65 1152 bool "Machine Check / overheating reporting"
648ed940 1153 select GENERIC_ALLOCATOR
e57dbaf7 1154 default y
a7f7f624 1155 help
bab9bc65
AK
1156 Machine Check support allows the processor to notify the
1157 kernel if it detects a problem (e.g. overheating, data corruption).
506f1d07 1158 The action the kernel takes depends on the severity of the problem,
bab9bc65 1159 ranging from warning messages to halting the machine.
4efc0670 1160
5de97c9f
TL
1161config X86_MCELOG_LEGACY
1162 bool "Support for deprecated /dev/mcelog character device"
1163 depends on X86_MCE
a7f7f624 1164 help
5de97c9f
TL
1165 Enable support for /dev/mcelog which is needed by the old mcelog
1166 userspace logging daemon. Consider switching to the new generation
1167 rasdaemon solution.
1168
506f1d07 1169config X86_MCE_INTEL
3c2362e6
HH
1170 def_bool y
1171 prompt "Intel MCE features"
c1ebf835 1172 depends on X86_MCE && X86_LOCAL_APIC
a7f7f624 1173 help
758cd94a
JH
1174 Additional support for intel specific MCE features such as
1175 the thermal monitor.
506f1d07
SR
1176
1177config X86_MCE_AMD
3c2362e6
HH
1178 def_bool y
1179 prompt "AMD MCE features"
d35fb312 1180 depends on X86_MCE && X86_LOCAL_APIC
a7f7f624 1181 help
758cd94a
JH
1182 Additional support for AMD specific MCE features such as
1183 the DRAM Error Threshold.
506f1d07 1184
4efc0670 1185config X86_ANCIENT_MCE
6fc108a0 1186 bool "Support for old Pentium 5 / WinChip machine checks"
c31d9633 1187 depends on X86_32 && X86_MCE
a7f7f624 1188 help
cd13adcc 1189 Include support for machine check handling on old Pentium 5 or WinChip
5065a706 1190 systems. These typically need to be enabled explicitly on the command
cd13adcc 1191 line.
4efc0670 1192
b2762686
AK
1193config X86_MCE_THRESHOLD
1194 depends on X86_MCE_AMD || X86_MCE_INTEL
6fc108a0 1195 def_bool y
b2762686 1196
ea149b36 1197config X86_MCE_INJECT
bc8e80d5 1198 depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS
ea149b36 1199 tristate "Machine check injector support"
a7f7f624 1200 help
ea149b36
AK
1201 Provide support for injecting machine checks for testing purposes.
1202 If you don't know what a machine check is and you don't do kernel
1203 QA it is safe to say n.
1204
07dc900e 1205source "arch/x86/events/Kconfig"
e633c65a 1206
5aef51c3 1207config X86_LEGACY_VM86
1e642812 1208 bool "Legacy VM86 support"
506f1d07 1209 depends on X86_32
a7f7f624 1210 help
5aef51c3
AL
1211 This option allows user programs to put the CPU into V8086
1212 mode, which is an 80286-era approximation of 16-bit real mode.
1213
1214 Some very old versions of X and/or vbetool require this option
1215 for user mode setting. Similarly, DOSEMU will use it if
1216 available to accelerate real mode DOS programs. However, any
1217 recent version of DOSEMU, X, or vbetool should be fully
1218 functional even without kernel VM86 support, as they will all
1e642812
IM
1219 fall back to software emulation. Nevertheless, if you are using
1220 a 16-bit DOS program where 16-bit performance matters, vm86
1221 mode might be faster than emulation and you might want to
1222 enable this option.
5aef51c3 1223
1e642812
IM
1224 Note that any app that works on a 64-bit kernel is unlikely to
1225 need this option, as 64-bit kernels don't, and can't, support
1226 V8086 mode. This option is also unrelated to 16-bit protected
1227 mode and is not needed to run most 16-bit programs under Wine.
5aef51c3 1228
1e642812
IM
1229 Enabling this option increases the complexity of the kernel
1230 and slows down exception handling a tiny bit.
5aef51c3 1231
1e642812 1232 If unsure, say N here.
5aef51c3
AL
1233
1234config VM86
b03b016f
KK
1235 bool
1236 default X86_LEGACY_VM86
34273f41
PA
1237
1238config X86_16BIT
1239 bool "Enable support for 16-bit segments" if EXPERT
1240 default y
a5b9e5a2 1241 depends on MODIFY_LDT_SYSCALL
a7f7f624 1242 help
34273f41
PA
1243 This option is required by programs like Wine to run 16-bit
1244 protected mode legacy code on x86 processors. Disabling
1245 this option saves about 300 bytes on i386, or around 6K text
1246 plus 16K runtime memory on x86-64,
1247
1248config X86_ESPFIX32
1249 def_bool y
1250 depends on X86_16BIT && X86_32
506f1d07 1251
197725de
PA
1252config X86_ESPFIX64
1253 def_bool y
34273f41 1254 depends on X86_16BIT && X86_64
506f1d07 1255
1ad83c85 1256config X86_VSYSCALL_EMULATION
b03b016f
KK
1257 bool "Enable vsyscall emulation" if EXPERT
1258 default y
1259 depends on X86_64
a7f7f624 1260 help
758cd94a
JH
1261 This enables emulation of the legacy vsyscall page. Disabling
1262 it is roughly equivalent to booting with vsyscall=none, except
1263 that it will also disable the helpful warning if a program
1264 tries to use a vsyscall. With this option set to N, offending
1265 programs will just segfault, citing addresses of the form
1266 0xffffffffff600?00.
1ad83c85 1267
758cd94a
JH
1268 This option is required by many programs built before 2013, and
1269 care should be used even with newer programs if set to N.
1ad83c85 1270
758cd94a
JH
1271 Disabling this option saves about 7K of kernel size and
1272 possibly 4K of additional runtime pagetable memory.
1ad83c85 1273
111e7b15
TG
1274config X86_IOPL_IOPERM
1275 bool "IOPERM and IOPL Emulation"
a24ca997 1276 default y
a7f7f624 1277 help
111e7b15
TG
1278 This enables the ioperm() and iopl() syscalls which are necessary
1279 for legacy applications.
1280
c8137ace
TG
1281 Legacy IOPL support is an overbroad mechanism which allows user
1282 space aside of accessing all 65536 I/O ports also to disable
1283 interrupts. To gain this access the caller needs CAP_SYS_RAWIO
1284 capabilities and permission from potentially active security
1285 modules.
1286
1287 The emulation restricts the functionality of the syscall to
1288 only allowing the full range I/O port access, but prevents the
a24ca997
TG
1289 ability to disable interrupts from user space which would be
1290 granted if the hardware IOPL mechanism would be used.
c8137ace 1291
506f1d07
SR
1292config TOSHIBA
1293 tristate "Toshiba Laptop support"
1294 depends on X86_32
a7f7f624 1295 help
506f1d07
SR
1296 This adds a driver to safely access the System Management Mode of
1297 the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
1298 not work on models with a Phoenix BIOS. The System Management Mode
1299 is used to set the BIOS and power saving options on Toshiba portables.
1300
1301 For information on utilities to make use of this driver see the
1302 Toshiba Linux utilities web site at:
1303 <http://www.buzzard.org.uk/toshiba/>.
1304
1305 Say Y if you intend to run this kernel on a Toshiba portable.
1306 Say N otherwise.
1307
506f1d07 1308config X86_REBOOTFIXUPS
9ba16087
JB
1309 bool "Enable X86 board specific fixups for reboot"
1310 depends on X86_32
a7f7f624 1311 help
506f1d07
SR
1312 This enables chipset and/or board specific fixups to be done
1313 in order to get reboot to work correctly. This is only needed on
1314 some combinations of hardware and BIOS. The symptom, for which
1315 this config is intended, is when reboot ends with a stalled/hung
1316 system.
1317
1318 Currently, the only fixup is for the Geode machines using
5e3a77e9 1319 CS5530A and CS5536 chipsets and the RDC R-321x SoC.
506f1d07
SR
1320
1321 Say Y if you want to enable the fixup. Currently, it's safe to
1322 enable this option even if you don't need it.
1323 Say N otherwise.
1324
1325config MICROCODE
e6bcfdd7 1326 def_bool y
80030e3d 1327 depends on CPU_SUP_AMD || CPU_SUP_INTEL
50cef76d 1328 select CRYPTO_LIB_SHA256 if CPU_SUP_AMD
80cc9f10 1329
fdbd4381
TG
1330config MICROCODE_INITRD32
1331 def_bool y
1332 depends on MICROCODE && X86_32 && BLK_DEV_INITRD
1333
a77a94f8
BP
1334config MICROCODE_LATE_LOADING
1335 bool "Late microcode loading (DANGEROUS)"
c02f48e0 1336 default n
634ac23a 1337 depends on MICROCODE && SMP
a7f7f624 1338 help
a77a94f8
BP
1339 Loading microcode late, when the system is up and executing instructions
1340 is a tricky business and should be avoided if possible. Just the sequence
1341 of synchronizing all cores and SMT threads is one fragile dance which does
1342 not guarantee that cores might not softlock after the loading. Therefore,
9407bda8
TG
1343 use this at your own risk. Late loading taints the kernel unless the
1344 microcode header indicates that it is safe for late loading via the
1345 minimal revision check. This minimal revision check can be enforced on
1346 the kernel command line with "microcode.minrev=Y".
1347
1348config MICROCODE_LATE_FORCE_MINREV
1349 bool "Enforce late microcode loading minimal revision check"
1350 default n
1351 depends on MICROCODE_LATE_LOADING
1352 help
1353 To prevent that users load microcode late which modifies already
1354 in use features, newer microcode patches have a minimum revision field
1355 in the microcode header, which tells the kernel which minimum
1356 revision must be active in the CPU to safely load that new microcode
1357 late into the running system. If disabled the check will not
1358 be enforced but the kernel will be tainted when the minimal
1359 revision check fails.
1360
1361 This minimal revision check can also be controlled via the
1362 "microcode.minrev" parameter on the kernel command line.
1363
1364 If unsure say Y.
506f1d07
SR
1365
1366config X86_MSR
1367 tristate "/dev/cpu/*/msr - Model-specific register support"
a7f7f624 1368 help
506f1d07
SR
1369 This device gives privileged processes access to the x86
1370 Model-Specific Registers (MSRs). It is a character device with
1371 major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
1372 MSR accesses are directed to a specific CPU on multi-processor
1373 systems.
1374
1375config X86_CPUID
1376 tristate "/dev/cpu/*/cpuid - CPU information support"
a7f7f624 1377 help
506f1d07
SR
1378 This device gives processes access to the x86 CPUID instruction to
1379 be executed on a specific processor. It is a character device
1380 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
1381 /dev/cpu/31/cpuid.
1382
bbeb69ce
AB
1383config HIGHMEM4G
1384 bool "High Memory Support"
506f1d07 1385 depends on X86_32
a7f7f624 1386 help
bbeb69ce 1387 Linux can use up to 4 Gigabytes of physical memory on x86 systems.
506f1d07
SR
1388 However, the address space of 32-bit x86 processors is only 4
1389 Gigabytes large. That means that, if you have a large amount of
1390 physical memory, not all of it can be "permanently mapped" by the
1391 kernel. The physical memory that's not permanently mapped is called
1392 "high memory".
1393
1394 If you are compiling a kernel which will never run on a machine with
1395 more than 1 Gigabyte total physical RAM, answer "off" here (default
1396 choice and suitable for most users). This will result in a "3GB/1GB"
1397 split: 3GB are mapped so that each process sees a 3GB virtual memory
1398 space and the remaining part of the 4GB virtual memory space is used
1399 by the kernel to permanently map as much physical memory as
1400 possible.
1401
1402 If the machine has between 1 and 4 Gigabytes physical RAM, then
bbeb69ce 1403 answer "Y" here.
506f1d07 1404
bbeb69ce 1405 If unsure, say N.
506f1d07
SR
1406
1407choice
6a108a14 1408 prompt "Memory split" if EXPERT
506f1d07
SR
1409 default VMSPLIT_3G
1410 depends on X86_32
a7f7f624 1411 help
506f1d07
SR
1412 Select the desired split between kernel and user memory.
1413
1414 If the address range available to the kernel is less than the
1415 physical memory installed, the remaining memory will be available
1416 as "high memory". Accessing high memory is a little more costly
1417 than low memory, as it needs to be mapped into the kernel first.
1418 Note that increasing the kernel address space limits the range
1419 available to user programs, making the address space there
1420 tighter. Selecting anything other than the default 3G/1G split
1421 will also likely make your kernel incompatible with binary-only
1422 kernel modules.
1423
1424 If you are not absolutely sure what you are doing, leave this
1425 option alone!
1426
1427 config VMSPLIT_3G
1428 bool "3G/1G user/kernel split"
1429 config VMSPLIT_3G_OPT
1430 depends on !X86_PAE
1431 bool "3G/1G user/kernel split (for full 1G low memory)"
1432 config VMSPLIT_2G
1433 bool "2G/2G user/kernel split"
1434 config VMSPLIT_2G_OPT
1435 depends on !X86_PAE
1436 bool "2G/2G user/kernel split (for full 2G low memory)"
1437 config VMSPLIT_1G
1438 bool "1G/3G user/kernel split"
1439endchoice
1440
1441config PAGE_OFFSET
1442 hex
1443 default 0xB0000000 if VMSPLIT_3G_OPT
1444 default 0x80000000 if VMSPLIT_2G
1445 default 0x78000000 if VMSPLIT_2G_OPT
1446 default 0x40000000 if VMSPLIT_1G
1447 default 0xC0000000
1448 depends on X86_32
1449
1450config HIGHMEM
bbeb69ce 1451 def_bool HIGHMEM4G
506f1d07
SR
1452
1453config X86_PAE
9ba16087 1454 bool "PAE (Physical Address Extension) Support"
88a2b4ed 1455 depends on X86_32 && X86_HAVE_PAE
d4a451d5 1456 select PHYS_ADDR_T_64BIT
a7f7f624 1457 help
506f1d07
SR
1458 PAE is required for NX support, and furthermore enables
1459 larger swapspace support for non-overcommit purposes. It
1460 has the cost of more pagetable lookup overhead, and also
1461 consumes more pagetable space per process.
1462
10971ab2 1463config X86_DIRECT_GBPAGES
e5008abe 1464 def_bool y
2e1da13f 1465 depends on X86_64
a7f7f624 1466 help
10971ab2
IM
1467 Certain kernel features effectively disable kernel
1468 linear 1 GB mappings (even if the CPU otherwise
1469 supports them), so don't confuse the user by printing
1470 that we have them enabled.
9e899816 1471
5c280cf6
TG
1472config X86_CPA_STATISTICS
1473 bool "Enable statistic for Change Page Attribute"
1474 depends on DEBUG_FS
a7f7f624 1475 help
b75baaf3 1476 Expose statistics about the Change Page Attribute mechanism, which
a943245a 1477 helps to determine the effectiveness of preserving large and huge
5c280cf6
TG
1478 page mappings when mapping protections are changed.
1479
20f07a04
KS
1480config X86_MEM_ENCRYPT
1481 select ARCH_HAS_FORCE_DMA_UNENCRYPTED
1482 select DYNAMIC_PHYSICAL_MASK
20f07a04
KS
1483 def_bool n
1484
7744ccdb
TL
1485config AMD_MEM_ENCRYPT
1486 bool "AMD Secure Memory Encryption (SME) support"
1487 depends on X86_64 && CPU_SUP_AMD
6c321179 1488 depends on EFI_STUB
82fef0ad 1489 select DMA_COHERENT_POOL
ce9084ba 1490 select ARCH_USE_MEMREMAP_PROT
597cfe48 1491 select INSTRUCTION_DECODER
aa5a4611 1492 select ARCH_HAS_CC_PLATFORM
20f07a04 1493 select X86_MEM_ENCRYPT
6c321179 1494 select UNACCEPTED_MEMORY
c5529418 1495 select CRYPTO_LIB_AESGCM
a7f7f624 1496 help
7744ccdb
TL
1497 Say yes to enable support for the encryption of system memory.
1498 This requires an AMD processor that supports Secure Memory
1499 Encryption (SME).
1500
506f1d07
SR
1501# Common NUMA Features
1502config NUMA
e133f6ea 1503 bool "NUMA Memory Allocation and Scheduler Support"
506f1d07 1504 depends on SMP
0abf5086 1505 depends on X86_64
7ecd19cf 1506 select USE_PERCPU_NUMA_NODE_ID
0c436a58 1507 select OF_NUMA if OF
a7f7f624 1508 help
e133f6ea 1509 Enable NUMA (Non-Uniform Memory Access) support.
fd51b2d7 1510
506f1d07
SR
1511 The kernel will try to allocate memory used by a CPU on the
1512 local memory controller of the CPU and add some more
1513 NUMA awareness to the kernel.
1514
c280ea5e 1515 For 64-bit this is recommended if the system is Intel Core i7
fd51b2d7
KM
1516 (or later), AMD Opteron, or EM64T NUMA.
1517
fd51b2d7 1518 Otherwise, you should say N.
506f1d07 1519
eec1d4fa 1520config AMD_NUMA
3c2362e6
HH
1521 def_bool y
1522 prompt "Old style AMD Opteron NUMA detection"
5da0ef9a 1523 depends on X86_64 && NUMA && PCI
a7f7f624 1524 help
eec1d4fa
HR
1525 Enable AMD NUMA node topology detection. You should say Y here if
1526 you have a multi processor AMD system. This uses an old method to
1527 read the NUMA configuration directly from the builtin Northbridge
1528 of Opteron. It is recommended to use X86_64_ACPI_NUMA instead,
1529 which also takes priority if both are compiled in.
506f1d07
SR
1530
1531config X86_64_ACPI_NUMA
3c2362e6
HH
1532 def_bool y
1533 prompt "ACPI NUMA detection"
506f1d07
SR
1534 depends on X86_64 && NUMA && ACPI && PCI
1535 select ACPI_NUMA
a7f7f624 1536 help
506f1d07
SR
1537 Enable ACPI SRAT based node topology detection.
1538
506f1d07 1539config NODES_SHIFT
d25e26b6 1540 int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
51591e31
DR
1541 range 1 10
1542 default "10" if MAXSMP
506f1d07 1543 default "6" if X86_64
506f1d07 1544 default "3"
a9ee6cf5 1545 depends on NUMA
a7f7f624 1546 help
1184dc2f 1547 Specify the maximum number of NUMA Nodes available on the target
692105b8 1548 system. Increases memory reserved to accommodate various tables.
506f1d07 1549
506f1d07
SR
1550config ARCH_FLATMEM_ENABLE
1551 def_bool y
3b16651f 1552 depends on X86_32 && !NUMA
506f1d07 1553
506f1d07
SR
1554config ARCH_SPARSEMEM_ENABLE
1555 def_bool y
506f1d07
SR
1556 select SPARSEMEM_STATIC if X86_32
1557 select SPARSEMEM_VMEMMAP_ENABLE if X86_64
cba5d9b3 1558 select SPARSEMEM_VMEMMAP if X86_64
506f1d07 1559
3b16651f 1560config ARCH_SPARSEMEM_DEFAULT
6ad57f7f 1561 def_bool X86_64 || (NUMA && X86_32)
3b16651f 1562
506f1d07
SR
1563config ARCH_SELECT_MEMORY_MODEL
1564 def_bool y
4eda2bc3 1565 depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE
506f1d07
SR
1566
1567config ARCH_MEMORY_PROBE
a0842b70 1568 bool "Enable sysfs memory/probe interface"
5c11f00b 1569 depends on MEMORY_HOTPLUG
a0842b70
TK
1570 help
1571 This option enables a sysfs memory/probe interface for testing.
cb1aaebe 1572 See Documentation/admin-guide/mm/memory-hotplug.rst for more information.
a0842b70 1573 If you are unsure how to answer this question, answer N.
506f1d07 1574
3b16651f
TH
1575config ARCH_PROC_KCORE_TEXT
1576 def_bool y
1577 depends on X86_64 && PROC_KCORE
1578
a29815a3 1579config ILLEGAL_POINTER_VALUE
b03b016f
KK
1580 hex
1581 default 0 if X86_32
1582 default 0xdead000000000000 if X86_64
a29815a3 1583
7a67832c
DW
1584config X86_PMEM_LEGACY_DEVICE
1585 bool
1586
ec776ef6 1587config X86_PMEM_LEGACY
7a67832c 1588 tristate "Support non-standard NVDIMMs and ADR protected memory"
9f53f9fa
DW
1589 depends on PHYS_ADDR_T_64BIT
1590 depends on BLK_DEV
7a67832c 1591 select X86_PMEM_LEGACY_DEVICE
7b27a862 1592 select NUMA_KEEP_MEMINFO if NUMA
9f53f9fa 1593 select LIBNVDIMM
ec776ef6
CH
1594 help
1595 Treat memory marked using the non-standard e820 type of 12 as used
1596 by the Intel Sandy Bridge-EP reference BIOS as protected memory.
1597 The kernel will offer these regions to the 'pmem' driver so
1598 they can be used for persistent storage.
1599
1600 Say Y if unsure.
1601
9f077871 1602config X86_CHECK_BIOS_CORRUPTION
8f9ca475 1603 bool "Check for low memory corruption"
a7f7f624 1604 help
8f9ca475
IM
1605 Periodically check for memory corruption in low memory, which
1606 is suspected to be caused by BIOS. Even when enabled in the
1607 configuration, it is disabled at runtime. Enable it by
1608 setting "memory_corruption_check=1" on the kernel command
1609 line. By default it scans the low 64k of memory every 60
1610 seconds; see the memory_corruption_check_size and
1611 memory_corruption_check_period parameters in
8c27ceff 1612 Documentation/admin-guide/kernel-parameters.rst to adjust this.
8f9ca475
IM
1613
1614 When enabled with the default parameters, this option has
1615 almost no overhead, as it reserves a relatively small amount
1616 of memory and scans it infrequently. It both detects corruption
1617 and prevents it from affecting the running system.
1618
1619 It is, however, intended as a diagnostic tool; if repeatable
1620 BIOS-originated corruption always affects the same memory,
1621 you can use memmap= to prevent the kernel from using that
1622 memory.
9f077871 1623
c885df50 1624config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
8f9ca475 1625 bool "Set the default setting of memory_corruption_check"
c885df50
JF
1626 depends on X86_CHECK_BIOS_CORRUPTION
1627 default y
a7f7f624 1628 help
8f9ca475
IM
1629 Set whether the default state of memory_corruption_check is
1630 on or off.
c885df50 1631
506f1d07
SR
1632config MATH_EMULATION
1633 bool
a5b9e5a2 1634 depends on MODIFY_LDT_SYSCALL
87d6021b 1635 prompt "Math emulation" if X86_32 && (M486SX || MELAN)
a7f7f624 1636 help
506f1d07
SR
1637 Linux can emulate a math coprocessor (used for floating point
1638 operations) if you don't have one. 486DX and Pentium processors have
1639 a math coprocessor built in, 486SX and 386 do not, unless you added
1640 a 487DX or 387, respectively. (The messages during boot time can
1641 give you some hints here ["man dmesg"].) Everyone needs either a
1642 coprocessor or this emulation.
1643
1644 If you don't have a math coprocessor, you need to say Y here; if you
1645 say Y here even though you have a coprocessor, the coprocessor will
1646 be used nevertheless. (This behavior can be changed with the kernel
1647 command line option "no387", which comes handy if your coprocessor
1648 is broken. Try "man bootparam" or see the documentation of your boot
1649 loader (lilo or loadlin) about how to pass options to the kernel at
1650 boot time.) This means that it is a good idea to say Y here if you
1651 intend to use this kernel on different machines.
1652
1653 More information about the internals of the Linux math coprocessor
1654 emulation can be found in <file:arch/x86/math-emu/README>.
1655
1656 If you are not sure, say Y; apart from resulting in a 66 KB bigger
1657 kernel, it won't hurt.
1658
1659config MTRR
6fc108a0 1660 def_bool y
6a108a14 1661 prompt "MTRR (Memory Type Range Register) support" if EXPERT
a7f7f624 1662 help
506f1d07
SR
1663 On Intel P6 family processors (Pentium Pro, Pentium II and later)
1664 the Memory Type Range Registers (MTRRs) may be used to control
1665 processor access to memory ranges. This is most useful if you have
1666 a video (VGA) card on a PCI or AGP bus. Enabling write-combining
1667 allows bus write transfers to be combined into a larger transfer
1668 before bursting over the PCI/AGP bus. This can increase performance
1669 of image write operations 2.5 times or more. Saying Y here creates a
1670 /proc/mtrr file which may be used to manipulate your processor's
1671 MTRRs. Typically the X server should use this.
1672
1673 This code has a reasonably generic interface so that similar
1674 control registers on other processors can be easily supported
1675 as well:
1676
1677 The Cyrix 6x86, 6x86MX and M II processors have Address Range
1678 Registers (ARRs) which provide a similar functionality to MTRRs. For
1679 these, the ARRs are used to emulate the MTRRs.
1680 The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
1681 MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
1682 write-combining. All of these processors are supported by this code
1683 and it makes sense to say Y here if you have one of them.
1684
1685 Saying Y here also fixes a problem with buggy SMP BIOSes which only
1686 set the MTRRs for the boot CPU and not for the secondary CPUs. This
1687 can lead to all sorts of problems, so it's good to say Y here.
1688
1689 You can safely say Y even if your machine doesn't have MTRRs, you'll
1690 just add about 9 KB to your kernel.
1691
ff61f079 1692 See <file:Documentation/arch/x86/mtrr.rst> for more information.
506f1d07 1693
95ffa243 1694config MTRR_SANITIZER
2ffb3501 1695 def_bool y
95ffa243
YL
1696 prompt "MTRR cleanup support"
1697 depends on MTRR
a7f7f624 1698 help
aba3728c
TG
1699 Convert MTRR layout from continuous to discrete, so X drivers can
1700 add writeback entries.
95ffa243 1701
aba3728c 1702 Can be disabled with disable_mtrr_cleanup on the kernel command line.
692105b8 1703 The largest mtrr entry size for a continuous block can be set with
aba3728c 1704 mtrr_chunk_size.
95ffa243 1705
2ffb3501 1706 If unsure, say Y.
95ffa243
YL
1707
1708config MTRR_SANITIZER_ENABLE_DEFAULT
f5098d62
YL
1709 int "MTRR cleanup enable value (0-1)"
1710 range 0 1
1711 default "0"
95ffa243 1712 depends on MTRR_SANITIZER
a7f7f624 1713 help
f5098d62 1714 Enable mtrr cleanup default value
95ffa243 1715
12031a62
YL
1716config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
1717 int "MTRR cleanup spare reg num (0-7)"
1718 range 0 7
1719 default "1"
1720 depends on MTRR_SANITIZER
a7f7f624 1721 help
12031a62 1722 mtrr cleanup spare entries default, it can be changed via
aba3728c 1723 mtrr_spare_reg_nr=N on the kernel command line.
12031a62 1724
2e5d9c85 1725config X86_PAT
6fc108a0 1726 def_bool y
6a108a14 1727 prompt "x86 PAT support" if EXPERT
2a8a2719 1728 depends on MTRR
7a87225a 1729 select ARCH_USES_PG_ARCH_2
a7f7f624 1730 help
2e5d9c85 1731 Use PAT attributes to setup page level cache control.
042b78e4 1732
2e5d9c85 1733 PATs are the modern equivalents of MTRRs and are much more
1734 flexible than MTRRs.
1735
1736 Say N here if you see bootup problems (boot crash, boot hang,
042b78e4 1737 spontaneous reboots) or a non-working video driver.
2e5d9c85 1738
1739 If unsure, say Y.
1740
b971880f 1741config X86_UMIP
796ebc81 1742 def_bool y
b971880f 1743 prompt "User Mode Instruction Prevention" if EXPERT
a7f7f624 1744 help
b971880f
BM
1745 User Mode Instruction Prevention (UMIP) is a security feature in
1746 some x86 processors. If enabled, a general protection fault is
1747 issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are
1748 executed in user mode. These instructions unnecessarily expose
1749 information about the hardware state.
796ebc81
RN
1750
1751 The vast majority of applications do not use these instructions.
1752 For the very few that do, software emulation is provided in
1753 specific cases in protected and virtual-8086 modes. Emulated
1754 results are dummy.
aa35f896 1755
156ff4a5
PZ
1756config CC_HAS_IBT
1757 # GCC >= 9 and binutils >= 2.29
1758 # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654
1759 # Clang/LLVM >= 14
262448f3
NC
1760 # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f
1761 # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332
156ff4a5 1762 def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \
262448f3 1763 (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \
156ff4a5
PZ
1764 $(as-instr,endbr64)
1765
18e66b69
RE
1766config X86_CET
1767 def_bool n
1768 help
1769 CET features configured (Shadow stack or IBT)
1770
156ff4a5
PZ
1771config X86_KERNEL_IBT
1772 prompt "Indirect Branch Tracking"
4fd5f70c 1773 def_bool y
03f16cd0 1774 depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL
f6a2c2b2
NC
1775 # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f
1776 depends on !LD_IS_LLD || LLD_VERSION >= 140000
03f16cd0 1777 select OBJTOOL
18e66b69 1778 select X86_CET
156ff4a5
PZ
1779 help
1780 Build the kernel with support for Indirect Branch Tracking, a
1781 hardware support course-grain forward-edge Control Flow Integrity
1782 protection. It enforces that all indirect calls must land on
1783 an ENDBR instruction, as such, the compiler will instrument the
1784 code with them to make this happen.
1785
ed53a0d9 1786 In addition to building the kernel with IBT, seal all functions that
4cdfc11b 1787 are not indirect call targets, avoiding them ever becoming one.
ed53a0d9
PZ
1788
1789 This requires LTO like objtool runs and will slow down the build. It
1790 does significantly reduce the number of ENDBR instructions in the
1791 kernel image.
1792
35e97790 1793config X86_INTEL_MEMORY_PROTECTION_KEYS
38f3e775 1794 prompt "Memory Protection Keys"
35e97790 1795 def_bool y
284244a9 1796 # Note: only available in 64-bit mode
38f3e775 1797 depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD)
52c8e601
IM
1798 select ARCH_USES_HIGH_VMA_FLAGS
1799 select ARCH_HAS_PKEYS
a7f7f624 1800 help
284244a9
DH
1801 Memory Protection Keys provides a mechanism for enforcing
1802 page-based protections, but without requiring modification of the
1803 page tables when an application changes protection domains.
1804
1eecbcdc 1805 For details, see Documentation/core-api/protection-keys.rst
284244a9
DH
1806
1807 If unsure, say y.
35e97790 1808
5626f8d4
JG
1809config ARCH_PKEY_BITS
1810 int
1811 default 4
1812
db616173
MH
1813choice
1814 prompt "TSX enable mode"
1815 depends on CPU_SUP_INTEL
1816 default X86_INTEL_TSX_MODE_OFF
1817 help
1818 Intel's TSX (Transactional Synchronization Extensions) feature
1819 allows to optimize locking protocols through lock elision which
1820 can lead to a noticeable performance boost.
1821
1822 On the other hand it has been shown that TSX can be exploited
1823 to form side channel attacks (e.g. TAA) and chances are there
1824 will be more of those attacks discovered in the future.
1825
1826 Therefore TSX is not enabled by default (aka tsx=off). An admin
1827 might override this decision by tsx=on the command line parameter.
1828 Even with TSX enabled, the kernel will attempt to enable the best
1829 possible TAA mitigation setting depending on the microcode available
1830 for the particular machine.
1831
1832 This option allows to set the default tsx mode between tsx=on, =off
1833 and =auto. See Documentation/admin-guide/kernel-parameters.txt for more
1834 details.
1835
1836 Say off if not sure, auto if TSX is in use but it should be used on safe
1837 platforms or on if TSX is in use and the security aspect of tsx is not
1838 relevant.
1839
1840config X86_INTEL_TSX_MODE_OFF
1841 bool "off"
1842 help
1843 TSX is disabled if possible - equals to tsx=off command line parameter.
1844
1845config X86_INTEL_TSX_MODE_ON
1846 bool "on"
1847 help
1848 TSX is always enabled on TSX capable HW - equals the tsx=on command
1849 line parameter.
1850
1851config X86_INTEL_TSX_MODE_AUTO
1852 bool "auto"
1853 help
1854 TSX is enabled on TSX capable HW that is believed to be safe against
1855 side channel attacks- equals the tsx=auto command line parameter.
1856endchoice
1857
e7e05452
SC
1858config X86_SGX
1859 bool "Software Guard eXtensions (SGX)"
b8d1d163 1860 depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC
e59236b5 1861 select CRYPTO_LIB_SHA256
e7e05452 1862 select MMU_NOTIFIER
901ddbb9 1863 select NUMA_KEEP_MEMINFO if NUMA
40e0e784 1864 select XARRAY_MULTI
e7e05452
SC
1865 help
1866 Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions
1867 that can be used by applications to set aside private regions of code
1868 and data, referred to as enclaves. An enclave's private memory can
1869 only be accessed by code running within the enclave. Accesses from
1870 outside the enclave, including other enclaves, are disallowed by
1871 hardware.
1872
1873 If unsure, say N.
1874
18e66b69
RE
1875config X86_USER_SHADOW_STACK
1876 bool "X86 userspace shadow stack"
1877 depends on AS_WRUSS
1878 depends on X86_64
1879 select ARCH_USES_HIGH_VMA_FLAGS
bcc9d04e 1880 select ARCH_HAS_USER_SHADOW_STACK
18e66b69
RE
1881 select X86_CET
1882 help
1883 Shadow stack protection is a hardware feature that detects function
1884 return address corruption. This helps mitigate ROP attacks.
1885 Applications must be enabled to use it, and old userspace does not
1886 get protection "for free".
1887
1888 CPUs supporting shadow stacks were first released in 2020.
1889
54acee60 1890 See Documentation/arch/x86/shstk.rst for more information.
18e66b69
RE
1891
1892 If unsure, say N.
1893
c33621b4
KH
1894config INTEL_TDX_HOST
1895 bool "Intel Trust Domain Extensions (TDX) host support"
1896 depends on CPU_SUP_INTEL
1897 depends on X86_64
1898 depends on KVM_INTEL
3115cabd 1899 depends on X86_X2APIC
abe8dbab 1900 select ARCH_KEEP_MEMBLOCK
ac3a2208 1901 depends on CONTIG_ALLOC
cb8eb06d 1902 depends on !KEXEC_CORE
83e1bdc9 1903 depends on X86_MCE
c33621b4
KH
1904 help
1905 Intel Trust Domain Extensions (TDX) protects guest VMs from malicious
1906 host and certain physical attacks. This option enables necessary TDX
1907 support in the host kernel to run confidential VMs.
1908
1909 If unsure, say N.
1910
506f1d07 1911config EFI
9ba16087 1912 bool "EFI runtime service support"
5b83683f 1913 depends on ACPI
f6ce5002 1914 select UCS2_STRING
022ee6c5 1915 select EFI_RUNTIME_WRAPPERS
1ff2fc02 1916 select ARCH_USE_MEMREMAP_PROT
aba7e066 1917 select EFI_RUNTIME_MAP if KEXEC_CORE
a7f7f624 1918 help
8f9ca475
IM
1919 This enables the kernel to use EFI runtime services that are
1920 available (such as the EFI variable services).
506f1d07 1921
8f9ca475
IM
1922 This option is only useful on systems that have EFI firmware.
1923 In addition, you should use the latest ELILO loader available
1924 at <http://elilo.sourceforge.net> in order to take advantage
1925 of EFI runtime services. However, even with this option, the
1926 resultant kernel should continue to boot on existing non-EFI
1927 platforms.
506f1d07 1928
291f3632 1929config EFI_STUB
8f24f8c2 1930 bool "EFI stub support"
c6dbd3e5 1931 depends on EFI
8f24f8c2 1932 select RELOCATABLE
a7f7f624 1933 help
8f24f8c2 1934 This kernel feature allows a bzImage to be loaded directly
291f3632
MF
1935 by EFI firmware without the use of a bootloader.
1936
4f4cfa6c 1937 See Documentation/admin-guide/efi-stub.rst for more information.
0c759662 1938
cc3fdda2
AB
1939config EFI_HANDOVER_PROTOCOL
1940 bool "EFI handover protocol (DEPRECATED)"
1941 depends on EFI_STUB
1942 default y
1943 help
1944 Select this in order to include support for the deprecated EFI
1945 handover protocol, which defines alternative entry points into the
1946 EFI stub. This is a practice that has no basis in the UEFI
1947 specification, and requires a priori knowledge on the part of the
1948 bootloader about Linux/x86 specific ways of passing the command line
1949 and initrd, and where in memory those assets may be loaded.
1950
1951 If in doubt, say Y. Even though the corresponding support is not
1952 present in upstream GRUB or other bootloaders, most distros build
1953 GRUB with numerous downstream patches applied, and may rely on the
1954 handover protocol as as result.
1955
7d453eee
MF
1956config EFI_MIXED
1957 bool "EFI mixed-mode support"
1958 depends on EFI_STUB && X86_64
a7f7f624 1959 help
758cd94a
JH
1960 Enabling this feature allows a 64-bit kernel to be booted
1961 on a 32-bit firmware, provided that your CPU supports 64-bit
1962 mode.
7d453eee 1963
758cd94a
JH
1964 Note that it is not possible to boot a mixed-mode enabled
1965 kernel via the EFI boot stub - a bootloader that supports
1966 the EFI handover protocol must be used.
7d453eee 1967
758cd94a 1968 If unsure, say N.
7d453eee 1969
1fff234d
AB
1970config EFI_RUNTIME_MAP
1971 bool "Export EFI runtime maps to sysfs" if EXPERT
1972 depends on EFI
1fff234d
AB
1973 help
1974 Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
1975 That memory map is required by the 2nd kernel to set up EFI virtual
1976 mappings after kexec, but can also be used for debugging purposes.
1977
1978 See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map.
1979
8636a1f9 1980source "kernel/Kconfig.hz"
506f1d07 1981
6af51380
ED
1982config ARCH_SUPPORTS_KEXEC
1983 def_bool y
74ca317c 1984
6af51380 1985config ARCH_SUPPORTS_KEXEC_FILE
c1ad12ee 1986 def_bool X86_64
b799a09f 1987
6af51380
ED
1988config ARCH_SELECTS_KEXEC_FILE
1989 def_bool y
74ca317c 1990 depends on KEXEC_FILE
6af51380 1991 select HAVE_IMA_KEXEC if IMA
d8eb8940 1992
e6265fe7 1993config ARCH_SUPPORTS_KEXEC_PURGATORY
c1ad12ee 1994 def_bool y
99d5cadf 1995
6af51380
ED
1996config ARCH_SUPPORTS_KEXEC_SIG
1997 def_bool y
8e7d8381 1998
6af51380
ED
1999config ARCH_SUPPORTS_KEXEC_SIG_FORCE
2000 def_bool y
99d5cadf 2001
6af51380
ED
2002config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG
2003 def_bool y
8e7d8381 2004
6af51380
ED
2005config ARCH_SUPPORTS_KEXEC_JUMP
2006 def_bool y
506f1d07 2007
2b082d6f
AG
2008config ARCH_SUPPORTS_KEXEC_HANDOVER
2009 def_bool X86_64
2010
6af51380
ED
2011config ARCH_SUPPORTS_CRASH_DUMP
2012 def_bool X86_64 || (X86_32 && HIGHMEM)
3ab83521 2013
31daa343
DV
2014config ARCH_DEFAULT_CRASH_DUMP
2015 def_bool y
2016
ea53ad9c
ED
2017config ARCH_SUPPORTS_CRASH_HOTPLUG
2018 def_bool y
3ab83521 2019
9c08a2a1 2020config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
85fcde40 2021 def_bool CRASH_RESERVE
9c08a2a1 2022
506f1d07 2023config PHYSICAL_START
6a108a14 2024 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
ceefccc9 2025 default "0x1000000"
a7f7f624 2026 help
506f1d07
SR
2027 This gives the physical address where the kernel is loaded.
2028
43b1d3e6
CK
2029 If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage
2030 will decompress itself to above physical address and run from there.
2031 Otherwise, bzImage will run from the address where it has been loaded
2032 by the boot loader. The only exception is if it is loaded below the
2033 above physical address, in which case it will relocate itself there.
506f1d07
SR
2034
2035 In normal kdump cases one does not have to set/change this option
2036 as now bzImage can be compiled as a completely relocatable image
2037 (CONFIG_RELOCATABLE=y) and be used to load and run from a different
2038 address. This option is mainly useful for the folks who don't want
2039 to use a bzImage for capturing the crash dump and want to use a
2040 vmlinux instead. vmlinux is not relocatable hence a kernel needs
2041 to be specifically compiled to run from a specific memory area
2042 (normally a reserved region) and this option comes handy.
2043
ceefccc9
PA
2044 So if you are using bzImage for capturing the crash dump,
2045 leave the value here unchanged to 0x1000000 and set
2046 CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux
2047 for capturing the crash dump change this value to start of
2048 the reserved region. In other words, it can be set based on
2049 the "X" value as specified in the "crashkernel=YM@XM"
2050 command line boot parameter passed to the panic-ed
330d4810 2051 kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst
ceefccc9 2052 for more details about crash dumps.
506f1d07
SR
2053
2054 Usage of bzImage for capturing the crash dump is recommended as
2055 one does not have to build two kernels. Same kernel can be used
2056 as production kernel and capture kernel. Above option should have
2057 gone away after relocatable bzImage support is introduced. But it
2058 is present because there are users out there who continue to use
2059 vmlinux for dump capture. This option should go away down the
2060 line.
2061
2062 Don't change this unless you know what you are doing.
2063
2064config RELOCATABLE
26717808
PA
2065 bool "Build a relocatable kernel"
2066 default y
a7f7f624 2067 help
506f1d07
SR
2068 This builds a kernel image that retains relocation information
2069 so it can be loaded someplace besides the default 1MB.
2070 The relocations tend to make the kernel binary about 10% larger,
2071 but are discarded at runtime.
2072
2073 One use is for the kexec on panic case where the recovery kernel
2074 must live at a different physical address than the primary
2075 kernel.
2076
2077 Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
2078 it has been loaded at and the compile time physical address
8ab3820f 2079 (CONFIG_PHYSICAL_START) is used as the minimum location.
506f1d07 2080
8ab3820f 2081config RANDOMIZE_BASE
e8581e3d 2082 bool "Randomize the address of the kernel image (KASLR)"
8ab3820f 2083 depends on RELOCATABLE
6807c846 2084 default y
a7f7f624 2085 help
e8581e3d
BH
2086 In support of Kernel Address Space Layout Randomization (KASLR),
2087 this randomizes the physical address at which the kernel image
2088 is decompressed and the virtual address where the kernel
2089 image is mapped, as a security feature that deters exploit
2090 attempts relying on knowledge of the location of kernel
2091 code internals.
2092
ed9f007e
KC
2093 On 64-bit, the kernel physical and virtual addresses are
2094 randomized separately. The physical address will be anywhere
2095 between 16MB and the top of physical memory (up to 64TB). The
2096 virtual address will be randomized from 16MB up to 1GB (9 bits
2097 of entropy). Note that this also reduces the memory space
2098 available to kernel modules from 1.5GB to 1GB.
2099
2100 On 32-bit, the kernel physical and virtual addresses are
2101 randomized together. They will be randomized from 16MB up to
2102 512MB (8 bits of entropy).
e8581e3d
BH
2103
2104 Entropy is generated using the RDRAND instruction if it is
2105 supported. If RDTSC is supported, its value is mixed into
2106 the entropy pool as well. If neither RDRAND nor RDTSC are
ed9f007e
KC
2107 supported, then entropy is read from the i8254 timer. The
2108 usable entropy is limited by the kernel being built using
2109 2GB addressing, and that PHYSICAL_ALIGN must be at a
2110 minimum of 2MB. As a result, only 10 bits of entropy are
2111 theoretically possible, but the implementations are further
2112 limited due to memory layouts.
e8581e3d 2113
6807c846 2114 If unsure, say Y.
8ab3820f
KC
2115
2116# Relocation on x86 needs some additional build support
845adf72
PA
2117config X86_NEED_RELOCS
2118 def_bool y
8ab3820f 2119 depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE)
9b400d17 2120 select ARCH_VMLINUX_NEEDS_RELOCS
845adf72 2121
506f1d07 2122config PHYSICAL_ALIGN
a0215061 2123 hex "Alignment value to which kernel should be aligned"
8ab3820f 2124 default "0x200000"
a0215061
KC
2125 range 0x2000 0x1000000 if X86_32
2126 range 0x200000 0x1000000 if X86_64
a7f7f624 2127 help
506f1d07
SR
2128 This value puts the alignment restrictions on physical address
2129 where kernel is loaded and run from. Kernel is compiled for an
2130 address which meets above alignment restriction.
2131
2132 If bootloader loads the kernel at a non-aligned address and
2133 CONFIG_RELOCATABLE is set, kernel will move itself to nearest
2134 address aligned to above value and run from there.
2135
2136 If bootloader loads the kernel at a non-aligned address and
2137 CONFIG_RELOCATABLE is not set, kernel will ignore the run time
2138 load address and decompress itself to the address it has been
2139 compiled for and run from there. The address for which kernel is
2140 compiled already meets above alignment restrictions. Hence the
2141 end result is that kernel runs from a physical address meeting
2142 above alignment restrictions.
2143
a0215061
KC
2144 On 32-bit this value must be a multiple of 0x2000. On 64-bit
2145 this value must be a multiple of 0x200000.
2146
506f1d07
SR
2147 Don't change this unless you know what you are doing.
2148
0483e1fa
TG
2149config RANDOMIZE_MEMORY
2150 bool "Randomize the kernel memory sections"
2151 depends on X86_64
2152 depends on RANDOMIZE_BASE
2153 default RANDOMIZE_BASE
a7f7f624 2154 help
758cd94a
JH
2155 Randomizes the base virtual address of kernel memory sections
2156 (physical memory mapping, vmalloc & vmemmap). This security feature
2157 makes exploits relying on predictable memory locations less reliable.
0483e1fa 2158
758cd94a
JH
2159 The order of allocations remains unchanged. Entropy is generated in
2160 the same way as RANDOMIZE_BASE. Current implementation in the optimal
2161 configuration have in average 30,000 different possible virtual
2162 addresses for each memory section.
0483e1fa 2163
758cd94a 2164 If unsure, say Y.
0483e1fa 2165
90397a41
TG
2166config RANDOMIZE_MEMORY_PHYSICAL_PADDING
2167 hex "Physical memory mapping padding" if EXPERT
2168 depends on RANDOMIZE_MEMORY
2169 default "0xa" if MEMORY_HOTPLUG
2170 default "0x0"
2171 range 0x1 0x40 if MEMORY_HOTPLUG
2172 range 0x0 0x40
a7f7f624 2173 help
758cd94a
JH
2174 Define the padding in terabytes added to the existing physical
2175 memory size during kernel memory randomization. It is useful
2176 for memory hotplug support but reduces the entropy available for
2177 address randomization.
90397a41 2178
758cd94a 2179 If unsure, leave at the default value.
90397a41 2180
6449dcb0
KS
2181config ADDRESS_MASKING
2182 bool "Linear Address Masking support"
2183 depends on X86_64
3267cb6d 2184 depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS
6449dcb0
KS
2185 help
2186 Linear Address Masking (LAM) modifies the checking that is applied
2187 to 64-bit linear addresses, allowing software to use of the
2188 untranslated address bits for metadata.
2189
2190 The capability can be used for efficient address sanitizers (ASAN)
2191 implementation and for optimizations in JITs.
2192
506f1d07 2193config HOTPLUG_CPU
bebd024e 2194 def_bool y
40b31360 2195 depends on SMP
506f1d07
SR
2196
2197config COMPAT_VDSO
b0b49f26 2198 def_bool n
de711563 2199 prompt "Workaround for glibc 2.3.2 / 2.3.3 (released in year 2003/2004)"
953fee1d 2200 depends on COMPAT_32
a7f7f624 2201 help
b0b49f26
AL
2202 Certain buggy versions of glibc will crash if they are
2203 presented with a 32-bit vDSO that is not mapped at the address
2204 indicated in its segment table.
e84446de 2205
b0b49f26
AL
2206 The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a
2207 and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and
2208 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is
2209 the only released version with the bug, but OpenSUSE 9
2210 contains a buggy "glibc 2.3.2".
506f1d07 2211
b0b49f26
AL
2212 The symptom of the bug is that everything crashes on startup, saying:
2213 dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed!
2214
2215 Saying Y here changes the default value of the vdso32 boot
2216 option from 1 to 0, which turns off the 32-bit vDSO entirely.
2217 This works around the glibc bug but hurts performance.
2218
2219 If unsure, say N: if you are compiling your own kernel, you
2220 are unlikely to be using a buggy version of glibc.
506f1d07 2221
3dc33bd3
KC
2222choice
2223 prompt "vsyscall table for legacy applications"
2224 depends on X86_64
625b7b7f 2225 default LEGACY_VSYSCALL_XONLY
3dc33bd3
KC
2226 help
2227 Legacy user code that does not know how to find the vDSO expects
2228 to be able to issue three syscalls by calling fixed addresses in
2229 kernel space. Since this location is not randomized with ASLR,
2230 it can be used to assist security vulnerability exploitation.
2231
2232 This setting can be changed at boot time via the kernel command
bf00745e
AL
2233 line parameter vsyscall=[emulate|xonly|none]. Emulate mode
2234 is deprecated and can only be enabled using the kernel command
2235 line.
3dc33bd3
KC
2236
2237 On a system with recent enough glibc (2.14 or newer) and no
2238 static binaries, you can say None without a performance penalty
2239 to improve security.
2240
bd49e16e 2241 If unsure, select "Emulate execution only".
3dc33bd3 2242
bd49e16e
AL
2243 config LEGACY_VSYSCALL_XONLY
2244 bool "Emulate execution only"
2245 help
2246 The kernel traps and emulates calls into the fixed vsyscall
2247 address mapping and does not allow reads. This
2248 configuration is recommended when userspace might use the
2249 legacy vsyscall area but support for legacy binary
2250 instrumentation of legacy code is not needed. It mitigates
2251 certain uses of the vsyscall area as an ASLR-bypassing
2252 buffer.
3dc33bd3
KC
2253
2254 config LEGACY_VSYSCALL_NONE
2255 bool "None"
2256 help
2257 There will be no vsyscall mapping at all. This will
2258 eliminate any risk of ASLR bypass due to the vsyscall
2259 fixed address mapping. Attempts to use the vsyscalls
2260 will be reported to dmesg, so that either old or
2261 malicious userspace programs can be identified.
2262
2263endchoice
2264
516cbf37
TB
2265config CMDLINE_BOOL
2266 bool "Built-in kernel command line"
a7f7f624 2267 help
516cbf37
TB
2268 Allow for specifying boot arguments to the kernel at
2269 build time. On some systems (e.g. embedded ones), it is
2270 necessary or convenient to provide some or all of the
2271 kernel boot arguments with the kernel itself (that is,
2272 to not rely on the boot loader to provide them.)
2273
2274 To compile command line arguments into the kernel,
2275 set this option to 'Y', then fill in the
69711ca1 2276 boot arguments in CONFIG_CMDLINE.
516cbf37
TB
2277
2278 Systems with fully functional boot loaders (i.e. non-embedded)
2279 should leave this option set to 'N'.
2280
2281config CMDLINE
2282 string "Built-in kernel command string"
2283 depends on CMDLINE_BOOL
2284 default ""
a7f7f624 2285 help
516cbf37
TB
2286 Enter arguments here that should be compiled into the kernel
2287 image and used at boot time. If the boot loader provides a
2288 command line at boot time, it is appended to this string to
2289 form the full kernel command line, when the system boots.
2290
2291 However, you can use the CONFIG_CMDLINE_OVERRIDE option to
2292 change this behavior.
2293
2294 In most cases, the command line (whether built-in or provided
2295 by the boot loader) should specify the device for the root
2296 file system.
2297
2298config CMDLINE_OVERRIDE
2299 bool "Built-in command line overrides boot loader arguments"
645e6466 2300 depends on CMDLINE_BOOL && CMDLINE != ""
a7f7f624 2301 help
516cbf37
TB
2302 Set this option to 'Y' to have the kernel ignore the boot loader
2303 command line, and use ONLY the built-in command line.
2304
2305 This is used to work around broken boot loaders. This should
2306 be set to 'N' under normal conditions.
2307
a5b9e5a2
AL
2308config MODIFY_LDT_SYSCALL
2309 bool "Enable the LDT (local descriptor table)" if EXPERT
2310 default y
a7f7f624 2311 help
a5b9e5a2
AL
2312 Linux can allow user programs to install a per-process x86
2313 Local Descriptor Table (LDT) using the modify_ldt(2) system
2314 call. This is required to run 16-bit or segmented code such as
2315 DOSEMU or some Wine programs. It is also used by some very old
2316 threading libraries.
2317
2318 Enabling this feature adds a small amount of overhead to
2319 context switches and increases the low-level kernel attack
2320 surface. Disabling it removes the modify_ldt(2) system call.
2321
2322 Saying 'N' here may make sense for embedded or server kernels.
2323
3aac3ebe
TG
2324config STRICT_SIGALTSTACK_SIZE
2325 bool "Enforce strict size checking for sigaltstack"
2326 depends on DYNAMIC_SIGFRAME
2327 help
2328 For historical reasons MINSIGSTKSZ is a constant which became
2329 already too small with AVX512 support. Add a mechanism to
2330 enforce strict checking of the sigaltstack size against the
2331 real size of the FPU frame. This option enables the check
2332 by default. It can also be controlled via the kernel command
2333 line option 'strict_sas_size' independent of this config
2334 switch. Enabling it might break existing applications which
2335 allocate a too small sigaltstack but 'work' because they
2336 never get a signal delivered.
2337
2338 Say 'N' unless you want to really enforce this check.
2339
d6f635bc
KC
2340config CFI_AUTO_DEFAULT
2341 bool "Attempt to use FineIBT by default at boot time"
2342 depends on FINEIBT
5595c31c 2343 depends on !RUST || RUSTC_VERSION >= 108800
d6f635bc
KC
2344 default y
2345 help
2346 Attempt to use FineIBT by default at boot time. If enabled,
2347 this is the same as booting with "cfi=auto". If disabled,
2348 this is the same as booting with "cfi=kcfi".
2349
b700e7f0
SJ
2350source "kernel/livepatch/Kconfig"
2351
350afa8a
RB
2352config X86_BUS_LOCK_DETECT
2353 bool "Split Lock Detect and Bus Lock Detect support"
408eb741 2354 depends on CPU_SUP_INTEL || CPU_SUP_AMD
350afa8a
RB
2355 default y
2356 help
2357 Enable Split Lock Detect and Bus Lock Detect functionalities.
2358 See <file:Documentation/arch/x86/buslock.rst> for more information.
2359
506f1d07
SR
2360endmenu
2361
1ca3683c 2362config CC_HAS_NAMED_AS
47ff30cc
UB
2363 def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null)
2364 depends on CC_IS_GCC
1ca3683c 2365
b6762467
UB
2366#
2367# -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN)
2368# are incompatible with named address spaces with GCC < 13.3
2369# (see GCC PR sanitizer/111736 and also PR sanitizer/115172).
2370#
2371
9ebe5500 2372config CC_HAS_NAMED_AS_FIXED_SANITIZERS
b6762467
UB
2373 def_bool y
2374 depends on !(KASAN || KCSAN) || GCC_VERSION >= 130300
2375 depends on !(UBSAN_BOOL && KASAN) || GCC_VERSION >= 140200
1ca3683c
UB
2376
2377config USE_X86_SEG_SUPPORT
b6762467
UB
2378 def_bool CC_HAS_NAMED_AS
2379 depends on CC_HAS_NAMED_AS_FIXED_SANITIZERS
1ca3683c 2380
f43b9876
PZ
2381config CC_HAS_SLS
2382 def_bool $(cc-option,-mharden-sls=all)
2383
2384config CC_HAS_RETURN_THUNK
2385 def_bool $(cc-option,-mfunction-return=thunk-extern)
2386
bea75b33
TG
2387config CC_HAS_ENTRY_PADDING
2388 def_bool $(cc-option,-fpatchable-function-entry=16,16)
2389
0c92385d
PZ
2390config CC_HAS_KCFI_ARITY
2391 def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity)
2392 depends on CC_IS_CLANG && !RUST
2393
bea75b33
TG
2394config FUNCTION_PADDING_CFI
2395 int
2396 default 59 if FUNCTION_ALIGNMENT_64B
2397 default 27 if FUNCTION_ALIGNMENT_32B
2398 default 11 if FUNCTION_ALIGNMENT_16B
2399 default 3 if FUNCTION_ALIGNMENT_8B
2400 default 0
2401
2402# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG
2403# except Kconfig can't do arithmetic :/
2404config FUNCTION_PADDING_BYTES
2405 int
2406 default FUNCTION_PADDING_CFI if CFI_CLANG
2407 default FUNCTION_ALIGNMENT
2408
931ab636
PZ
2409config CALL_PADDING
2410 def_bool n
2411 depends on CC_HAS_ENTRY_PADDING && OBJTOOL
2412 select FUNCTION_ALIGNMENT_16B
2413
2414config FINEIBT
2415 def_bool y
aefb2f2e 2416 depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE
931ab636
PZ
2417 select CALL_PADDING
2418
0c92385d
PZ
2419config FINEIBT_BHI
2420 def_bool y
2421 depends on FINEIBT && CC_HAS_KCFI_ARITY
2422
8f7c0d8b
TG
2423config HAVE_CALL_THUNKS
2424 def_bool y
0911b8c5 2425 depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL
8f7c0d8b
TG
2426
2427config CALL_THUNKS
2428 def_bool n
931ab636 2429 select CALL_PADDING
8f7c0d8b 2430
b341b20d
PZ
2431config PREFIX_SYMBOLS
2432 def_bool y
931ab636 2433 depends on CALL_PADDING && !CFI_CLANG
b341b20d 2434
fe42754b
SC
2435menuconfig CPU_MITIGATIONS
2436 bool "Mitigations for CPU vulnerabilities"
f43b9876
PZ
2437 default y
2438 help
fe42754b
SC
2439 Say Y here to enable options which enable mitigations for hardware
2440 vulnerabilities (usually related to speculative execution).
ce0abef6
SC
2441 Mitigations can be disabled or restricted to SMT systems at runtime
2442 via the "mitigations" kernel parameter.
f43b9876 2443
ce0abef6
SC
2444 If you say N, all mitigations will be disabled. This CANNOT be
2445 overridden at runtime.
2446
2447 Say 'Y', unless you really know what you are doing.
f43b9876 2448
fe42754b 2449if CPU_MITIGATIONS
f43b9876 2450
ea4654e0 2451config MITIGATION_PAGE_TABLE_ISOLATION
f43b9876
PZ
2452 bool "Remove the kernel mapping in user mode"
2453 default y
2454 depends on (X86_64 || X86_PAE)
2455 help
2456 This feature reduces the number of hardware side channels by
2457 ensuring that the majority of kernel addresses are not mapped
2458 into userspace.
2459
ff61f079 2460 See Documentation/arch/x86/pti.rst for more details.
f43b9876 2461
aefb2f2e 2462config MITIGATION_RETPOLINE
f43b9876
PZ
2463 bool "Avoid speculative indirect branches in kernel"
2464 select OBJTOOL if HAVE_OBJTOOL
2465 default y
2466 help
2467 Compile kernel with the retpoline compiler options to guard against
2468 kernel-to-user data leaks by avoiding speculative indirect
2469 branches. Requires a compiler with -mindirect-branch=thunk-extern
2470 support for full protection. The kernel may run slower.
2471
0911b8c5 2472config MITIGATION_RETHUNK
f43b9876 2473 bool "Enable return-thunks"
aefb2f2e 2474 depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK
f43b9876 2475 select OBJTOOL if HAVE_OBJTOOL
b648ab48 2476 default y if X86_64
f43b9876
PZ
2477 help
2478 Compile the kernel with the return-thunks compiler option to guard
2479 against kernel-to-user data leaks by avoiding return speculation.
2480 Requires a compiler with -mfunction-return=thunk-extern
2481 support for full protection. The kernel may run slower.
2482
ac61d439 2483config MITIGATION_UNRET_ENTRY
f43b9876 2484 bool "Enable UNRET on kernel entry"
0911b8c5 2485 depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64
f43b9876
PZ
2486 default y
2487 help
2488 Compile the kernel with support for the retbleed=unret mitigation.
2489
5fa31af3 2490config MITIGATION_CALL_DEPTH_TRACKING
80e4c1cd
TG
2491 bool "Mitigate RSB underflow with call depth tracking"
2492 depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS
2493 select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
2494 select CALL_THUNKS
2495 default y
2496 help
2497 Compile the kernel with call depth tracking to mitigate the Intel
86e39b94
BL
2498 SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off
2499 by default and needs to be enabled on the kernel command line via the
2500 retbleed=stuff option. For non-affected systems the overhead of this
2501 option is marginal as the call depth tracking is using run-time
2502 generated call thunks in a compiler generated padding area and call
2503 patching. This increases text size by ~5%. For non affected systems
2504 this space is unused. On affected SKL systems this results in a
2505 significant performance gain over the IBRS mitigation.
80e4c1cd 2506
e81dc127
TG
2507config CALL_THUNKS_DEBUG
2508 bool "Enable call thunks and call depth tracking debugging"
5fa31af3 2509 depends on MITIGATION_CALL_DEPTH_TRACKING
e81dc127
TG
2510 select FUNCTION_ALIGNMENT_32B
2511 default n
2512 help
2513 Enable call/ret counters for imbalance detection and build in
2514 a noisy dmesg about callthunks generation and call patching for
2515 trouble shooting. The debug prints need to be enabled on the
2516 kernel command line with 'debug-callthunks'.
54628de6
RD
2517 Only enable this when you are debugging call thunks as this
2518 creates a noticeable runtime overhead. If unsure say N.
80e4c1cd 2519
e0b8fcfa 2520config MITIGATION_IBPB_ENTRY
f43b9876 2521 bool "Enable IBPB on kernel entry"
b648ab48 2522 depends on CPU_SUP_AMD && X86_64
f43b9876
PZ
2523 default y
2524 help
318e8c33
PB
2525 Compile the kernel with support for the retbleed=ibpb and
2526 spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations.
f43b9876 2527
1da8d217 2528config MITIGATION_IBRS_ENTRY
f43b9876 2529 bool "Enable IBRS on kernel entry"
b648ab48 2530 depends on CPU_SUP_INTEL && X86_64
f43b9876
PZ
2531 default y
2532 help
2533 Compile the kernel with support for the spectre_v2=ibrs mitigation.
2534 This mitigates both spectre_v2 and retbleed at great cost to
2535 performance.
2536
a033eec9 2537config MITIGATION_SRSO
fb3bd914 2538 bool "Mitigate speculative RAS overflow on AMD"
0911b8c5 2539 depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK
fb3bd914
BPA
2540 default y
2541 help
2542 Enable the SRSO mitigation needed on AMD Zen1-4 machines.
2543
7b75782f 2544config MITIGATION_SLS
f43b9876
PZ
2545 bool "Mitigate Straight-Line-Speculation"
2546 depends on CC_HAS_SLS && X86_64
2547 select OBJTOOL if HAVE_OBJTOOL
2548 default n
2549 help
2550 Compile the kernel with straight-line-speculation options to guard
2551 against straight line speculation. The kernel image might be slightly
2552 larger.
2553
225f2bd0
BL
2554config MITIGATION_GDS
2555 bool "Mitigate Gather Data Sampling"
2556 depends on CPU_SUP_INTEL
2557 default y
2558 help
2559 Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware
2560 vulnerability which allows unprivileged speculative access to data
2561 which was previously stored in vector registers. The attacker uses gather
2562 instructions to infer the stale vector register data.
2563
8076fcde
PG
2564config MITIGATION_RFDS
2565 bool "RFDS Mitigation"
2566 depends on CPU_SUP_INTEL
2567 default y
2568 help
2569 Enable mitigation for Register File Data Sampling (RFDS) by default.
2570 RFDS is a hardware vulnerability which affects Intel Atom CPUs. It
2571 allows unprivileged speculative access to stale data previously
2572 stored in floating point, vector and integer registers.
2573 See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst>
2574
4f511739
JP
2575config MITIGATION_SPECTRE_BHI
2576 bool "Mitigate Spectre-BHB (Branch History Injection)"
ec9404e4 2577 depends on CPU_SUP_INTEL
4f511739 2578 default y
ec9404e4
PG
2579 help
2580 Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks
2581 where the branch history buffer is poisoned to speculatively steer
2582 indirect branches.
2583 See <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2584
94045568
BL
2585config MITIGATION_MDS
2586 bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug"
2587 depends on CPU_SUP_INTEL
2588 default y
2589 help
2590 Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is
2591 a hardware vulnerability which allows unprivileged speculative access
2592 to data which is available in various CPU internal buffers.
2593 See also <file:Documentation/admin-guide/hw-vuln/mds.rst>
b8da0b33
BL
2594
2595config MITIGATION_TAA
2596 bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug"
2597 depends on CPU_SUP_INTEL
2598 default y
2599 help
2600 Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware
2601 vulnerability that allows unprivileged speculative access to data
2602 which is available in various CPU internal buffers by using
2603 asynchronous aborts within an Intel TSX transactional region.
2604 See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst>
163f9fe6
BL
2605
2606config MITIGATION_MMIO_STALE_DATA
2607 bool "Mitigate MMIO Stale Data hardware bug"
2608 depends on CPU_SUP_INTEL
2609 default y
2610 help
2611 Enable mitigation for MMIO Stale Data hardware bugs. Processor MMIO
2612 Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO)
2613 vulnerabilities that can expose data. The vulnerabilities require the
2614 attacker to have access to MMIO.
2615 See also
2616 <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst>
3a4ee4ff
BL
2617
2618config MITIGATION_L1TF
2619 bool "Mitigate L1 Terminal Fault (L1TF) hardware bug"
2620 depends on CPU_SUP_INTEL
2621 default y
2622 help
2623 Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a
2624 hardware vulnerability which allows unprivileged speculative access to data
2625 available in the Level 1 Data Cache.
2626 See <file:Documentation/admin-guide/hw-vuln/l1tf.rst
894e2885
BL
2627
2628config MITIGATION_RETBLEED
2629 bool "Mitigate RETBleed hardware bug"
2630 depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY
2631 default y
2632 help
2633 Enable mitigation for RETBleed (Arbitrary Speculative Code Execution
2634 with Return Instructions) vulnerability. RETBleed is a speculative
2635 execution attack which takes advantage of microarchitectural behavior
2636 in many modern microprocessors, similar to Spectre v2. An
2637 unprivileged attacker can use these flaws to bypass conventional
2638 memory security restrictions to gain read access to privileged memory
2639 that would otherwise be inaccessible.
ca01c0d8
BL
2640
2641config MITIGATION_SPECTRE_V1
2642 bool "Mitigate SPECTRE V1 hardware bug"
2643 default y
2644 help
2645 Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a
2646 class of side channel attacks that takes advantage of speculative
2647 execution that bypasses conditional branch instructions used for
2648 memory access bounds check.
2649 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
a0b02e3f 2650
72c70f48
BL
2651config MITIGATION_SPECTRE_V2
2652 bool "Mitigate SPECTRE V2 hardware bug"
2653 default y
2654 help
2655 Enable mitigation for Spectre V2 (Branch Target Injection). Spectre
2656 V2 is a class of side channel attacks that takes advantage of
2657 indirect branch predictors inside the processor. In Spectre variant 2
2658 attacks, the attacker can steer speculative indirect branches in the
2659 victim to gadget code by poisoning the branch target buffer of a CPU
2660 used for predicting indirect branch addresses.
2661 See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2662
a0b02e3f
BL
2663config MITIGATION_SRBDS
2664 bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug"
2665 depends on CPU_SUP_INTEL
2666 default y
2667 help
2668 Enable mitigation for Special Register Buffer Data Sampling (SRBDS).
2669 SRBDS is a hardware vulnerability that allows Microarchitectural Data
2670 Sampling (MDS) techniques to infer values returned from special
2671 register accesses. An unprivileged user can extract values returned
2672 from RDRAND and RDSEED executed on another core or sibling thread
2673 using MDS techniques.
2674 See also
2675 <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst>
b908cdab
BL
2676
2677config MITIGATION_SSB
2678 bool "Mitigate Speculative Store Bypass (SSB) hardware bug"
2679 default y
2680 help
2681 Enable mitigation for Speculative Store Bypass (SSB). SSB is a
2682 hardware security vulnerability and its exploitation takes advantage
2683 of speculative execution in a similar way to the Meltdown and Spectre
2684 security vulnerabilities.
2685
8754e67a
PG
2686config MITIGATION_ITS
2687 bool "Enable Indirect Target Selection mitigation"
2688 depends on CPU_SUP_INTEL && X86_64
2689 depends on MITIGATION_RETPOLINE && MITIGATION_RETHUNK
872df34d 2690 select EXECMEM
8754e67a
PG
2691 default y
2692 help
2693 Enable Indirect Target Selection (ITS) mitigation. ITS is a bug in
2694 BPU on some Intel CPUs that may allow Spectre V2 style attacks. If
2695 disabled, mitigation cannot be enabled via cmdline.
2696 See <file:Documentation/admin-guide/hw-vuln/indirect-target-selection.rst>
2697
f43b9876
PZ
2698endif
2699
3072e413
MH
2700config ARCH_HAS_ADD_PAGES
2701 def_bool y
5c11f00b 2702 depends on ARCH_ENABLE_MEMORY_HOTPLUG
3072e413 2703
da85f865 2704menu "Power management and ACPI options"
e279b6c1
SR
2705
2706config ARCH_HIBERNATION_HEADER
3c2362e6 2707 def_bool y
44556530 2708 depends on HIBERNATION
e279b6c1
SR
2709
2710source "kernel/power/Kconfig"
2711
2712source "drivers/acpi/Kconfig"
2713
a6b68076 2714config X86_APM_BOOT
6fc108a0 2715 def_bool y
282e5aab 2716 depends on APM
a6b68076 2717
e279b6c1
SR
2718menuconfig APM
2719 tristate "APM (Advanced Power Management) BIOS support"
efefa6f6 2720 depends on X86_32 && PM_SLEEP
a7f7f624 2721 help
e279b6c1
SR
2722 APM is a BIOS specification for saving power using several different
2723 techniques. This is mostly useful for battery powered laptops with
2724 APM compliant BIOSes. If you say Y here, the system time will be
2725 reset after a RESUME operation, the /proc/apm device will provide
2726 battery status information, and user-space programs will receive
2727 notification of APM "events" (e.g. battery status change).
2728
2729 If you select "Y" here, you can disable actual use of the APM
2730 BIOS by passing the "apm=off" option to the kernel at boot time.
2731
2732 Note that the APM support is almost completely disabled for
2733 machines with more than one CPU.
2734
2735 In order to use APM, you will need supporting software. For location
151f4e2b 2736 and more information, read <file:Documentation/power/apm-acpi.rst>
2dc98fd3 2737 and the Battery Powered Linux mini-HOWTO, available from
e279b6c1
SR
2738 <http://www.tldp.org/docs.html#howto>.
2739
2740 This driver does not spin down disk drives (see the hdparm(8)
2741 manpage ("man 8 hdparm") for that), and it doesn't turn off
2742 VESA-compliant "green" monitors.
2743
2744 This driver does not support the TI 4000M TravelMate and the ACER
2745 486/DX4/75 because they don't have compliant BIOSes. Many "green"
2746 desktop machines also don't have compliant BIOSes, and this driver
2747 may cause those machines to panic during the boot phase.
2748
2749 Generally, if you don't have a battery in your machine, there isn't
2750 much point in using this driver and you should say N. If you get
2751 random kernel OOPSes or reboots that don't seem to be related to
2752 anything, try disabling/enabling this option (or disabling/enabling
2753 APM in your BIOS).
2754
2755 Some other things you should try when experiencing seemingly random,
2756 "weird" problems:
2757
2758 1) make sure that you have enough swap space and that it is
2759 enabled.
7987448f 2760 2) pass the "idle=poll" option to the kernel
e279b6c1
SR
2761 3) switch on floating point emulation in the kernel and pass
2762 the "no387" option to the kernel
2763 4) pass the "floppy=nodma" option to the kernel
2764 5) pass the "mem=4M" option to the kernel (thereby disabling
2765 all but the first 4 MB of RAM)
2766 6) make sure that the CPU is not over clocked.
2767 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/>
2768 8) disable the cache from your BIOS settings
2769 9) install a fan for the video card or exchange video RAM
2770 10) install a better fan for the CPU
2771 11) exchange RAM chips
2772 12) exchange the motherboard.
2773
2774 To compile this driver as a module, choose M here: the
2775 module will be called apm.
2776
2777if APM
2778
2779config APM_IGNORE_USER_SUSPEND
2780 bool "Ignore USER SUSPEND"
a7f7f624 2781 help
e279b6c1
SR
2782 This option will ignore USER SUSPEND requests. On machines with a
2783 compliant APM BIOS, you want to say N. However, on the NEC Versa M
2784 series notebooks, it is necessary to say Y because of a BIOS bug.
2785
2786config APM_DO_ENABLE
2787 bool "Enable PM at boot time"
a7f7f624 2788 help
e279b6c1
SR
2789 Enable APM features at boot time. From page 36 of the APM BIOS
2790 specification: "When disabled, the APM BIOS does not automatically
2791 power manage devices, enter the Standby State, enter the Suspend
2792 State, or take power saving steps in response to CPU Idle calls."
2793 This driver will make CPU Idle calls when Linux is idle (unless this
2794 feature is turned off -- see "Do CPU IDLE calls", below). This
2795 should always save battery power, but more complicated APM features
2796 will be dependent on your BIOS implementation. You may need to turn
2797 this option off if your computer hangs at boot time when using APM
2798 support, or if it beeps continuously instead of suspending. Turn
2799 this off if you have a NEC UltraLite Versa 33/C or a Toshiba
2800 T400CDT. This is off by default since most machines do fine without
2801 this feature.
2802
2803config APM_CPU_IDLE
dd8af076 2804 depends on CPU_IDLE
e279b6c1 2805 bool "Make CPU Idle calls when idle"
a7f7f624 2806 help
e279b6c1
SR
2807 Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
2808 On some machines, this can activate improved power savings, such as
2809 a slowed CPU clock rate, when the machine is idle. These idle calls
2810 are made after the idle loop has run for some length of time (e.g.,
2811 333 mS). On some machines, this will cause a hang at boot time or
2812 whenever the CPU becomes idle. (On machines with more than one CPU,
2813 this option does nothing.)
2814
2815config APM_DISPLAY_BLANK
2816 bool "Enable console blanking using APM"
a7f7f624 2817 help
e279b6c1
SR
2818 Enable console blanking using the APM. Some laptops can use this to
2819 turn off the LCD backlight when the screen blanker of the Linux
2820 virtual console blanks the screen. Note that this is only used by
2821 the virtual console screen blanker, and won't turn off the backlight
2822 when using the X Window system. This also doesn't have anything to
2823 do with your VESA-compliant power-saving monitor. Further, this
2824 option doesn't work for all laptops -- it might not turn off your
2825 backlight at all, or it might print a lot of errors to the console,
2826 especially if you are using gpm.
2827
2828config APM_ALLOW_INTS
2829 bool "Allow interrupts during APM BIOS calls"
a7f7f624 2830 help
e279b6c1
SR
2831 Normally we disable external interrupts while we are making calls to
2832 the APM BIOS as a measure to lessen the effects of a badly behaving
2833 BIOS implementation. The BIOS should reenable interrupts if it
2834 needs to. Unfortunately, some BIOSes do not -- especially those in
2835 many of the newer IBM Thinkpads. If you experience hangs when you
2836 suspend, try setting this to Y. Otherwise, say N.
2837
e279b6c1
SR
2838endif # APM
2839
bb0a56ec 2840source "drivers/cpufreq/Kconfig"
e279b6c1
SR
2841
2842source "drivers/cpuidle/Kconfig"
2843
27471fdb
AH
2844source "drivers/idle/Kconfig"
2845
e279b6c1
SR
2846endmenu
2847
e279b6c1
SR
2848menu "Bus options (PCI etc.)"
2849
e279b6c1
SR
2850choice
2851 prompt "PCI access mode"
efefa6f6 2852 depends on X86_32 && PCI
e279b6c1 2853 default PCI_GOANY
a7f7f624 2854 help
e279b6c1
SR
2855 On PCI systems, the BIOS can be used to detect the PCI devices and
2856 determine their configuration. However, some old PCI motherboards
2857 have BIOS bugs and may crash if this is done. Also, some embedded
2858 PCI-based systems don't have any BIOS at all. Linux can also try to
2859 detect the PCI hardware directly without using the BIOS.
2860
2861 With this option, you can specify how Linux should detect the
2862 PCI devices. If you choose "BIOS", the BIOS will be used,
2863 if you choose "Direct", the BIOS won't be used, and if you
2864 choose "MMConfig", then PCI Express MMCONFIG will be used.
2865 If you choose "Any", the kernel will try MMCONFIG, then the
2866 direct access method and falls back to the BIOS if that doesn't
2867 work. If unsure, go with the default, which is "Any".
2868
2869config PCI_GOBIOS
2870 bool "BIOS"
2871
2872config PCI_GOMMCONFIG
2873 bool "MMConfig"
2874
2875config PCI_GODIRECT
2876 bool "Direct"
2877
3ef0e1f8 2878config PCI_GOOLPC
76fb6570 2879 bool "OLPC XO-1"
3ef0e1f8
AS
2880 depends on OLPC
2881
2bdd1b03
AS
2882config PCI_GOANY
2883 bool "Any"
2884
e279b6c1
SR
2885endchoice
2886
2887config PCI_BIOS
3c2362e6 2888 def_bool y
efefa6f6 2889 depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY)
e279b6c1
SR
2890
2891# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
2892config PCI_DIRECT
3c2362e6 2893 def_bool y
0aba496f 2894 depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG))
e279b6c1
SR
2895
2896config PCI_MMCONFIG
b45c9f36
JK
2897 bool "Support mmconfig PCI config space access" if X86_64
2898 default y
4590d98f 2899 depends on PCI && (ACPI || JAILHOUSE_GUEST)
b45c9f36 2900 depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG)
21d8fb8d
MJ
2901 help
2902 Add support for accessing the PCI configuration space as a memory
2903 mapped area. It is the recommended method if the system supports
2904 this (it must have PCI Express and ACPI for it to be available).
2905
2906 In the unlikely case that enabling this configuration option causes
2907 problems, the mechanism can be switched off with the 'pci=nommconf'
2908 command line parameter.
2909
2910 Say N only if you are sure that your platform does not support this
2911 access method or you have problems caused by it.
2912
2913 Say Y otherwise.
e279b6c1 2914
3ef0e1f8 2915config PCI_OLPC
2bdd1b03
AS
2916 def_bool y
2917 depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY)
3ef0e1f8 2918
b5401a96
AN
2919config PCI_XEN
2920 def_bool y
2921 depends on PCI && XEN
b5401a96 2922
8364e1f8
JK
2923config MMCONF_FAM10H
2924 def_bool y
2925 depends on X86_64 && PCI_MMCONFIG && ACPI
e279b6c1 2926
3f6ea84a 2927config PCI_CNB20LE_QUIRK
d9f87802
MJ
2928 bool "Read PCI host bridge windows from the CNB20LE chipset" if EXPERT
2929 depends on X86_32 && PCI
3f6ea84a
IS
2930 help
2931 Read the PCI windows out of the CNB20LE host bridge. This allows
2932 PCI hotplug to work on systems with the CNB20LE chipset which do
2933 not have ACPI.
2934
d9f87802
MJ
2935 The ServerWorks (later Broadcom) CNB20LE was a chipset designed
2936 most probably only for Pentium III.
2937
2938 To find out if you have such a chipset, search for a PCI device with
2939 1166:0009 PCI IDs, for example by executing
2940 lspci -nn | grep '1166:0009'
2941 The code is inactive if there is none.
2942
64a5fed6
BH
2943 There's no public spec for this chipset, and this functionality
2944 is known to be incomplete.
2945
2946 You should say N unless you know you need this.
2947
3a495511 2948config ISA_BUS
17a2a129 2949 bool "ISA bus support on modern systems" if EXPERT
3a495511 2950 help
17a2a129
WBG
2951 Expose ISA bus device drivers and options available for selection and
2952 configuration. Enable this option if your target machine has an ISA
2953 bus. ISA is an older system, displaced by PCI and newer bus
2954 architectures -- if your target machine is modern, it probably does
2955 not have an ISA bus.
3a495511
WBG
2956
2957 If unsure, say N.
2958
1c00f016 2959# x86_64 have no ISA slots, but can have ISA-style DMA.
e279b6c1 2960config ISA_DMA_API
1c00f016
DR
2961 bool "ISA-style DMA support" if (X86_64 && EXPERT)
2962 default y
2963 help
2964 Enables ISA-style DMA support for devices requiring such controllers.
2965 If unsure, say Y.
e279b6c1 2966
51e68d05
LT
2967if X86_32
2968
e279b6c1
SR
2969config ISA
2970 bool "ISA support"
a7f7f624 2971 help
e279b6c1
SR
2972 Find out whether you have ISA slots on your motherboard. ISA is the
2973 name of a bus system, i.e. the way the CPU talks to the other stuff
2974 inside your box. Other bus systems are PCI, EISA, MicroChannel
2975 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
2976 newer boards don't support it. If you have ISA, say Y, otherwise N.
2977
e279b6c1
SR
2978config SCx200
2979 tristate "NatSemi SCx200 support"
a7f7f624 2980 help
e279b6c1
SR
2981 This provides basic support for National Semiconductor's
2982 (now AMD's) Geode processors. The driver probes for the
2983 PCI-IDs of several on-chip devices, so its a good dependency
2984 for other scx200_* drivers.
2985
2986 If compiled as a module, the driver is named scx200.
2987
2988config SCx200HR_TIMER
2989 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
592913ec 2990 depends on SCx200
e279b6c1 2991 default y
a7f7f624 2992 help
e279b6c1
SR
2993 This driver provides a clocksource built upon the on-chip
2994 27MHz high-resolution timer. Its also a workaround for
2995 NSC Geode SC-1100's buggy TSC, which loses time when the
2996 processor goes idle (as is done by the scheduler). The
2997 other workaround is idle=poll boot option.
2998
3ef0e1f8
AS
2999config OLPC
3000 bool "One Laptop Per Child support"
54008979 3001 depends on !X86_PAE
3c554946 3002 select GPIOLIB
dc3119e7 3003 select OF
45bb1674 3004 select OF_PROMTREE
b4e51854 3005 select IRQ_DOMAIN
0c3d931b 3006 select OLPC_EC
a7f7f624 3007 help
3ef0e1f8
AS
3008 Add support for detecting the unique features of the OLPC
3009 XO hardware.
3010
a3128588
DD
3011config OLPC_XO1_PM
3012 bool "OLPC XO-1 Power Management"
fa112cf1 3013 depends on OLPC && MFD_CS5535=y && PM_SLEEP
a7f7f624 3014 help
97c4cb71 3015 Add support for poweroff and suspend of the OLPC XO-1 laptop.
bf1ebf00 3016
cfee9597
DD
3017config OLPC_XO1_RTC
3018 bool "OLPC XO-1 Real Time Clock"
3019 depends on OLPC_XO1_PM && RTC_DRV_CMOS
a7f7f624 3020 help
cfee9597
DD
3021 Add support for the XO-1 real time clock, which can be used as a
3022 programmable wakeup source.
3023
7feda8e9
DD
3024config OLPC_XO1_SCI
3025 bool "OLPC XO-1 SCI extras"
92e830f2 3026 depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y
ed8e47fe 3027 depends on INPUT=y
d8d01a63 3028 select POWER_SUPPLY
a7f7f624 3029 help
7feda8e9 3030 Add support for SCI-based features of the OLPC XO-1 laptop:
7bc74b3d 3031 - EC-driven system wakeups
7feda8e9 3032 - Power button
7bc74b3d 3033 - Ebook switch
2cf2baea 3034 - Lid switch
e1040ac6
DD
3035 - AC adapter status updates
3036 - Battery status updates
7feda8e9 3037
a0f30f59
DD
3038config OLPC_XO15_SCI
3039 bool "OLPC XO-1.5 SCI extras"
d8d01a63
DD
3040 depends on OLPC && ACPI
3041 select POWER_SUPPLY
a7f7f624 3042 help
a0f30f59
DD
3043 Add support for SCI-based features of the OLPC XO-1.5 laptop:
3044 - EC-driven system wakeups
3045 - AC adapter status updates
3046 - Battery status updates
bf1ebf00 3047
298c9bab
DT
3048config GEODE_COMMON
3049 bool
3050
d4f3e350
EW
3051config ALIX
3052 bool "PCEngines ALIX System Support (LED setup)"
3053 select GPIOLIB
298c9bab 3054 select GEODE_COMMON
a7f7f624 3055 help
d4f3e350
EW
3056 This option enables system support for the PCEngines ALIX.
3057 At present this just sets up LEDs for GPIO control on
3058 ALIX2/3/6 boards. However, other system specific setup should
3059 get added here.
3060
3061 Note: You must still enable the drivers for GPIO and LED support
3062 (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs
3063
3064 Note: You have to set alix.force=1 for boards with Award BIOS.
3065
da4e3302
PP
3066config NET5501
3067 bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)"
3068 select GPIOLIB
298c9bab 3069 select GEODE_COMMON
a7f7f624 3070 help
da4e3302
PP
3071 This option enables system support for the Soekris Engineering net5501.
3072
3197059a
PP
3073config GEOS
3074 bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)"
3075 select GPIOLIB
298c9bab 3076 select GEODE_COMMON
3197059a 3077 depends on DMI
a7f7f624 3078 help
3197059a
PP
3079 This option enables system support for the Traverse Technologies GEOS.
3080
7d029125
VD
3081config TS5500
3082 bool "Technologic Systems TS-5500 platform support"
3083 depends on MELAN
3084 select CHECK_SIGNATURE
3085 select NEW_LEDS
3086 select LEDS_CLASS
a7f7f624 3087 help
7d029125
VD
3088 This option enables system support for the Technologic Systems TS-5500.
3089
bc0120fd
SR
3090endif # X86_32
3091
23ac4ae8 3092config AMD_NB
e6e6e5e8
YG
3093 def_bool y
3094 depends on AMD_NODE
3095
3096config AMD_NODE
e279b6c1 3097 def_bool y
0e152cd7 3098 depends on CPU_SUP_AMD && PCI
e279b6c1 3099
e279b6c1
SR
3100endmenu
3101
1572497c 3102menu "Binary Emulations"
e279b6c1
SR
3103
3104config IA32_EMULATION
3105 bool "IA32 Emulation"
3106 depends on X86_64
39f88911 3107 select ARCH_WANT_OLD_COMPAT_IPC
d1603990 3108 select BINFMT_ELF
39f88911 3109 select COMPAT_OLD_SIGACTION
a7f7f624 3110 help
5fd92e65
L
3111 Include code to run legacy 32-bit programs under a
3112 64-bit kernel. You should likely turn this on, unless you're
3113 100% sure that you don't have any 32-bit programs left.
e279b6c1 3114
a11e0975
NB
3115config IA32_EMULATION_DEFAULT_DISABLED
3116 bool "IA32 emulation disabled by default"
3117 default n
3118 depends on IA32_EMULATION
3119 help
3120 Make IA32 emulation disabled by default. This prevents loading 32-bit
3121 processes and access to 32-bit syscalls. If unsure, leave it to its
3122 default value.
3123
83a44a4f 3124config X86_X32_ABI
6ea30386 3125 bool "x32 ABI for 64-bit mode"
9b54050b 3126 depends on X86_64
aaeed6ec
NC
3127 # llvm-objcopy does not convert x86_64 .note.gnu.property or
3128 # compressed debug sections to x86_x32 properly:
3129 # https://github.com/ClangBuiltLinux/linux/issues/514
3130 # https://github.com/ClangBuiltLinux/linux/issues/1141
3131 depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm)
a7f7f624 3132 help
5fd92e65
L
3133 Include code to run binaries for the x32 native 32-bit ABI
3134 for 64-bit processors. An x32 process gets access to the
3135 full 64-bit register file and wide data path while leaving
3136 pointers at 32 bits for smaller memory footprint.
3137
953fee1d
IM
3138config COMPAT_32
3139 def_bool y
3140 depends on IA32_EMULATION || X86_32
3141 select HAVE_UID16
3142 select OLD_SIGSUSPEND3
3143
e279b6c1 3144config COMPAT
3c2362e6 3145 def_bool y
83a44a4f 3146 depends on IA32_EMULATION || X86_X32_ABI
e279b6c1
SR
3147
3148config COMPAT_FOR_U64_ALIGNMENT
3120e25e 3149 def_bool y
a9251280 3150 depends on COMPAT
ee009e4a 3151
e279b6c1
SR
3152endmenu
3153
e5beae16
KP
3154config HAVE_ATOMIC_IOMAP
3155 def_bool y
3156 depends on X86_32
3157
edf88417 3158source "arch/x86/kvm/Kconfig"
5e8ebd84 3159
3d37d939
PAI
3160source "arch/x86/Kconfig.cpufeatures"
3161
5e8ebd84 3162source "arch/x86/Kconfig.assembler"