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56372b0b G |
1 | /* |
2 | * linux/arch/unicore32/mm/mmu.c | |
3 | * | |
4 | * Code specific to PKUnity SoC and UniCore ISA | |
5 | * | |
6 | * Copyright (C) 2001-2010 GUAN Xue-tao | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/mman.h> | |
17 | #include <linux/nodemask.h> | |
18 | #include <linux/memblock.h> | |
19 | #include <linux/fs.h> | |
56372b0b G |
20 | #include <linux/io.h> |
21 | ||
22 | #include <asm/cputype.h> | |
23 | #include <asm/sections.h> | |
24 | #include <asm/setup.h> | |
25 | #include <asm/sizes.h> | |
26 | #include <asm/tlb.h> | |
1c16d242 | 27 | #include <asm/memblock.h> |
56372b0b G |
28 | |
29 | #include <mach/map.h> | |
30 | ||
31 | #include "mm.h" | |
32 | ||
56372b0b G |
33 | /* |
34 | * empty_zero_page is a special page that is used for | |
35 | * zero-initialized data and COW. | |
36 | */ | |
37 | struct page *empty_zero_page; | |
38 | EXPORT_SYMBOL(empty_zero_page); | |
39 | ||
40 | /* | |
41 | * The pmd table for the upper-most set of pages. | |
42 | */ | |
43 | pmd_t *top_pmd; | |
44 | ||
45 | pgprot_t pgprot_user; | |
46 | EXPORT_SYMBOL(pgprot_user); | |
47 | ||
48 | pgprot_t pgprot_kernel; | |
49 | EXPORT_SYMBOL(pgprot_kernel); | |
50 | ||
51 | static int __init noalign_setup(char *__unused) | |
52 | { | |
53 | cr_alignment &= ~CR_A; | |
54 | cr_no_alignment &= ~CR_A; | |
55 | set_cr(cr_alignment); | |
56 | return 1; | |
57 | } | |
58 | __setup("noalign", noalign_setup); | |
59 | ||
60 | void adjust_cr(unsigned long mask, unsigned long set) | |
61 | { | |
62 | unsigned long flags; | |
63 | ||
64 | mask &= ~CR_A; | |
65 | ||
66 | set &= mask; | |
67 | ||
68 | local_irq_save(flags); | |
69 | ||
70 | cr_no_alignment = (cr_no_alignment & ~mask) | set; | |
71 | cr_alignment = (cr_alignment & ~mask) | set; | |
72 | ||
73 | set_cr((get_cr() & ~mask) | set); | |
74 | ||
75 | local_irq_restore(flags); | |
76 | } | |
77 | ||
78 | struct map_desc { | |
79 | unsigned long virtual; | |
80 | unsigned long pfn; | |
81 | unsigned long length; | |
82 | unsigned int type; | |
83 | }; | |
84 | ||
85 | #define PROT_PTE_DEVICE (PTE_PRESENT | PTE_YOUNG | \ | |
86 | PTE_DIRTY | PTE_READ | PTE_WRITE) | |
87 | #define PROT_SECT_DEVICE (PMD_TYPE_SECT | PMD_PRESENT | \ | |
88 | PMD_SECT_READ | PMD_SECT_WRITE) | |
89 | ||
90 | static struct mem_type mem_types[] = { | |
91 | [MT_DEVICE] = { /* Strongly ordered */ | |
92 | .prot_pte = PROT_PTE_DEVICE, | |
93 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
94 | .prot_sect = PROT_SECT_DEVICE, | |
95 | }, | |
96 | /* | |
97 | * MT_KUSER: pte for vecpage -- cacheable, | |
98 | * and sect for unigfx mmap -- noncacheable | |
99 | */ | |
100 | [MT_KUSER] = { | |
101 | .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | | |
102 | PTE_CACHEABLE | PTE_READ | PTE_EXEC, | |
103 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
104 | .prot_sect = PROT_SECT_DEVICE, | |
105 | }, | |
106 | [MT_HIGH_VECTORS] = { | |
107 | .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | | |
108 | PTE_CACHEABLE | PTE_READ | PTE_WRITE | | |
109 | PTE_EXEC, | |
110 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
111 | }, | |
112 | [MT_MEMORY] = { | |
113 | .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | | |
114 | PTE_WRITE | PTE_EXEC, | |
115 | .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, | |
116 | .prot_sect = PMD_TYPE_SECT | PMD_PRESENT | PMD_SECT_CACHEABLE | | |
117 | PMD_SECT_READ | PMD_SECT_WRITE | PMD_SECT_EXEC, | |
118 | }, | |
119 | [MT_ROM] = { | |
120 | .prot_sect = PMD_TYPE_SECT | PMD_PRESENT | PMD_SECT_CACHEABLE | | |
121 | PMD_SECT_READ, | |
122 | }, | |
123 | }; | |
124 | ||
125 | const struct mem_type *get_mem_type(unsigned int type) | |
126 | { | |
127 | return type < ARRAY_SIZE(mem_types) ? &mem_types[type] : NULL; | |
128 | } | |
129 | EXPORT_SYMBOL(get_mem_type); | |
130 | ||
131 | /* | |
132 | * Adjust the PMD section entries according to the CPU in use. | |
133 | */ | |
134 | static void __init build_mem_type_table(void) | |
135 | { | |
136 | pgprot_user = __pgprot(PTE_PRESENT | PTE_YOUNG | PTE_CACHEABLE); | |
137 | pgprot_kernel = __pgprot(PTE_PRESENT | PTE_YOUNG | | |
138 | PTE_DIRTY | PTE_READ | PTE_WRITE | | |
139 | PTE_EXEC | PTE_CACHEABLE); | |
140 | } | |
141 | ||
142 | #define vectors_base() (vectors_high() ? 0xffff0000 : 0) | |
143 | ||
144 | static void __init *early_alloc(unsigned long sz) | |
145 | { | |
9a8dd708 | 146 | void *ptr = __va(memblock_phys_alloc(sz, sz)); |
56372b0b G |
147 | memset(ptr, 0, sz); |
148 | return ptr; | |
149 | } | |
150 | ||
151 | static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, | |
152 | unsigned long prot) | |
153 | { | |
154 | if (pmd_none(*pmd)) { | |
155 | pte_t *pte = early_alloc(PTRS_PER_PTE * sizeof(pte_t)); | |
156 | __pmd_populate(pmd, __pa(pte) | prot); | |
157 | } | |
158 | BUG_ON(pmd_bad(*pmd)); | |
159 | return pte_offset_kernel(pmd, addr); | |
160 | } | |
161 | ||
162 | static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr, | |
163 | unsigned long end, unsigned long pfn, | |
164 | const struct mem_type *type) | |
165 | { | |
166 | pte_t *pte = early_pte_alloc(pmd, addr, type->prot_l1); | |
167 | do { | |
168 | set_pte(pte, pfn_pte(pfn, __pgprot(type->prot_pte))); | |
169 | pfn++; | |
170 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
171 | } | |
172 | ||
173 | static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, | |
174 | unsigned long end, unsigned long phys, | |
175 | const struct mem_type *type) | |
176 | { | |
177 | pmd_t *pmd = pmd_offset((pud_t *)pgd, addr); | |
178 | ||
179 | /* | |
180 | * Try a section mapping - end, addr and phys must all be aligned | |
181 | * to a section boundary. | |
182 | */ | |
183 | if (((addr | end | phys) & ~SECTION_MASK) == 0) { | |
184 | pmd_t *p = pmd; | |
185 | ||
186 | do { | |
187 | set_pmd(pmd, __pmd(phys | type->prot_sect)); | |
188 | phys += SECTION_SIZE; | |
189 | } while (pmd++, addr += SECTION_SIZE, addr != end); | |
190 | ||
191 | flush_pmd_entry(p); | |
192 | } else { | |
193 | /* | |
194 | * No need to loop; pte's aren't interested in the | |
195 | * individual L1 entries. | |
196 | */ | |
197 | alloc_init_pte(pmd, addr, end, __phys_to_pfn(phys), type); | |
198 | } | |
199 | } | |
200 | ||
201 | /* | |
202 | * Create the page directory entries and any necessary | |
203 | * page tables for the mapping specified by `md'. We | |
204 | * are able to cope here with varying sizes and address | |
205 | * offsets, and we take full advantage of sections. | |
206 | */ | |
207 | static void __init create_mapping(struct map_desc *md) | |
208 | { | |
209 | unsigned long phys, addr, length, end; | |
210 | const struct mem_type *type; | |
211 | pgd_t *pgd; | |
212 | ||
213 | if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { | |
214 | printk(KERN_WARNING "BUG: not creating mapping for " | |
215 | "0x%08llx at 0x%08lx in user region\n", | |
216 | __pfn_to_phys((u64)md->pfn), md->virtual); | |
217 | return; | |
218 | } | |
219 | ||
220 | if ((md->type == MT_DEVICE || md->type == MT_ROM) && | |
221 | md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { | |
222 | printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx " | |
223 | "overlaps vmalloc space\n", | |
224 | __pfn_to_phys((u64)md->pfn), md->virtual); | |
225 | } | |
226 | ||
227 | type = &mem_types[md->type]; | |
228 | ||
229 | addr = md->virtual & PAGE_MASK; | |
230 | phys = (unsigned long)__pfn_to_phys(md->pfn); | |
231 | length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); | |
232 | ||
233 | if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) { | |
234 | printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " | |
235 | "be mapped using pages, ignoring.\n", | |
236 | __pfn_to_phys(md->pfn), addr); | |
237 | return; | |
238 | } | |
239 | ||
240 | pgd = pgd_offset_k(addr); | |
241 | end = addr + length; | |
242 | do { | |
243 | unsigned long next = pgd_addr_end(addr, end); | |
244 | ||
245 | alloc_init_section(pgd, addr, next, phys, type); | |
246 | ||
247 | phys += next - addr; | |
248 | addr = next; | |
249 | } while (pgd++, addr != end); | |
250 | } | |
251 | ||
252 | static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M); | |
253 | ||
254 | /* | |
255 | * vmalloc=size forces the vmalloc area to be exactly 'size' | |
256 | * bytes. This can be used to increase (or decrease) the vmalloc | |
257 | * area - the default is 128m. | |
258 | */ | |
259 | static int __init early_vmalloc(char *arg) | |
260 | { | |
261 | unsigned long vmalloc_reserve = memparse(arg, NULL); | |
262 | ||
263 | if (vmalloc_reserve < SZ_16M) { | |
264 | vmalloc_reserve = SZ_16M; | |
265 | printk(KERN_WARNING | |
266 | "vmalloc area too small, limiting to %luMB\n", | |
267 | vmalloc_reserve >> 20); | |
268 | } | |
269 | ||
270 | if (vmalloc_reserve > VMALLOC_END - (PAGE_OFFSET + SZ_32M)) { | |
271 | vmalloc_reserve = VMALLOC_END - (PAGE_OFFSET + SZ_32M); | |
272 | printk(KERN_WARNING | |
273 | "vmalloc area is too big, limiting to %luMB\n", | |
274 | vmalloc_reserve >> 20); | |
275 | } | |
276 | ||
277 | vmalloc_min = (void *)(VMALLOC_END - vmalloc_reserve); | |
278 | return 0; | |
279 | } | |
280 | early_param("vmalloc", early_vmalloc); | |
281 | ||
282 | static phys_addr_t lowmem_limit __initdata = SZ_1G; | |
283 | ||
284 | static void __init sanity_check_meminfo(void) | |
285 | { | |
286 | int i, j; | |
287 | ||
288 | lowmem_limit = __pa(vmalloc_min - 1) + 1; | |
289 | memblock_set_current_limit(lowmem_limit); | |
290 | ||
291 | for (i = 0, j = 0; i < meminfo.nr_banks; i++) { | |
292 | struct membank *bank = &meminfo.bank[j]; | |
293 | *bank = meminfo.bank[i]; | |
294 | j++; | |
295 | } | |
296 | meminfo.nr_banks = j; | |
297 | } | |
298 | ||
299 | static inline void prepare_page_table(void) | |
300 | { | |
301 | unsigned long addr; | |
302 | phys_addr_t end; | |
303 | ||
304 | /* | |
305 | * Clear out all the mappings below the kernel image. | |
306 | */ | |
307 | for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE) | |
308 | pmd_clear(pmd_off_k(addr)); | |
309 | ||
310 | for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE) | |
311 | pmd_clear(pmd_off_k(addr)); | |
312 | ||
313 | /* | |
314 | * Find the end of the first block of lowmem. | |
315 | */ | |
316 | end = memblock.memory.regions[0].base + memblock.memory.regions[0].size; | |
317 | if (end >= lowmem_limit) | |
318 | end = lowmem_limit; | |
319 | ||
320 | /* | |
321 | * Clear out all the kernel space mappings, except for the first | |
322 | * memory bank, up to the end of the vmalloc region. | |
323 | */ | |
324 | for (addr = __phys_to_virt(end); | |
325 | addr < VMALLOC_END; addr += PGDIR_SIZE) | |
326 | pmd_clear(pmd_off_k(addr)); | |
327 | } | |
328 | ||
329 | /* | |
330 | * Reserve the special regions of memory | |
331 | */ | |
332 | void __init uc32_mm_memblock_reserve(void) | |
333 | { | |
334 | /* | |
335 | * Reserve the page tables. These are already in use, | |
336 | * and can only be in node 0. | |
337 | */ | |
338 | memblock_reserve(__pa(swapper_pg_dir), PTRS_PER_PGD * sizeof(pgd_t)); | |
56372b0b G |
339 | } |
340 | ||
341 | /* | |
342 | * Set up device the mappings. Since we clear out the page tables for all | |
343 | * mappings above VMALLOC_END, we will remove any debug device mappings. | |
344 | * This means you have to be careful how you debug this function, or any | |
345 | * called function. This means you can't use any function or debugging | |
346 | * method which may touch any device, otherwise the kernel _will_ crash. | |
347 | */ | |
348 | static void __init devicemaps_init(void) | |
349 | { | |
350 | struct map_desc map; | |
351 | unsigned long addr; | |
352 | void *vectors; | |
353 | ||
354 | /* | |
355 | * Allocate the vector page early. | |
356 | */ | |
357 | vectors = early_alloc(PAGE_SIZE); | |
358 | ||
359 | for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) | |
360 | pmd_clear(pmd_off_k(addr)); | |
361 | ||
56372b0b G |
362 | /* |
363 | * Create a mapping for the machine vectors at the high-vectors | |
364 | * location (0xffff0000). If we aren't using high-vectors, also | |
365 | * create a mapping at the low-vectors virtual address. | |
366 | */ | |
367 | map.pfn = __phys_to_pfn(virt_to_phys(vectors)); | |
368 | map.virtual = VECTORS_BASE; | |
369 | map.length = PAGE_SIZE; | |
370 | map.type = MT_HIGH_VECTORS; | |
371 | create_mapping(&map); | |
372 | ||
373 | /* | |
374 | * Create a mapping for the kuser page at the special | |
375 | * location (0xbfff0000) to the same vectors location. | |
376 | */ | |
377 | map.pfn = __phys_to_pfn(virt_to_phys(vectors)); | |
378 | map.virtual = KUSER_VECPAGE_BASE; | |
379 | map.length = PAGE_SIZE; | |
380 | map.type = MT_KUSER; | |
381 | create_mapping(&map); | |
382 | ||
383 | /* | |
384 | * Finally flush the caches and tlb to ensure that we're in a | |
385 | * consistent state wrt the writebuffer. This also ensures that | |
386 | * any write-allocated cache lines in the vector page are written | |
387 | * back. After this point, we can start to touch devices again. | |
388 | */ | |
389 | local_flush_tlb_all(); | |
390 | flush_cache_all(); | |
391 | } | |
392 | ||
393 | static void __init map_lowmem(void) | |
394 | { | |
395 | struct memblock_region *reg; | |
396 | ||
397 | /* Map all the lowmem memory banks. */ | |
398 | for_each_memblock(memory, reg) { | |
399 | phys_addr_t start = reg->base; | |
400 | phys_addr_t end = start + reg->size; | |
401 | struct map_desc map; | |
402 | ||
403 | if (end > lowmem_limit) | |
404 | end = lowmem_limit; | |
405 | if (start >= end) | |
406 | break; | |
407 | ||
408 | map.pfn = __phys_to_pfn(start); | |
409 | map.virtual = __phys_to_virt(start); | |
410 | map.length = end - start; | |
411 | map.type = MT_MEMORY; | |
412 | ||
413 | create_mapping(&map); | |
414 | } | |
415 | } | |
416 | ||
417 | /* | |
418 | * paging_init() sets up the page tables, initialises the zone memory | |
419 | * maps, and sets up the zero page, bad page and bad page tables. | |
420 | */ | |
421 | void __init paging_init(void) | |
422 | { | |
423 | void *zero_page; | |
424 | ||
425 | build_mem_type_table(); | |
426 | sanity_check_meminfo(); | |
427 | prepare_page_table(); | |
428 | map_lowmem(); | |
429 | devicemaps_init(); | |
430 | ||
431 | top_pmd = pmd_off_k(0xffff0000); | |
432 | ||
433 | /* allocate the zero page. */ | |
434 | zero_page = early_alloc(PAGE_SIZE); | |
435 | ||
436 | bootmem_init(); | |
437 | ||
438 | empty_zero_page = virt_to_page(zero_page); | |
439 | __flush_dcache_page(NULL, empty_zero_page); | |
440 | } | |
441 | ||
442 | /* | |
443 | * In order to soft-boot, we need to insert a 1:1 mapping in place of | |
444 | * the user-mode pages. This will then ensure that we have predictable | |
445 | * results when turning the mmu off | |
446 | */ | |
c97a7008 | 447 | void setup_mm_for_reboot(void) |
56372b0b G |
448 | { |
449 | unsigned long base_pmdval; | |
450 | pgd_t *pgd; | |
451 | int i; | |
452 | ||
453 | /* | |
454 | * We need to access to user-mode page tables here. For kernel threads | |
455 | * we don't have any user-mode mappings so we use the context that we | |
456 | * "borrowed". | |
457 | */ | |
458 | pgd = current->active_mm->pgd; | |
459 | ||
460 | base_pmdval = PMD_SECT_WRITE | PMD_SECT_READ | PMD_TYPE_SECT; | |
461 | ||
462 | for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) { | |
463 | unsigned long pmdval = (i << PGDIR_SHIFT) | base_pmdval; | |
464 | pmd_t *pmd; | |
465 | ||
466 | pmd = pmd_off(pgd, i << PGDIR_SHIFT); | |
467 | set_pmd(pmd, __pmd(pmdval)); | |
468 | flush_pmd_entry(pmd); | |
469 | } | |
470 | ||
471 | local_flush_tlb_all(); | |
472 | } | |
473 | ||
474 | /* | |
475 | * Take care of architecture specific things when placing a new PTE into | |
476 | * a page table, or changing an existing PTE. Basically, there are two | |
477 | * things that we need to take care of: | |
478 | * | |
479 | * 1. If PG_dcache_clean is not set for the page, we need to ensure | |
480 | * that any cache entries for the kernels virtual memory | |
481 | * range are written back to the page. | |
482 | * 2. If we have multiple shared mappings of the same space in | |
483 | * an object, we need to deal with the cache aliasing issues. | |
484 | * | |
485 | * Note that the pte lock will be held. | |
486 | */ | |
487 | void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, | |
488 | pte_t *ptep) | |
489 | { | |
490 | unsigned long pfn = pte_pfn(*ptep); | |
491 | struct address_space *mapping; | |
492 | struct page *page; | |
493 | ||
494 | if (!pfn_valid(pfn)) | |
495 | return; | |
496 | ||
497 | /* | |
498 | * The zero page is never written to, so never has any dirty | |
499 | * cache lines, and therefore never needs to be flushed. | |
500 | */ | |
501 | page = pfn_to_page(pfn); | |
502 | if (page == ZERO_PAGE(0)) | |
503 | return; | |
504 | ||
cb9f753a | 505 | mapping = page_mapping_file(page); |
56372b0b G |
506 | if (!test_and_set_bit(PG_dcache_clean, &page->flags)) |
507 | __flush_dcache_page(mapping, page); | |
508 | if (mapping) | |
509 | if (vma->vm_flags & VM_EXEC) | |
510 | __flush_icache_all(); | |
511 | } |