tile: don't assume user privilege is zero
[linux-2.6-block.git] / arch / tile / mm / fault.c
CommitLineData
867e359b
CM
1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 *
14 * From i386 code copyright (C) 1995 Linus Torvalds
15 */
16
17#include <linux/signal.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/errno.h>
21#include <linux/string.h>
22#include <linux/types.h>
23#include <linux/ptrace.h>
24#include <linux/mman.h>
25#include <linux/mm.h>
26#include <linux/smp.h>
867e359b
CM
27#include <linux/interrupt.h>
28#include <linux/init.h>
29#include <linux/tty.h>
30#include <linux/vt_kern.h> /* For unblank_screen() */
31#include <linux/highmem.h>
32#include <linux/module.h>
33#include <linux/kprobes.h>
34#include <linux/hugetlb.h>
35#include <linux/syscalls.h>
36#include <linux/uaccess.h>
3fa17c39 37#include <linux/kdebug.h>
867e359b 38
867e359b
CM
39#include <asm/pgalloc.h>
40#include <asm/sections.h>
0707ad30
CM
41#include <asm/traps.h>
42#include <asm/syscalls.h>
867e359b
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43
44#include <arch/interrupts.h>
45
571d76ac
CM
46static noinline void force_sig_info_fault(const char *type, int si_signo,
47 int si_code, unsigned long address,
48 int fault_num,
49 struct task_struct *tsk,
50 struct pt_regs *regs)
867e359b
CM
51{
52 siginfo_t info;
53
54 if (unlikely(tsk->pid < 2)) {
55 panic("Signal %d (code %d) at %#lx sent to %s!",
56 si_signo, si_code & 0xffff, address,
a95f8817 57 is_idle_task(tsk) ? "the idle task" : "init");
867e359b
CM
58 }
59
60 info.si_signo = si_signo;
61 info.si_errno = 0;
62 info.si_code = si_code;
63 info.si_addr = (void __user *)address;
64 info.si_trapno = fault_num;
571d76ac 65 trace_unhandled_signal(type, regs, address, si_signo);
867e359b
CM
66 force_sig_info(si_signo, &info, tsk);
67}
68
69#ifndef __tilegx__
70/*
71 * Synthesize the fault a PL0 process would get by doing a word-load of
d929b6ae 72 * an unaligned address or a high kernel address.
867e359b 73 */
6b14e419 74SYSCALL_DEFINE1(cmpxchg_badaddr, unsigned long, address)
867e359b 75{
6b14e419
CM
76 struct pt_regs *regs = current_pt_regs();
77
867e359b 78 if (address >= PAGE_OFFSET)
571d76ac
CM
79 force_sig_info_fault("atomic segfault", SIGSEGV, SEGV_MAPERR,
80 address, INT_DTLB_MISS, current, regs);
867e359b 81 else
571d76ac
CM
82 force_sig_info_fault("atomic alignment fault", SIGBUS,
83 BUS_ADRALN, address,
84 INT_UNALIGN_DATA, current, regs);
867e359b
CM
85
86 /*
87 * Adjust pc to point at the actual instruction, which is unusual
88 * for syscalls normally, but is appropriate when we are claiming
89 * that a syscall swint1 caused a page fault or bus error.
90 */
91 regs->pc -= 8;
92
93 /*
94 * Mark this as a caller-save interrupt, like a normal page fault,
95 * so that when we go through the signal handler path we will
96 * properly restore r0, r1, and r2 for the signal handler arguments.
97 */
98 regs->flags |= PT_FLAGS_CALLER_SAVES;
99
100 return 0;
101}
102#endif
103
104static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
105{
106 unsigned index = pgd_index(address);
107 pgd_t *pgd_k;
108 pud_t *pud, *pud_k;
109 pmd_t *pmd, *pmd_k;
110
111 pgd += index;
112 pgd_k = init_mm.pgd + index;
113
114 if (!pgd_present(*pgd_k))
115 return NULL;
116
117 pud = pud_offset(pgd, address);
118 pud_k = pud_offset(pgd_k, address);
119 if (!pud_present(*pud_k))
120 return NULL;
121
122 pmd = pmd_offset(pud, address);
123 pmd_k = pmd_offset(pud_k, address);
124 if (!pmd_present(*pmd_k))
125 return NULL;
1182b69c 126 if (!pmd_present(*pmd))
867e359b 127 set_pmd(pmd, *pmd_k);
1182b69c 128 else
867e359b
CM
129 BUG_ON(pmd_ptfn(*pmd) != pmd_ptfn(*pmd_k));
130 return pmd_k;
131}
132
133/*
51bcdf88 134 * Handle a fault on the vmalloc area.
867e359b
CM
135 */
136static inline int vmalloc_fault(pgd_t *pgd, unsigned long address)
137{
138 pmd_t *pmd_k;
139 pte_t *pte_k;
140
141 /* Make sure we are in vmalloc area */
142 if (!(address >= VMALLOC_START && address < VMALLOC_END))
143 return -1;
144
145 /*
146 * Synchronize this task's top level page-table
147 * with the 'reference' page table.
148 */
149 pmd_k = vmalloc_sync_one(pgd, address);
150 if (!pmd_k)
151 return -1;
152 if (pmd_huge(*pmd_k))
153 return 0; /* support TILE huge_vmap() API */
154 pte_k = pte_offset_kernel(pmd_k, address);
155 if (!pte_present(*pte_k))
156 return -1;
157 return 0;
158}
159
160/* Wait until this PTE has completed migration. */
161static void wait_for_migration(pte_t *pte)
162{
163 if (pte_migrating(*pte)) {
164 /*
165 * Wait until the migrater fixes up this pte.
166 * We scale the loop count by the clock rate so we'll wait for
167 * a few seconds here.
168 */
169 int retries = 0;
170 int bound = get_clock_rate();
171 while (pte_migrating(*pte)) {
172 barrier();
173 if (++retries > bound)
174 panic("Hit migrating PTE (%#llx) and"
175 " page PFN %#lx still migrating",
176 pte->val, pte_pfn(*pte));
177 }
178 }
179}
180
181/*
182 * It's not generally safe to use "current" to get the page table pointer,
183 * since we might be running an oprofile interrupt in the middle of a
184 * task switch.
185 */
186static pgd_t *get_current_pgd(void)
187{
188 HV_Context ctx = hv_inquire_context();
189 unsigned long pgd_pfn = ctx.page_table >> PAGE_SHIFT;
190 struct page *pgd_page = pfn_to_page(pgd_pfn);
621b1955 191 BUG_ON(PageHighMem(pgd_page));
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CM
192 return (pgd_t *) __va(ctx.page_table);
193}
194
195/*
196 * We can receive a page fault from a migrating PTE at any time.
197 * Handle it by just waiting until the fault resolves.
198 *
199 * It's also possible to get a migrating kernel PTE that resolves
200 * itself during the downcall from hypervisor to Linux. We just check
201 * here to see if the PTE seems valid, and if so we retry it.
202 *
203 * NOTE! We MUST NOT take any locks for this case. We may be in an
204 * interrupt or a critical region, and must do as little as possible.
205 * Similarly, we can't use atomic ops here, since we may be handling a
206 * fault caused by an atomic op access.
48292738
CM
207 *
208 * If we find a migrating PTE while we're in an NMI context, and we're
209 * at a PC that has a registered exception handler, we don't wait,
210 * since this thread may (e.g.) have been interrupted while migrating
211 * its own stack, which would then cause us to self-deadlock.
867e359b
CM
212 */
213static int handle_migrating_pte(pgd_t *pgd, int fault_num,
48292738 214 unsigned long address, unsigned long pc,
867e359b
CM
215 int is_kernel_mode, int write)
216{
217 pud_t *pud;
218 pmd_t *pmd;
219 pte_t *pte;
220 pte_t pteval;
221
222 if (pgd_addr_invalid(address))
223 return 0;
224
225 pgd += pgd_index(address);
226 pud = pud_offset(pgd, address);
227 if (!pud || !pud_present(*pud))
228 return 0;
229 pmd = pmd_offset(pud, address);
230 if (!pmd || !pmd_present(*pmd))
231 return 0;
232 pte = pmd_huge_page(*pmd) ? ((pte_t *)pmd) :
233 pte_offset_kernel(pmd, address);
234 pteval = *pte;
235 if (pte_migrating(pteval)) {
48292738
CM
236 if (in_nmi() && search_exception_tables(pc))
237 return 0;
867e359b
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238 wait_for_migration(pte);
239 return 1;
240 }
241
242 if (!is_kernel_mode || !pte_present(pteval))
243 return 0;
244 if (fault_num == INT_ITLB_MISS) {
245 if (pte_exec(pteval))
246 return 1;
247 } else if (write) {
248 if (pte_write(pteval))
249 return 1;
250 } else {
251 if (pte_read(pteval))
252 return 1;
253 }
254
255 return 0;
256}
257
258/*
259 * This routine is responsible for faulting in user pages.
260 * It passes the work off to one of the appropriate routines.
261 * It returns true if the fault was successfully handled.
262 */
263static int handle_page_fault(struct pt_regs *regs,
264 int fault_num,
265 int is_page_fault,
266 unsigned long address,
267 int write)
268{
269 struct task_struct *tsk;
270 struct mm_struct *mm;
271 struct vm_area_struct *vma;
272 unsigned long stack_offset;
273 int fault;
274 int si_code;
275 int is_kernel_mode;
276 pgd_t *pgd;
4ce6bea2 277 unsigned int flags;
867e359b
CM
278
279 /* on TILE, protection faults are always writes */
280 if (!is_page_fault)
281 write = 1;
282
4ce6bea2
KC
283 flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
284 (write ? FAULT_FLAG_WRITE : 0));
285
051168df 286 is_kernel_mode = !user_mode(regs);
867e359b
CM
287
288 tsk = validate_current();
289
290 /*
291 * Check to see if we might be overwriting the stack, and bail
292 * out if so. The page fault code is a relatively likely
293 * place to get trapped in an infinite regress, and once we
294 * overwrite the whole stack, it becomes very hard to recover.
295 */
296 stack_offset = stack_pointer & (THREAD_SIZE-1);
297 if (stack_offset < THREAD_SIZE / 8) {
0707ad30 298 pr_alert("Potential stack overrun: sp %#lx\n",
867e359b
CM
299 stack_pointer);
300 show_regs(regs);
0707ad30 301 pr_alert("Killing current process %d/%s\n",
867e359b
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302 tsk->pid, tsk->comm);
303 do_group_exit(SIGKILL);
304 }
305
306 /*
307 * Early on, we need to check for migrating PTE entries;
308 * see homecache.c. If we find a migrating PTE, we wait until
25985edc 309 * the backing page claims to be done migrating, then we proceed.
867e359b
CM
310 * For kernel PTEs, we rewrite the PTE and return and retry.
311 * Otherwise, we treat the fault like a normal "no PTE" fault,
312 * rather than trying to patch up the existing PTE.
313 */
314 pgd = get_current_pgd();
48292738 315 if (handle_migrating_pte(pgd, fault_num, address, regs->pc,
867e359b
CM
316 is_kernel_mode, write))
317 return 1;
318
319 si_code = SEGV_MAPERR;
320
321 /*
322 * We fault-in kernel-space virtual memory on-demand. The
323 * 'reference' page table is init_mm.pgd.
324 *
325 * NOTE! We MUST NOT take any locks for this case. We may
326 * be in an interrupt or a critical region, and should
327 * only copy the information from the master page table,
328 * nothing more.
329 *
330 * This verifies that the fault happens in kernel space
331 * and that the fault was not a protection fault.
332 */
333 if (unlikely(address >= TASK_SIZE &&
334 !is_arch_mappable_range(address, 0))) {
335 if (is_kernel_mode && is_page_fault &&
336 vmalloc_fault(pgd, address) >= 0)
337 return 1;
338 /*
339 * Don't take the mm semaphore here. If we fixup a prefetch
340 * fault we could otherwise deadlock.
341 */
342 mm = NULL; /* happy compiler */
343 vma = NULL;
344 goto bad_area_nosemaphore;
345 }
346
347 /*
348 * If we're trying to touch user-space addresses, we must
349 * be either at PL0, or else with interrupts enabled in the
b230ff2d
CM
350 * kernel, so either way we can re-enable interrupts here
351 * unless we are doing atomic access to user space with
352 * interrupts disabled.
867e359b 353 */
b230ff2d
CM
354 if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
355 local_irq_enable();
867e359b
CM
356
357 mm = tsk->mm;
358
359 /*
360 * If we're in an interrupt, have no user context or are running in an
361 * atomic region then we must not take the fault.
362 */
363 if (in_atomic() || !mm) {
364 vma = NULL; /* happy compiler */
365 goto bad_area_nosemaphore;
366 }
367
368 /*
369 * When running in the kernel we expect faults to occur only to
370 * addresses in user space. All other faults represent errors in the
371 * kernel and should generate an OOPS. Unfortunately, in the case of an
372 * erroneous fault occurring in a code path which already holds mmap_sem
373 * we will deadlock attempting to validate the fault against the
374 * address space. Luckily the kernel only validly references user
375 * space from well defined areas of code, which are listed in the
376 * exceptions table.
377 *
378 * As the vast majority of faults will be valid we will only perform
379 * the source reference check when there is a possibility of a deadlock.
380 * Attempt to lock the address space, if we cannot we then validate the
381 * source. If this is invalid we can skip the address space check,
382 * thus avoiding the deadlock.
383 */
384 if (!down_read_trylock(&mm->mmap_sem)) {
385 if (is_kernel_mode &&
386 !search_exception_tables(regs->pc)) {
387 vma = NULL; /* happy compiler */
388 goto bad_area_nosemaphore;
389 }
4ce6bea2
KC
390
391retry:
867e359b
CM
392 down_read(&mm->mmap_sem);
393 }
394
395 vma = find_vma(mm, address);
396 if (!vma)
397 goto bad_area;
398 if (vma->vm_start <= address)
399 goto good_area;
400 if (!(vma->vm_flags & VM_GROWSDOWN))
401 goto bad_area;
402 if (regs->sp < PAGE_OFFSET) {
403 /*
404 * accessing the stack below sp is always a bug.
405 */
406 if (address < regs->sp)
407 goto bad_area;
408 }
409 if (expand_stack(vma, address))
410 goto bad_area;
411
412/*
413 * Ok, we have a good vm_area for this memory access, so
414 * we can handle it..
415 */
416good_area:
417 si_code = SEGV_ACCERR;
418 if (fault_num == INT_ITLB_MISS) {
419 if (!(vma->vm_flags & VM_EXEC))
420 goto bad_area;
421 } else if (write) {
422#ifdef TEST_VERIFY_AREA
423 if (!is_page_fault && regs->cs == KERNEL_CS)
0707ad30 424 pr_err("WP fault at "REGFMT"\n", regs->eip);
867e359b
CM
425#endif
426 if (!(vma->vm_flags & VM_WRITE))
427 goto bad_area;
428 } else {
429 if (!is_page_fault || !(vma->vm_flags & VM_READ))
430 goto bad_area;
431 }
432
433 survive:
434 /*
435 * If for any reason at all we couldn't handle the fault,
436 * make sure we exit gracefully rather than endlessly redo
437 * the fault.
438 */
4ce6bea2
KC
439 fault = handle_mm_fault(mm, vma, address, flags);
440
441 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
442 return 0;
443
867e359b
CM
444 if (unlikely(fault & VM_FAULT_ERROR)) {
445 if (fault & VM_FAULT_OOM)
446 goto out_of_memory;
447 else if (fault & VM_FAULT_SIGBUS)
448 goto do_sigbus;
449 BUG();
450 }
4ce6bea2
KC
451 if (flags & FAULT_FLAG_ALLOW_RETRY) {
452 if (fault & VM_FAULT_MAJOR)
453 tsk->maj_flt++;
454 else
455 tsk->min_flt++;
456 if (fault & VM_FAULT_RETRY) {
457 flags &= ~FAULT_FLAG_ALLOW_RETRY;
45cac65b 458 flags |= FAULT_FLAG_TRIED;
4ce6bea2
KC
459
460 /*
461 * No need to up_read(&mm->mmap_sem) as we would
462 * have already released it in __lock_page_or_retry
463 * in mm/filemap.c.
464 */
465 goto retry;
466 }
467 }
867e359b 468
0707ad30 469#if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
867e359b
CM
470 /*
471 * If this was an asynchronous fault,
472 * restart the appropriate engine.
473 */
474 switch (fault_num) {
475#if CHIP_HAS_TILE_DMA()
476 case INT_DMATLB_MISS:
477 case INT_DMATLB_MISS_DWNCL:
478 case INT_DMATLB_ACCESS:
479 case INT_DMATLB_ACCESS_DWNCL:
480 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
481 break;
482#endif
483#if CHIP_HAS_SN_PROC()
484 case INT_SNITLB_MISS:
485 case INT_SNITLB_MISS_DWNCL:
486 __insn_mtspr(SPR_SNCTL,
487 __insn_mfspr(SPR_SNCTL) &
488 ~SPR_SNCTL__FRZPROC_MASK);
489 break;
490#endif
491 }
0707ad30 492#endif
867e359b
CM
493
494 up_read(&mm->mmap_sem);
495 return 1;
496
497/*
498 * Something tried to access memory that isn't in our memory map..
499 * Fix it, but check if it's kernel or user first..
500 */
501bad_area:
502 up_read(&mm->mmap_sem);
503
504bad_area_nosemaphore:
505 /* User mode accesses just cause a SIGSEGV */
506 if (!is_kernel_mode) {
507 /*
508 * It's possible to have interrupts off here.
509 */
510 local_irq_enable();
511
571d76ac
CM
512 force_sig_info_fault("segfault", SIGSEGV, si_code, address,
513 fault_num, tsk, regs);
867e359b
CM
514 return 0;
515 }
516
517no_context:
518 /* Are we prepared to handle this kernel fault? */
519 if (fixup_exception(regs))
520 return 0;
521
522/*
523 * Oops. The kernel tried to access some bad page. We'll have to
524 * terminate things with extreme prejudice.
525 */
526
527 bust_spinlocks(1);
528
529 /* FIXME: no lookup_address() yet */
530#ifdef SUPPORT_LOOKUP_ADDRESS
531 if (fault_num == INT_ITLB_MISS) {
532 pte_t *pte = lookup_address(address);
533
534 if (pte && pte_present(*pte) && !pte_exec_kernel(*pte))
0707ad30 535 pr_crit("kernel tried to execute"
867e359b
CM
536 " non-executable page - exploit attempt?"
537 " (uid: %d)\n", current->uid);
538 }
539#endif
540 if (address < PAGE_SIZE)
0707ad30 541 pr_alert("Unable to handle kernel NULL pointer dereference\n");
867e359b 542 else
0707ad30
CM
543 pr_alert("Unable to handle kernel paging request\n");
544 pr_alert(" at virtual address "REGFMT", pc "REGFMT"\n",
545 address, regs->pc);
867e359b
CM
546
547 show_regs(regs);
548
549 if (unlikely(tsk->pid < 2)) {
550 panic("Kernel page fault running %s!",
a95f8817 551 is_idle_task(tsk) ? "the idle task" : "init");
867e359b
CM
552 }
553
554 /*
555 * More FIXME: we should probably copy the i386 here and
556 * implement a generic die() routine. Not today.
557 */
558#ifdef SUPPORT_DIE
559 die("Oops", regs);
560#endif
561 bust_spinlocks(1);
562
563 do_group_exit(SIGKILL);
564
565/*
566 * We ran out of memory, or some other thing happened to us that made
567 * us unable to handle the page fault gracefully.
568 */
569out_of_memory:
570 up_read(&mm->mmap_sem);
571 if (is_global_init(tsk)) {
572 yield();
573 down_read(&mm->mmap_sem);
574 goto survive;
575 }
609838cf
JW
576 if (is_kernel_mode)
577 goto no_context;
578 pagefault_out_of_memory();
579 return 0;
867e359b
CM
580
581do_sigbus:
582 up_read(&mm->mmap_sem);
583
584 /* Kernel mode? Handle exceptions or die */
585 if (is_kernel_mode)
586 goto no_context;
587
571d76ac
CM
588 force_sig_info_fault("bus error", SIGBUS, BUS_ADRERR, address,
589 fault_num, tsk, regs);
867e359b
CM
590 return 0;
591}
592
593#ifndef __tilegx__
594
867e359b
CM
595/* We must release ICS before panicking or we won't get anywhere. */
596#define ics_panic(fmt, ...) do { \
597 __insn_mtspr(SPR_INTERRUPT_CRITICAL_SECTION, 0); \
598 panic(fmt, __VA_ARGS__); \
599} while (0)
600
867e359b
CM
601/*
602 * When we take an ITLB or DTLB fault or access violation in the
603 * supervisor while the critical section bit is set, the hypervisor is
a78c942d 604 * reluctant to write new values into the EX_CONTEXT_K_x registers,
867e359b
CM
605 * since that might indicate we have not yet squirreled the SPR
606 * contents away and can thus safely take a recursive interrupt.
a78c942d 607 * Accordingly, the hypervisor passes us the PC via SYSTEM_SAVE_K_2.
c745a8a1
CM
608 *
609 * Note that this routine is called before homecache_tlb_defer_enter(),
610 * which means that we can properly unlock any atomics that might
611 * be used there (good), but also means we must be very sensitive
612 * to not touch any data structures that might be located in memory
613 * that could migrate, as we could be entering the kernel on a dataplane
614 * cpu that has been deferring kernel TLB updates. This means, for
615 * example, that we can't migrate init_mm or its pgd.
867e359b
CM
616 */
617struct intvec_state do_page_fault_ics(struct pt_regs *regs, int fault_num,
618 unsigned long address,
619 unsigned long info)
620{
621 unsigned long pc = info & ~1;
622 int write = info & 1;
623 pgd_t *pgd = get_current_pgd();
624
625 /* Retval is 1 at first since we will handle the fault fully. */
626 struct intvec_state state = {
627 do_page_fault, fault_num, address, write, 1
628 };
629
630 /* Validate that we are plausibly in the right routine. */
631 if ((pc & 0x7) != 0 || pc < PAGE_OFFSET ||
632 (fault_num != INT_DTLB_MISS &&
633 fault_num != INT_DTLB_ACCESS)) {
634 unsigned long old_pc = regs->pc;
635 regs->pc = pc;
636 ics_panic("Bad ICS page fault args:"
637 " old PC %#lx, fault %d/%d at %#lx\n",
638 old_pc, fault_num, write, address);
639 }
640
641 /* We might be faulting on a vmalloc page, so check that first. */
642 if (fault_num != INT_DTLB_ACCESS && vmalloc_fault(pgd, address) >= 0)
643 return state;
644
645 /*
646 * If we faulted with ICS set in sys_cmpxchg, we are providing
647 * a user syscall service that should generate a signal on
648 * fault. We didn't set up a kernel stack on initial entry to
649 * sys_cmpxchg, but instead had one set up by the fault, which
650 * (because sys_cmpxchg never releases ICS) came to us via the
a78c942d 651 * SYSTEM_SAVE_K_2 mechanism, and thus EX_CONTEXT_K_[01] are
867e359b
CM
652 * still referencing the original user code. We release the
653 * atomic lock and rewrite pt_regs so that it appears that we
654 * came from user-space directly, and after we finish the
655 * fault we'll go back to user space and re-issue the swint.
656 * This way the backtrace information is correct if we need to
657 * emit a stack dump at any point while handling this.
658 *
659 * Must match register use in sys_cmpxchg().
660 */
661 if (pc >= (unsigned long) sys_cmpxchg &&
662 pc < (unsigned long) __sys_cmpxchg_end) {
663#ifdef CONFIG_SMP
664 /* Don't unlock before we could have locked. */
665 if (pc >= (unsigned long)__sys_cmpxchg_grab_lock) {
666 int *lock_ptr = (int *)(regs->regs[ATOMIC_LOCK_REG]);
667 __atomic_fault_unlock(lock_ptr);
668 }
669#endif
670 regs->sp = regs->regs[27];
671 }
672
673 /*
674 * We can also fault in the atomic assembly, in which
675 * case we use the exception table to do the first-level fixup.
676 * We may re-fixup again in the real fault handler if it
677 * turns out the faulting address is just bad, and not,
678 * for example, migrating.
679 */
680 else if (pc >= (unsigned long) __start_atomic_asm_code &&
681 pc < (unsigned long) __end_atomic_asm_code) {
682 const struct exception_table_entry *fixup;
683#ifdef CONFIG_SMP
684 /* Unlock the atomic lock. */
685 int *lock_ptr = (int *)(regs->regs[ATOMIC_LOCK_REG]);
686 __atomic_fault_unlock(lock_ptr);
687#endif
688 fixup = search_exception_tables(pc);
689 if (!fixup)
690 ics_panic("ICS atomic fault not in table:"
691 " PC %#lx, fault %d", pc, fault_num);
692 regs->pc = fixup->fixup;
693 regs->ex1 = PL_ICS_EX1(KERNEL_PL, 0);
694 }
695
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696 /*
697 * Now that we have released the atomic lock (if necessary),
698 * it's safe to spin if the PTE that caused the fault was migrating.
699 */
700 if (fault_num == INT_DTLB_ACCESS)
701 write = 1;
48292738 702 if (handle_migrating_pte(pgd, fault_num, address, pc, 1, write))
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703 return state;
704
705 /* Return zero so that we continue on with normal fault handling. */
706 state.retval = 0;
707 return state;
708}
709
710#endif /* !__tilegx__ */
711
712/*
713 * This routine handles page faults. It determines the address, and the
714 * problem, and then passes it handle_page_fault() for normal DTLB and
715 * ITLB issues, and for DMA or SN processor faults when we are in user
716 * space. For the latter, if we're in kernel mode, we just save the
717 * interrupt away appropriately and return immediately. We can't do
718 * page faults for user code while in kernel mode.
719 */
720void do_page_fault(struct pt_regs *regs, int fault_num,
721 unsigned long address, unsigned long write)
722{
723 int is_page_fault;
724
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725#ifdef CONFIG_KPROBES
726 /*
727 * This is to notify the fault handler of the kprobes. The
728 * exception code is redundant as it is also carried in REGS,
729 * but we pass it anyhow.
730 */
731 if (notify_die(DIE_PAGE_FAULT, "page fault", regs, -1,
732 regs->faultnum, SIGSEGV) == NOTIFY_STOP)
733 return;
734#endif
735
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736#ifdef __tilegx__
737 /*
738 * We don't need early do_page_fault_ics() support, since unlike
739 * Pro we don't need to worry about unlocking the atomic locks.
740 * There is only one current case in GX where we touch any memory
741 * under ICS other than our own kernel stack, and we handle that
742 * here. (If we crash due to trying to touch our own stack,
743 * we're in too much trouble for C code to help out anyway.)
744 */
745 if (write & ~1) {
746 unsigned long pc = write & ~1;
747 if (pc >= (unsigned long) __start_unalign_asm_code &&
748 pc < (unsigned long) __end_unalign_asm_code) {
749 struct thread_info *ti = current_thread_info();
750 /*
751 * Our EX_CONTEXT is still what it was from the
752 * initial unalign exception, but now we've faulted
753 * on the JIT page. We would like to complete the
754 * page fault however is appropriate, and then retry
755 * the instruction that caused the unalign exception.
756 * Our state has been "corrupted" by setting the low
757 * bit in "sp", and stashing r0..r3 in the
758 * thread_info area, so we revert all of that, then
759 * continue as if this were a normal page fault.
760 */
761 regs->sp &= ~1UL;
762 regs->regs[0] = ti->unalign_jit_tmp[0];
763 regs->regs[1] = ti->unalign_jit_tmp[1];
764 regs->regs[2] = ti->unalign_jit_tmp[2];
765 regs->regs[3] = ti->unalign_jit_tmp[3];
766 write &= 1;
767 } else {
768 pr_alert("%s/%d: ICS set at page fault at %#lx: %#lx\n",
769 current->comm, current->pid, pc, address);
770 show_regs(regs);
771 do_group_exit(SIGKILL);
772 return;
773 }
774 }
775#else
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776 /* This case should have been handled by do_page_fault_ics(). */
777 BUG_ON(write & ~1);
2f9ac29e 778#endif
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779
780#if CHIP_HAS_TILE_DMA()
781 /*
782 * If it's a DMA fault, suspend the transfer while we're
783 * handling the miss; we'll restart after it's handled. If we
784 * don't suspend, it's possible that this process could swap
785 * out and back in, and restart the engine since the DMA is
786 * still 'running'.
787 */
788 if (fault_num == INT_DMATLB_MISS ||
789 fault_num == INT_DMATLB_ACCESS ||
790 fault_num == INT_DMATLB_MISS_DWNCL ||
791 fault_num == INT_DMATLB_ACCESS_DWNCL) {
792 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__SUSPEND_MASK);
793 while (__insn_mfspr(SPR_DMA_USER_STATUS) &
794 SPR_DMA_STATUS__BUSY_MASK)
795 ;
796 }
797#endif
798
799 /* Validate fault num and decide if this is a first-time page fault. */
800 switch (fault_num) {
801 case INT_ITLB_MISS:
802 case INT_DTLB_MISS:
803#if CHIP_HAS_TILE_DMA()
804 case INT_DMATLB_MISS:
805 case INT_DMATLB_MISS_DWNCL:
806#endif
807#if CHIP_HAS_SN_PROC()
808 case INT_SNITLB_MISS:
809 case INT_SNITLB_MISS_DWNCL:
810#endif
811 is_page_fault = 1;
812 break;
813
814 case INT_DTLB_ACCESS:
815#if CHIP_HAS_TILE_DMA()
816 case INT_DMATLB_ACCESS:
817 case INT_DMATLB_ACCESS_DWNCL:
818#endif
819 is_page_fault = 0;
820 break;
821
822 default:
823 panic("Bad fault number %d in do_page_fault", fault_num);
824 }
825
313ce674 826#if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
051168df 827 if (!user_mode(regs)) {
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828 struct async_tlb *async;
829 switch (fault_num) {
830#if CHIP_HAS_TILE_DMA()
831 case INT_DMATLB_MISS:
832 case INT_DMATLB_ACCESS:
833 case INT_DMATLB_MISS_DWNCL:
834 case INT_DMATLB_ACCESS_DWNCL:
835 async = &current->thread.dma_async_tlb;
836 break;
837#endif
838#if CHIP_HAS_SN_PROC()
839 case INT_SNITLB_MISS:
840 case INT_SNITLB_MISS_DWNCL:
841 async = &current->thread.sn_async_tlb;
842 break;
843#endif
844 default:
845 async = NULL;
846 }
847 if (async) {
848
849 /*
850 * No vmalloc check required, so we can allow
851 * interrupts immediately at this point.
852 */
853 local_irq_enable();
854
855 set_thread_flag(TIF_ASYNC_TLB);
856 if (async->fault_num != 0) {
857 panic("Second async fault %d;"
858 " old fault was %d (%#lx/%ld)",
859 fault_num, async->fault_num,
860 address, write);
861 }
862 BUG_ON(fault_num == 0);
863 async->fault_num = fault_num;
864 async->is_fault = is_page_fault;
865 async->is_write = write;
866 async->address = address;
867 return;
868 }
869 }
313ce674 870#endif
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871
872 handle_page_fault(regs, fault_num, is_page_fault, address, write);
873}
874
875
876#if CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC()
877/*
878 * Check an async_tlb structure to see if a deferred fault is waiting,
879 * and if so pass it to the page-fault code.
880 */
881static void handle_async_page_fault(struct pt_regs *regs,
882 struct async_tlb *async)
883{
884 if (async->fault_num) {
885 /*
886 * Clear async->fault_num before calling the page-fault
887 * handler so that if we re-interrupt before returning
888 * from the function we have somewhere to put the
889 * information from the new interrupt.
890 */
891 int fault_num = async->fault_num;
892 async->fault_num = 0;
893 handle_page_fault(regs, fault_num, async->is_fault,
894 async->address, async->is_write);
895 }
896}
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897
898/*
899 * This routine effectively re-issues asynchronous page faults
900 * when we are returning to user space.
901 */
902void do_async_page_fault(struct pt_regs *regs)
903{
904 /*
905 * Clear thread flag early. If we re-interrupt while processing
906 * code here, we will reset it and recall this routine before
907 * returning to user space.
908 */
909 clear_thread_flag(TIF_ASYNC_TLB);
910
911#if CHIP_HAS_TILE_DMA()
912 handle_async_page_fault(regs, &current->thread.dma_async_tlb);
913#endif
914#if CHIP_HAS_SN_PROC()
915 handle_async_page_fault(regs, &current->thread.sn_async_tlb);
916#endif
917}
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CM
918#endif /* CHIP_HAS_TILE_DMA() || CHIP_HAS_SN_PROC() */
919
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920
921void vmalloc_sync_all(void)
922{
923#ifdef __tilegx__
924 /* Currently all L1 kernel pmd's are static and shared. */
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925 BUILD_BUG_ON(pgd_index(VMALLOC_END - PAGE_SIZE) !=
926 pgd_index(VMALLOC_START));
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927#else
928 /*
929 * Note that races in the updates of insync and start aren't
930 * problematic: insync can only get set bits added, and updates to
931 * start are only improving performance (without affecting correctness
932 * if undone).
933 */
934 static DECLARE_BITMAP(insync, PTRS_PER_PGD);
935 static unsigned long start = PAGE_OFFSET;
936 unsigned long address;
937
938 BUILD_BUG_ON(PAGE_OFFSET & ~PGDIR_MASK);
939 for (address = start; address >= PAGE_OFFSET; address += PGDIR_SIZE) {
940 if (!test_bit(pgd_index(address), insync)) {
941 unsigned long flags;
942 struct list_head *pos;
943
944 spin_lock_irqsave(&pgd_lock, flags);
945 list_for_each(pos, &pgd_list)
946 if (!vmalloc_sync_one(list_to_pgd(pos),
947 address)) {
948 /* Must be at first entry in list. */
949 BUG_ON(pos != pgd_list.next);
950 break;
951 }
952 spin_unlock_irqrestore(&pgd_lock, flags);
953 if (pos != pgd_list.next)
954 set_bit(pgd_index(address), insync);
955 }
956 if (address == start && test_bit(pgd_index(address), insync))
957 start = address + PGDIR_SIZE;
958 }
959#endif
960}