tile: support CONTEXT_TRACKING and thus NOHZ_FULL
[linux-2.6-block.git] / arch / tile / kernel / traps.c
CommitLineData
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1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/kprobes.h>
3fa17c39 18#include <linux/kdebug.h>
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19#include <linux/module.h>
20#include <linux/reboot.h>
21#include <linux/uaccess.h>
22#include <linux/ptrace.h>
49e4e156 23#include <linux/context_tracking.h>
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24#include <asm/stack.h>
25#include <asm/traps.h>
bd119c69 26#include <asm/setup.h>
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27
28#include <arch/interrupts.h>
29#include <arch/spr_def.h>
eb7c792d 30#include <arch/opcode.h>
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31
32void __init trap_init(void)
33{
acbde1db 34 /* Nothing needed here since we link code at .intrpt */
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35}
36
37int unaligned_fixup = 1;
38
39static int __init setup_unaligned_fixup(char *str)
40{
41 /*
42 * Say "=-1" to completely disable it. If you just do "=0", we
43 * will still parse the instruction, then fire a SIGBUS with
44 * the correct address from inside the single_step code.
45 */
b2dfa048 46 if (kstrtoint(str, 0, &unaligned_fixup) != 0)
867e359b 47 return 0;
b2dfa048 48
0707ad30 49 pr_info("Fixups for unaligned data accesses are %s\n",
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50 unaligned_fixup >= 0 ?
51 (unaligned_fixup ? "enabled" : "disabled") :
52 "completely disabled");
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53 return 1;
54}
55__setup("unaligned_fixup=", setup_unaligned_fixup);
56
57#if CHIP_HAS_TILE_DMA()
58
59static int dma_disabled;
60
61static int __init nodma(char *str)
62{
0707ad30 63 pr_info("User-space DMA is disabled\n");
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64 dma_disabled = 1;
65 return 1;
66}
67__setup("nodma", nodma);
68
69/* How to decode SPR_GPV_REASON */
70#define IRET_ERROR (1U << 31)
71#define MT_ERROR (1U << 30)
72#define MF_ERROR (1U << 29)
73#define SPR_INDEX ((1U << 15) - 1)
74#define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */
75
76/*
77 * See if this GPV is just to notify the kernel of SPR use and we can
78 * retry the user instruction after adjusting some MPLs suitably.
79 */
80static int retry_gpv(unsigned int gpv_reason)
81{
82 int mpl;
83
84 if (gpv_reason & IRET_ERROR)
85 return 0;
86
87 BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0);
88 mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
89 if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
90 /* User is turning on DMA. Allow it and retry. */
91 printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
92 current->pid, current->comm);
93 BUG_ON(current->thread.tile_dma_state.enabled);
94 current->thread.tile_dma_state.enabled = 1;
95 grant_dma_mpls();
96 return 1;
97 }
98
99 return 0;
100}
101
102#endif /* CHIP_HAS_TILE_DMA() */
103
a0099303 104extern tile_bundle_bits bpt_code;
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105
106asm(".pushsection .rodata.bpt_code,\"a\";"
107 ".align 8;"
108 "bpt_code: bpt;"
109 ".size bpt_code,.-bpt_code;"
110 ".popsection");
111
a0099303 112static int special_ill(tile_bundle_bits bundle, int *sigp, int *codep)
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113{
114 int sig, code, maxcode;
115
116 if (bundle == bpt_code) {
117 *sigp = SIGTRAP;
118 *codep = TRAP_BRKPT;
119 return 1;
120 }
121
122 /* If it's a "raise" bundle, then "ill" must be in pipe X1. */
123#ifdef __tilegx__
124 if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
125 return 0;
1fcbe027
CM
126 if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
127 return 0;
128 if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
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129 return 0;
130 if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
131 return 0;
132#else
eb7c792d 133 if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
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134 return 0;
135 if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
136 return 0;
137 if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
138 return 0;
139 if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
140 return 0;
141#endif
142
143 /* Check that the magic distinguishers are set to mean "raise". */
144 if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37)
145 return 0;
146
147 /* There must be an "addli zero, zero, VAL" in X0. */
148 if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
149 return 0;
150 if (get_Dest_X0(bundle) != TREG_ZERO)
151 return 0;
152 if (get_SrcA_X0(bundle) != TREG_ZERO)
153 return 0;
154
155 /*
156 * Validate the proposed signal number and si_code value.
157 * Note that we embed these in the static instruction itself
158 * so that we perturb the register state as little as possible
159 * at the time of the actual fault; it's unlikely you'd ever
160 * need to dynamically choose which kind of fault to raise
161 * from user space.
162 */
163 sig = get_Imm16_X0(bundle) & 0x3f;
164 switch (sig) {
165 case SIGILL:
166 maxcode = NSIGILL;
167 break;
168 case SIGFPE:
169 maxcode = NSIGFPE;
170 break;
171 case SIGSEGV:
172 maxcode = NSIGSEGV;
173 break;
174 case SIGBUS:
175 maxcode = NSIGBUS;
176 break;
177 case SIGTRAP:
178 maxcode = NSIGTRAP;
179 break;
180 default:
181 return 0;
182 }
183 code = (get_Imm16_X0(bundle) >> 6) & 0xf;
184 if (code <= 0 || code > maxcode)
185 return 0;
186
187 /* Make it the requested signal. */
188 *sigp = sig;
189 *codep = code | __SI_FAULT;
190 return 1;
191}
192
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193static const char *const int_name[] = {
194 [INT_MEM_ERROR] = "Memory error",
195 [INT_ILL] = "Illegal instruction",
196 [INT_GPV] = "General protection violation",
197 [INT_UDN_ACCESS] = "UDN access",
198 [INT_IDN_ACCESS] = "IDN access",
199#if CHIP_HAS_SN()
200 [INT_SN_ACCESS] = "SN access",
201#endif
202 [INT_SWINT_3] = "Software interrupt 3",
203 [INT_SWINT_2] = "Software interrupt 2",
204 [INT_SWINT_0] = "Software interrupt 0",
205 [INT_UNALIGN_DATA] = "Unaligned data",
206 [INT_DOUBLE_FAULT] = "Double fault",
207#ifdef __tilegx__
208 [INT_ILL_TRANS] = "Illegal virtual address",
209#endif
210};
211
3fa17c39
TL
212static int do_bpt(struct pt_regs *regs)
213{
214 unsigned long bundle, bcode, bpt;
215
216 bundle = *(unsigned long *)instruction_pointer(regs);
217
218 /*
219 * bpt shoule be { bpt; nop }, which is 0x286a44ae51485000ULL.
220 * we encode the unused least significant bits for other purpose.
221 */
222 bpt = bundle & ~((1ULL << 12) - 1);
223 if (bpt != TILE_BPT_BUNDLE)
224 return 0;
225
226 bcode = bundle & ((1ULL << 12) - 1);
227 /*
228 * notify the kprobe handlers, if instruction is likely to
229 * pertain to them.
230 */
231 switch (bcode) {
232 /* breakpoint_insn */
233 case 0:
234 notify_die(DIE_BREAK, "debug", regs, bundle,
235 INT_ILL, SIGTRAP);
236 break;
8157107b
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237 /* compiled_bpt */
238 case DIE_COMPILED_BPT:
239 notify_die(DIE_COMPILED_BPT, "debug", regs, bundle,
240 INT_ILL, SIGTRAP);
241 break;
3fa17c39
TL
242 /* breakpoint2_insn */
243 case DIE_SSTEPBP:
244 notify_die(DIE_SSTEPBP, "single_step", regs, bundle,
245 INT_ILL, SIGTRAP);
246 break;
247 default:
248 return 0;
249 }
250
251 return 1;
252}
253
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254void __kprobes do_trap(struct pt_regs *regs, int fault_num,
255 unsigned long reason)
256{
49e4e156 257 enum ctx_state prev_state = exception_enter();
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258 siginfo_t info = { 0 };
259 int signo, code;
a714ffff 260 unsigned long address = 0;
a0099303 261 tile_bundle_bits instr;
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262 int is_kernel = !user_mode(regs);
263
264 /* Handle breakpoints, etc. */
265 if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
49e4e156 266 goto done;
867e359b 267
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268 /* Re-enable interrupts, if they were previously enabled. */
269 if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
270 local_irq_enable();
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271
272 /*
273 * If it hits in kernel mode and we can't fix it up, just exit the
274 * current process and hope for the best.
275 */
3fa17c39 276 if (is_kernel) {
c6f696f6 277 const char *name;
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278 char buf[100];
279 if (fixup_exception(regs)) /* ILL_TRANS or UNALIGN_DATA */
49e4e156 280 goto done;
c6f696f6 281 if (fault_num >= 0 &&
367b9380 282 fault_num < ARRAY_SIZE(int_name) &&
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CM
283 int_name[fault_num] != NULL)
284 name = int_name[fault_num];
285 else
286 name = "Unknown interrupt";
867e359b 287 if (fault_num == INT_GPV)
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288 snprintf(buf, sizeof(buf), "; GPV_REASON %#lx", reason);
289#ifdef __tilegx__
290 else if (fault_num == INT_ILL_TRANS)
291 snprintf(buf, sizeof(buf), "; address %#lx", reason);
292#endif
293 else
294 buf[0] = '\0';
295 pr_alert("Kernel took bad trap %d (%s) at PC %#lx%s\n",
296 fault_num, name, regs->pc, buf);
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297 show_regs(regs);
298 do_exit(SIGKILL); /* FIXME: implement i386 die() */
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299 }
300
301 switch (fault_num) {
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302 case INT_MEM_ERROR:
303 signo = SIGBUS;
304 code = BUS_OBJERR;
305 break;
867e359b 306 case INT_ILL:
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307 if (copy_from_user(&instr, (void __user *)regs->pc,
308 sizeof(instr))) {
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309 pr_err("Unreadable instruction for INT_ILL: %#lx\n",
310 regs->pc);
867e359b 311 do_exit(SIGKILL);
867e359b 312 }
0707ad30 313 if (!special_ill(instr, &signo, &code)) {
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314 signo = SIGILL;
315 code = ILL_ILLOPC;
316 }
317 address = regs->pc;
318 break;
319 case INT_GPV:
320#if CHIP_HAS_TILE_DMA()
321 if (retry_gpv(reason))
49e4e156 322 goto done;
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323#endif
324 /*FALLTHROUGH*/
325 case INT_UDN_ACCESS:
326 case INT_IDN_ACCESS:
327#if CHIP_HAS_SN()
328 case INT_SN_ACCESS:
329#endif
330 signo = SIGILL;
331 code = ILL_PRVREG;
332 address = regs->pc;
333 break;
334 case INT_SWINT_3:
335 case INT_SWINT_2:
336 case INT_SWINT_0:
337 signo = SIGILL;
338 code = ILL_ILLTRP;
339 address = regs->pc;
340 break;
341 case INT_UNALIGN_DATA:
233325b9 342#ifndef __tilegx__ /* Emulated support for single step debugging */
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343 if (unaligned_fixup >= 0) {
344 struct single_step_state *state =
345 current_thread_info()->step_state;
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346 if (!state ||
347 (void __user *)(regs->pc) != state->buffer) {
867e359b 348 single_step_once(regs);
49e4e156 349 goto done;
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350 }
351 }
352#endif
353 signo = SIGBUS;
354 code = BUS_ADRALN;
355 address = 0;
356 break;
357 case INT_DOUBLE_FAULT:
358 /*
359 * For double fault, "reason" is actually passed as
a78c942d 360 * SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
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361 * we can provide the original fault number rather than
362 * the uninteresting "INT_DOUBLE_FAULT" so the user can
363 * learn what actually struck while PL0 ICS was set.
364 */
365 fault_num = reason;
366 signo = SIGILL;
367 code = ILL_DBLFLT;
368 address = regs->pc;
369 break;
370#ifdef __tilegx__
e1723538
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371 case INT_ILL_TRANS: {
372 /* Avoid a hardware erratum with the return address stack. */
373 fill_ra_stack();
374
867e359b 375 signo = SIGSEGV;
70d2b595 376 address = reason;
867e359b 377 code = SEGV_MAPERR;
867e359b 378 break;
e1723538 379 }
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380#endif
381 default:
382 panic("Unexpected do_trap interrupt number %d", fault_num);
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383 }
384
385 info.si_signo = signo;
386 info.si_code = code;
0707ad30 387 info.si_addr = (void __user *)address;
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388 if (signo == SIGILL)
389 info.si_trapno = fault_num;
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390 if (signo != SIGTRAP)
391 trace_unhandled_signal("trap", regs, address, signo);
867e359b 392 force_sig_info(signo, &info, current);
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393
394done:
395 exception_exit(prev_state);
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396}
397
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398void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
399{
400 _dump_stack(dummy, pc, lr, sp, r52);
0707ad30 401 pr_emerg("Double fault: exiting\n");
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402 machine_halt();
403}