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1da177e4 LT |
1 | /* $Id: unaligned.c,v 1.24 2002/02/09 19:49:31 davem Exp $ |
2 | * unaligned.c: Unaligned load/store trap handling with special | |
3 | * cases for the kernel to do them more quickly. | |
4 | * | |
5 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | |
6 | * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | |
7 | */ | |
8 | ||
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/module.h> | |
14 | #include <asm/asi.h> | |
15 | #include <asm/ptrace.h> | |
16 | #include <asm/pstate.h> | |
17 | #include <asm/processor.h> | |
18 | #include <asm/system.h> | |
19 | #include <asm/uaccess.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/smp_lock.h> | |
22 | #include <linux/bitops.h> | |
23 | #include <asm/fpumacro.h> | |
24 | ||
25 | /* #define DEBUG_MNA */ | |
26 | ||
27 | enum direction { | |
28 | load, /* ld, ldd, ldh, ldsh */ | |
29 | store, /* st, std, sth, stsh */ | |
30 | both, /* Swap, ldstub, cas, ... */ | |
31 | fpld, | |
32 | fpst, | |
33 | invalid, | |
34 | }; | |
35 | ||
36 | #ifdef DEBUG_MNA | |
37 | static char *dirstrings[] = { | |
38 | "load", "store", "both", "fpload", "fpstore", "invalid" | |
39 | }; | |
40 | #endif | |
41 | ||
42 | static inline enum direction decode_direction(unsigned int insn) | |
43 | { | |
44 | unsigned long tmp = (insn >> 21) & 1; | |
45 | ||
46 | if (!tmp) | |
47 | return load; | |
48 | else { | |
49 | switch ((insn>>19)&0xf) { | |
50 | case 15: /* swap* */ | |
51 | return both; | |
52 | default: | |
53 | return store; | |
54 | } | |
55 | } | |
56 | } | |
57 | ||
58 | /* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */ | |
59 | static inline int decode_access_size(unsigned int insn) | |
60 | { | |
61 | unsigned int tmp; | |
62 | ||
63 | tmp = ((insn >> 19) & 0xf); | |
64 | if (tmp == 11 || tmp == 14) /* ldx/stx */ | |
65 | return 8; | |
66 | tmp &= 3; | |
67 | if (!tmp) | |
68 | return 4; | |
69 | else if (tmp == 3) | |
70 | return 16; /* ldd/std - Although it is actually 8 */ | |
71 | else if (tmp == 2) | |
72 | return 2; | |
73 | else { | |
74 | printk("Impossible unaligned trap. insn=%08x\n", insn); | |
75 | die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs); | |
76 | ||
77 | /* GCC should never warn that control reaches the end | |
78 | * of this function without returning a value because | |
79 | * die_if_kernel() is marked with attribute 'noreturn'. | |
80 | * Alas, some versions do... | |
81 | */ | |
82 | ||
83 | return 0; | |
84 | } | |
85 | } | |
86 | ||
87 | static inline int decode_asi(unsigned int insn, struct pt_regs *regs) | |
88 | { | |
89 | if (insn & 0x800000) { | |
90 | if (insn & 0x2000) | |
91 | return (unsigned char)(regs->tstate >> 24); /* %asi */ | |
92 | else | |
93 | return (unsigned char)(insn >> 5); /* imm_asi */ | |
94 | } else | |
95 | return ASI_P; | |
96 | } | |
97 | ||
98 | /* 0x400000 = signed, 0 = unsigned */ | |
99 | static inline int decode_signedness(unsigned int insn) | |
100 | { | |
101 | return (insn & 0x400000); | |
102 | } | |
103 | ||
104 | static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2, | |
105 | unsigned int rd, int from_kernel) | |
106 | { | |
107 | if (rs2 >= 16 || rs1 >= 16 || rd >= 16) { | |
108 | if (from_kernel != 0) | |
109 | __asm__ __volatile__("flushw"); | |
110 | else | |
111 | flushw_user(); | |
112 | } | |
113 | } | |
114 | ||
115 | static inline long sign_extend_imm13(long imm) | |
116 | { | |
117 | return imm << 51 >> 51; | |
118 | } | |
119 | ||
120 | static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) | |
121 | { | |
122 | unsigned long value; | |
123 | ||
124 | if (reg < 16) | |
125 | return (!reg ? 0 : regs->u_regs[reg]); | |
126 | if (regs->tstate & TSTATE_PRIV) { | |
127 | struct reg_window *win; | |
128 | win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); | |
129 | value = win->locals[reg - 16]; | |
130 | } else if (test_thread_flag(TIF_32BIT)) { | |
131 | struct reg_window32 __user *win32; | |
132 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | |
133 | get_user(value, &win32->locals[reg - 16]); | |
134 | } else { | |
135 | struct reg_window __user *win; | |
136 | win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); | |
137 | get_user(value, &win->locals[reg - 16]); | |
138 | } | |
139 | return value; | |
140 | } | |
141 | ||
142 | static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs) | |
143 | { | |
144 | if (reg < 16) | |
145 | return ®s->u_regs[reg]; | |
146 | if (regs->tstate & TSTATE_PRIV) { | |
147 | struct reg_window *win; | |
148 | win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); | |
149 | return &win->locals[reg - 16]; | |
150 | } else if (test_thread_flag(TIF_32BIT)) { | |
151 | struct reg_window32 *win32; | |
152 | win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | |
153 | return (unsigned long *)&win32->locals[reg - 16]; | |
154 | } else { | |
155 | struct reg_window *win; | |
156 | win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); | |
157 | return &win->locals[reg - 16]; | |
158 | } | |
159 | } | |
160 | ||
161 | unsigned long compute_effective_address(struct pt_regs *regs, | |
162 | unsigned int insn, unsigned int rd) | |
163 | { | |
164 | unsigned int rs1 = (insn >> 14) & 0x1f; | |
165 | unsigned int rs2 = insn & 0x1f; | |
166 | int from_kernel = (regs->tstate & TSTATE_PRIV) != 0; | |
167 | ||
168 | if (insn & 0x2000) { | |
169 | maybe_flush_windows(rs1, 0, rd, from_kernel); | |
170 | return (fetch_reg(rs1, regs) + sign_extend_imm13(insn)); | |
171 | } else { | |
172 | maybe_flush_windows(rs1, rs2, rd, from_kernel); | |
173 | return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs)); | |
174 | } | |
175 | } | |
176 | ||
177 | /* This is just to make gcc think die_if_kernel does return... */ | |
178 | static void __attribute_used__ unaligned_panic(char *str, struct pt_regs *regs) | |
179 | { | |
180 | die_if_kernel(str, regs); | |
181 | } | |
182 | ||
5fd29752 DM |
183 | extern int do_int_load(unsigned long *dest_reg, int size, |
184 | unsigned long *saddr, int is_signed, int asi); | |
1da177e4 | 185 | |
5fd29752 DM |
186 | extern int __do_int_store(unsigned long *dst_addr, int size, |
187 | unsigned long src_val, int asi); | |
a3f99858 | 188 | |
5fd29752 DM |
189 | static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr, |
190 | struct pt_regs *regs, int asi, int orig_asi) | |
a3f99858 DM |
191 | { |
192 | unsigned long zero = 0; | |
ff171d8f DM |
193 | unsigned long *src_val_p = &zero; |
194 | unsigned long src_val; | |
a3f99858 DM |
195 | |
196 | if (size == 16) { | |
197 | size = 8; | |
198 | zero = (((long)(reg_num ? | |
199 | (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) | | |
200 | (unsigned)fetch_reg(reg_num + 1, regs); | |
201 | } else if (reg_num) { | |
ff171d8f DM |
202 | src_val_p = fetch_reg_addr(reg_num, regs); |
203 | } | |
204 | src_val = *src_val_p; | |
205 | if (unlikely(asi != orig_asi)) { | |
206 | switch (size) { | |
207 | case 2: | |
208 | src_val = swab16(src_val); | |
209 | break; | |
210 | case 4: | |
211 | src_val = swab32(src_val); | |
212 | break; | |
213 | case 8: | |
214 | src_val = swab64(src_val); | |
215 | break; | |
216 | case 16: | |
217 | default: | |
218 | BUG(); | |
219 | break; | |
220 | }; | |
a3f99858 | 221 | } |
5fd29752 | 222 | return __do_int_store(dst_addr, size, src_val, asi); |
a3f99858 | 223 | } |
1da177e4 LT |
224 | |
225 | static inline void advance(struct pt_regs *regs) | |
226 | { | |
227 | regs->tpc = regs->tnpc; | |
228 | regs->tnpc += 4; | |
229 | if (test_thread_flag(TIF_32BIT)) { | |
230 | regs->tpc &= 0xffffffff; | |
231 | regs->tnpc &= 0xffffffff; | |
232 | } | |
233 | } | |
234 | ||
235 | static inline int floating_point_load_or_store_p(unsigned int insn) | |
236 | { | |
237 | return (insn >> 24) & 1; | |
238 | } | |
239 | ||
240 | static inline int ok_for_kernel(unsigned int insn) | |
241 | { | |
242 | return !floating_point_load_or_store_p(insn); | |
243 | } | |
244 | ||
5fd29752 | 245 | static void kernel_mna_trap_fault(void) |
1da177e4 | 246 | { |
a3f99858 DM |
247 | struct pt_regs *regs = current_thread_info()->kern_una_regs; |
248 | unsigned int insn = current_thread_info()->kern_una_insn; | |
8cf14af0 | 249 | const struct exception_table_entry *entry; |
1da177e4 | 250 | |
8cf14af0 DM |
251 | entry = search_exception_tables(regs->tpc); |
252 | if (!entry) { | |
a3f99858 DM |
253 | unsigned long address; |
254 | ||
255 | address = compute_effective_address(regs, insn, | |
256 | ((insn >> 25) & 0x1f)); | |
1da177e4 | 257 | if (address < PAGE_SIZE) { |
a3f99858 DM |
258 | printk(KERN_ALERT "Unable to handle kernel NULL " |
259 | "pointer dereference in mna handler"); | |
1da177e4 | 260 | } else |
a3f99858 DM |
261 | printk(KERN_ALERT "Unable to handle kernel paging " |
262 | "request in mna handler"); | |
1da177e4 | 263 | printk(KERN_ALERT " at virtual address %016lx\n",address); |
a3f99858 | 264 | printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n", |
1da177e4 LT |
265 | (current->mm ? CTX_HWBITS(current->mm->context) : |
266 | CTX_HWBITS(current->active_mm->context))); | |
a3f99858 | 267 | printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n", |
1da177e4 LT |
268 | (current->mm ? (unsigned long) current->mm->pgd : |
269 | (unsigned long) current->active_mm->pgd)); | |
270 | die_if_kernel("Oops", regs); | |
271 | /* Not reached */ | |
272 | } | |
8cf14af0 | 273 | regs->tpc = entry->fixup; |
1da177e4 | 274 | regs->tnpc = regs->tpc + 4; |
1da177e4 LT |
275 | |
276 | regs->tstate &= ~TSTATE_ASI; | |
277 | regs->tstate |= (ASI_AIUS << 24UL); | |
278 | } | |
279 | ||
ed6b0b45 | 280 | asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn) |
1da177e4 LT |
281 | { |
282 | enum direction dir = decode_direction(insn); | |
283 | int size = decode_access_size(insn); | |
284 | ||
a3f99858 DM |
285 | current_thread_info()->kern_una_regs = regs; |
286 | current_thread_info()->kern_una_insn = insn; | |
287 | ||
1da177e4 | 288 | if (!ok_for_kernel(insn) || dir == both) { |
a3f99858 DM |
289 | printk("Unsupported unaligned load/store trap for kernel " |
290 | "at <%016lx>.\n", regs->tpc); | |
291 | unaligned_panic("Kernel does fpu/atomic " | |
292 | "unaligned load/store.", regs); | |
293 | ||
294 | kernel_mna_trap_fault(); | |
1da177e4 | 295 | } else { |
705747ab | 296 | unsigned long addr, *reg_addr; |
5fd29752 | 297 | int orig_asi, asi, err; |
1da177e4 | 298 | |
a3f99858 DM |
299 | addr = compute_effective_address(regs, insn, |
300 | ((insn >> 25) & 0x1f)); | |
1da177e4 | 301 | #ifdef DEBUG_MNA |
a3f99858 DM |
302 | printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] " |
303 | "retpc[%016lx]\n", | |
304 | regs->tpc, dirstrings[dir], addr, size, | |
305 | regs->u_regs[UREG_RETPC]); | |
1da177e4 | 306 | #endif |
ff171d8f DM |
307 | orig_asi = asi = decode_asi(insn, regs); |
308 | switch (asi) { | |
309 | case ASI_NL: | |
310 | case ASI_AIUPL: | |
311 | case ASI_AIUSL: | |
312 | case ASI_PL: | |
313 | case ASI_SL: | |
314 | case ASI_PNFL: | |
315 | case ASI_SNFL: | |
316 | asi &= ~0x08; | |
317 | break; | |
318 | }; | |
1da177e4 LT |
319 | switch (dir) { |
320 | case load: | |
705747ab | 321 | reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs); |
5fd29752 DM |
322 | err = do_int_load(reg_addr, size, |
323 | (unsigned long *) addr, | |
324 | decode_signedness(insn), asi); | |
325 | if (likely(!err) && unlikely(asi != orig_asi)) { | |
705747ab | 326 | unsigned long val_in = *reg_addr; |
ff171d8f DM |
327 | switch (size) { |
328 | case 2: | |
329 | val_in = swab16(val_in); | |
330 | break; | |
331 | case 4: | |
332 | val_in = swab32(val_in); | |
333 | break; | |
334 | case 8: | |
335 | val_in = swab64(val_in); | |
336 | break; | |
337 | case 16: | |
338 | default: | |
339 | BUG(); | |
340 | break; | |
341 | }; | |
705747ab | 342 | *reg_addr = val_in; |
ff171d8f | 343 | } |
1da177e4 LT |
344 | break; |
345 | ||
346 | case store: | |
5fd29752 DM |
347 | err = do_int_store(((insn>>25)&0x1f), size, |
348 | (unsigned long *) addr, regs, | |
349 | asi, orig_asi); | |
1da177e4 | 350 | break; |
a3f99858 | 351 | |
1da177e4 LT |
352 | default: |
353 | panic("Impossible kernel unaligned trap."); | |
354 | /* Not reached... */ | |
355 | } | |
5fd29752 DM |
356 | if (unlikely(err)) |
357 | kernel_mna_trap_fault(); | |
358 | else | |
359 | advance(regs); | |
1da177e4 LT |
360 | } |
361 | } | |
362 | ||
363 | static char popc_helper[] = { | |
364 | 0, 1, 1, 2, 1, 2, 2, 3, | |
365 | 1, 2, 2, 3, 2, 3, 3, 4, | |
366 | }; | |
367 | ||
368 | int handle_popc(u32 insn, struct pt_regs *regs) | |
369 | { | |
370 | u64 value; | |
371 | int ret, i, rd = ((insn >> 25) & 0x1f); | |
372 | int from_kernel = (regs->tstate & TSTATE_PRIV) != 0; | |
373 | ||
374 | if (insn & 0x2000) { | |
375 | maybe_flush_windows(0, 0, rd, from_kernel); | |
376 | value = sign_extend_imm13(insn); | |
377 | } else { | |
378 | maybe_flush_windows(0, insn & 0x1f, rd, from_kernel); | |
379 | value = fetch_reg(insn & 0x1f, regs); | |
380 | } | |
381 | for (ret = 0, i = 0; i < 16; i++) { | |
382 | ret += popc_helper[value & 0xf]; | |
383 | value >>= 4; | |
384 | } | |
385 | if (rd < 16) { | |
386 | if (rd) | |
387 | regs->u_regs[rd] = ret; | |
388 | } else { | |
389 | if (test_thread_flag(TIF_32BIT)) { | |
390 | struct reg_window32 __user *win32; | |
391 | win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); | |
392 | put_user(ret, &win32->locals[rd - 16]); | |
393 | } else { | |
394 | struct reg_window __user *win; | |
395 | win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); | |
396 | put_user(ret, &win->locals[rd - 16]); | |
397 | } | |
398 | } | |
399 | advance(regs); | |
400 | return 1; | |
401 | } | |
402 | ||
403 | extern void do_fpother(struct pt_regs *regs); | |
404 | extern void do_privact(struct pt_regs *regs); | |
6c52a96e DM |
405 | extern void spitfire_data_access_exception(struct pt_regs *regs, |
406 | unsigned long sfsr, | |
407 | unsigned long sfar); | |
ed6b0b45 DM |
408 | extern void sun4v_data_access_exception(struct pt_regs *regs, |
409 | unsigned long addr, | |
410 | unsigned long type_ctx); | |
1da177e4 LT |
411 | |
412 | int handle_ldf_stq(u32 insn, struct pt_regs *regs) | |
413 | { | |
414 | unsigned long addr = compute_effective_address(regs, insn, 0); | |
415 | int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); | |
416 | struct fpustate *f = FPUSTATE; | |
417 | int asi = decode_asi(insn, regs); | |
418 | int flag = (freg < 32) ? FPRS_DL : FPRS_DU; | |
419 | ||
420 | save_and_clear_fpu(); | |
421 | current_thread_info()->xfsr[0] &= ~0x1c000; | |
422 | if (freg & 3) { | |
423 | current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */; | |
424 | do_fpother(regs); | |
425 | return 0; | |
426 | } | |
427 | if (insn & 0x200000) { | |
428 | /* STQ */ | |
429 | u64 first = 0, second = 0; | |
430 | ||
431 | if (current_thread_info()->fpsaved[0] & flag) { | |
432 | first = *(u64 *)&f->regs[freg]; | |
433 | second = *(u64 *)&f->regs[freg+2]; | |
434 | } | |
435 | if (asi < 0x80) { | |
436 | do_privact(regs); | |
437 | return 1; | |
438 | } | |
439 | switch (asi) { | |
440 | case ASI_P: | |
441 | case ASI_S: break; | |
442 | case ASI_PL: | |
443 | case ASI_SL: | |
444 | { | |
445 | /* Need to convert endians */ | |
446 | u64 tmp = __swab64p(&first); | |
447 | ||
448 | first = __swab64p(&second); | |
449 | second = tmp; | |
450 | break; | |
451 | } | |
452 | default: | |
ed6b0b45 DM |
453 | if (tlb_type == hypervisor) |
454 | sun4v_data_access_exception(regs, addr, 0); | |
455 | else | |
456 | spitfire_data_access_exception(regs, 0, addr); | |
1da177e4 LT |
457 | return 1; |
458 | } | |
459 | if (put_user (first >> 32, (u32 __user *)addr) || | |
460 | __put_user ((u32)first, (u32 __user *)(addr + 4)) || | |
461 | __put_user (second >> 32, (u32 __user *)(addr + 8)) || | |
462 | __put_user ((u32)second, (u32 __user *)(addr + 12))) { | |
ed6b0b45 DM |
463 | if (tlb_type == hypervisor) |
464 | sun4v_data_access_exception(regs, addr, 0); | |
465 | else | |
466 | spitfire_data_access_exception(regs, 0, addr); | |
1da177e4 LT |
467 | return 1; |
468 | } | |
469 | } else { | |
470 | /* LDF, LDDF, LDQF */ | |
471 | u32 data[4] __attribute__ ((aligned(8))); | |
472 | int size, i; | |
473 | int err; | |
474 | ||
475 | if (asi < 0x80) { | |
476 | do_privact(regs); | |
477 | return 1; | |
478 | } else if (asi > ASI_SNFL) { | |
ed6b0b45 DM |
479 | if (tlb_type == hypervisor) |
480 | sun4v_data_access_exception(regs, addr, 0); | |
481 | else | |
482 | spitfire_data_access_exception(regs, 0, addr); | |
1da177e4 LT |
483 | return 1; |
484 | } | |
485 | switch (insn & 0x180000) { | |
486 | case 0x000000: size = 1; break; | |
487 | case 0x100000: size = 4; break; | |
488 | default: size = 2; break; | |
489 | } | |
490 | for (i = 0; i < size; i++) | |
491 | data[i] = 0; | |
492 | ||
493 | err = get_user (data[0], (u32 __user *) addr); | |
494 | if (!err) { | |
495 | for (i = 1; i < size; i++) | |
496 | err |= __get_user (data[i], (u32 __user *)(addr + 4*i)); | |
497 | } | |
498 | if (err && !(asi & 0x2 /* NF */)) { | |
ed6b0b45 DM |
499 | if (tlb_type == hypervisor) |
500 | sun4v_data_access_exception(regs, addr, 0); | |
501 | else | |
502 | spitfire_data_access_exception(regs, 0, addr); | |
1da177e4 LT |
503 | return 1; |
504 | } | |
505 | if (asi & 0x8) /* Little */ { | |
506 | u64 tmp; | |
507 | ||
508 | switch (size) { | |
509 | case 1: data[0] = le32_to_cpup(data + 0); break; | |
510 | default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0)); | |
511 | break; | |
512 | case 4: tmp = le64_to_cpup((u64 *)(data + 0)); | |
513 | *(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2)); | |
514 | *(u64 *)(data + 2) = tmp; | |
515 | break; | |
516 | } | |
517 | } | |
518 | if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) { | |
519 | current_thread_info()->fpsaved[0] = FPRS_FEF; | |
520 | current_thread_info()->gsr[0] = 0; | |
521 | } | |
522 | if (!(current_thread_info()->fpsaved[0] & flag)) { | |
523 | if (freg < 32) | |
524 | memset(f->regs, 0, 32*sizeof(u32)); | |
525 | else | |
526 | memset(f->regs+32, 0, 32*sizeof(u32)); | |
527 | } | |
528 | memcpy(f->regs + freg, data, size * 4); | |
529 | current_thread_info()->fpsaved[0] |= flag; | |
530 | } | |
531 | advance(regs); | |
532 | return 1; | |
533 | } | |
534 | ||
535 | void handle_ld_nf(u32 insn, struct pt_regs *regs) | |
536 | { | |
537 | int rd = ((insn >> 25) & 0x1f); | |
538 | int from_kernel = (regs->tstate & TSTATE_PRIV) != 0; | |
539 | unsigned long *reg; | |
540 | ||
541 | maybe_flush_windows(0, 0, rd, from_kernel); | |
542 | reg = fetch_reg_addr(rd, regs); | |
543 | if (from_kernel || rd < 16) { | |
544 | reg[0] = 0; | |
545 | if ((insn & 0x780000) == 0x180000) | |
546 | reg[1] = 0; | |
547 | } else if (test_thread_flag(TIF_32BIT)) { | |
548 | put_user(0, (int __user *) reg); | |
549 | if ((insn & 0x780000) == 0x180000) | |
550 | put_user(0, ((int __user *) reg) + 1); | |
551 | } else { | |
552 | put_user(0, (unsigned long __user *) reg); | |
553 | if ((insn & 0x780000) == 0x180000) | |
554 | put_user(0, (unsigned long __user *) reg + 1); | |
555 | } | |
556 | advance(regs); | |
557 | } | |
558 | ||
559 | void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr) | |
560 | { | |
561 | unsigned long pc = regs->tpc; | |
562 | unsigned long tstate = regs->tstate; | |
563 | u32 insn; | |
564 | u32 first, second; | |
565 | u64 value; | |
ed6b0b45 | 566 | u8 freg; |
1da177e4 LT |
567 | int flag; |
568 | struct fpustate *f = FPUSTATE; | |
569 | ||
570 | if (tstate & TSTATE_PRIV) | |
571 | die_if_kernel("lddfmna from kernel", regs); | |
572 | if (test_thread_flag(TIF_32BIT)) | |
573 | pc = (u32)pc; | |
574 | if (get_user(insn, (u32 __user *) pc) != -EFAULT) { | |
ed6b0b45 | 575 | int asi = decode_asi(insn, regs); |
1da177e4 LT |
576 | if ((asi > ASI_SNFL) || |
577 | (asi < ASI_P)) | |
578 | goto daex; | |
579 | if (get_user(first, (u32 __user *)sfar) || | |
580 | get_user(second, (u32 __user *)(sfar + 4))) { | |
581 | if (asi & 0x2) /* NF */ { | |
582 | first = 0; second = 0; | |
583 | } else | |
584 | goto daex; | |
585 | } | |
586 | save_and_clear_fpu(); | |
587 | freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); | |
588 | value = (((u64)first) << 32) | second; | |
589 | if (asi & 0x8) /* Little */ | |
590 | value = __swab64p(&value); | |
591 | flag = (freg < 32) ? FPRS_DL : FPRS_DU; | |
592 | if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) { | |
593 | current_thread_info()->fpsaved[0] = FPRS_FEF; | |
594 | current_thread_info()->gsr[0] = 0; | |
595 | } | |
596 | if (!(current_thread_info()->fpsaved[0] & flag)) { | |
597 | if (freg < 32) | |
598 | memset(f->regs, 0, 32*sizeof(u32)); | |
599 | else | |
600 | memset(f->regs+32, 0, 32*sizeof(u32)); | |
601 | } | |
602 | *(u64 *)(f->regs + freg) = value; | |
603 | current_thread_info()->fpsaved[0] |= flag; | |
604 | } else { | |
ed6b0b45 DM |
605 | daex: |
606 | if (tlb_type == hypervisor) | |
607 | sun4v_data_access_exception(regs, sfar, sfsr); | |
608 | else | |
609 | spitfire_data_access_exception(regs, sfsr, sfar); | |
1da177e4 LT |
610 | return; |
611 | } | |
612 | advance(regs); | |
613 | return; | |
614 | } | |
615 | ||
616 | void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr) | |
617 | { | |
618 | unsigned long pc = regs->tpc; | |
619 | unsigned long tstate = regs->tstate; | |
620 | u32 insn; | |
621 | u64 value; | |
ed6b0b45 | 622 | u8 freg; |
1da177e4 LT |
623 | int flag; |
624 | struct fpustate *f = FPUSTATE; | |
625 | ||
626 | if (tstate & TSTATE_PRIV) | |
627 | die_if_kernel("stdfmna from kernel", regs); | |
628 | if (test_thread_flag(TIF_32BIT)) | |
629 | pc = (u32)pc; | |
630 | if (get_user(insn, (u32 __user *) pc) != -EFAULT) { | |
ed6b0b45 | 631 | int asi = decode_asi(insn, regs); |
1da177e4 | 632 | freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20); |
1da177e4 LT |
633 | value = 0; |
634 | flag = (freg < 32) ? FPRS_DL : FPRS_DU; | |
635 | if ((asi > ASI_SNFL) || | |
636 | (asi < ASI_P)) | |
637 | goto daex; | |
638 | save_and_clear_fpu(); | |
639 | if (current_thread_info()->fpsaved[0] & flag) | |
640 | value = *(u64 *)&f->regs[freg]; | |
641 | switch (asi) { | |
642 | case ASI_P: | |
643 | case ASI_S: break; | |
644 | case ASI_PL: | |
645 | case ASI_SL: | |
646 | value = __swab64p(&value); break; | |
647 | default: goto daex; | |
648 | } | |
649 | if (put_user (value >> 32, (u32 __user *) sfar) || | |
650 | __put_user ((u32)value, (u32 __user *)(sfar + 4))) | |
651 | goto daex; | |
652 | } else { | |
ed6b0b45 DM |
653 | daex: |
654 | if (tlb_type == hypervisor) | |
655 | sun4v_data_access_exception(regs, sfar, sfsr); | |
656 | else | |
657 | spitfire_data_access_exception(regs, sfsr, sfar); | |
1da177e4 LT |
658 | return; |
659 | } | |
660 | advance(regs); | |
661 | return; | |
662 | } |