[SPARC64]: Move phys_base, kern_{base,size}, and sp_banks[] init to paging_init
[linux-2.6-block.git] / arch / sparc64 / kernel / kprobes.c
CommitLineData
1da177e4
LT
1/* arch/sparc64/kernel/kprobes.c
2 *
3 * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
4 */
5
6#include <linux/config.h>
7#include <linux/kernel.h>
8#include <linux/kprobes.h>
1da177e4
LT
9#include <asm/kdebug.h>
10#include <asm/signal.h>
05e14cb3 11#include <asm/cacheflush.h>
1da177e4
LT
12
13/* We do not have hardware single-stepping on sparc64.
14 * So we implement software single-stepping with breakpoint
15 * traps. The top-level scheme is similar to that used
16 * in the x86 kprobes implementation.
17 *
18 * In the kprobe->ainsn.insn[] array we store the original
19 * instruction at index zero and a break instruction at
20 * index one.
21 *
22 * When we hit a kprobe we:
23 * - Run the pre-handler
24 * - Remember "regs->tnpc" and interrupt level stored in
25 * "regs->tstate" so we can restore them later
26 * - Disable PIL interrupts
27 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
28 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
29 * - Mark that we are actively in a kprobe
30 *
31 * At this point we wait for the second breakpoint at
32 * kprobe->ainsn.insn[1] to hit. When it does we:
33 * - Run the post-handler
34 * - Set regs->tpc to "remembered" regs->tnpc stored above,
35 * restore the PIL interrupt level in "regs->tstate" as well
36 * - Make any adjustments necessary to regs->tnpc in order
37 * to handle relative branches correctly. See below.
38 * - Mark that we are no longer actively in a kprobe.
39 */
40
05e14cb3 41int __kprobes arch_prepare_kprobe(struct kprobe *p)
1da177e4
LT
42{
43 return 0;
44}
45
05e14cb3 46void __kprobes arch_copy_kprobe(struct kprobe *p)
1da177e4
LT
47{
48 p->ainsn.insn[0] = *p->addr;
49 p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
7e1048b1
RL
50 p->opcode = *p->addr;
51}
52
05e14cb3 53void __kprobes arch_arm_kprobe(struct kprobe *p)
7e1048b1
RL
54{
55 *p->addr = BREAKPOINT_INSTRUCTION;
56 flushi(p->addr);
57}
58
05e14cb3 59void __kprobes arch_disarm_kprobe(struct kprobe *p)
7e1048b1
RL
60{
61 *p->addr = p->opcode;
62 flushi(p->addr);
1da177e4
LT
63}
64
05e14cb3 65void __kprobes arch_remove_kprobe(struct kprobe *p)
1da177e4
LT
66{
67}
68
1da177e4
LT
69static struct kprobe *current_kprobe;
70static unsigned long current_kprobe_orig_tnpc;
71static unsigned long current_kprobe_orig_tstate_pil;
72static unsigned int kprobe_status;
e539c233
PP
73static struct kprobe *kprobe_prev;
74static unsigned long kprobe_orig_tnpc_prev;
75static unsigned long kprobe_orig_tstate_pil_prev;
76static unsigned int kprobe_status_prev;
1da177e4 77
e539c233
PP
78static inline void save_previous_kprobe(void)
79{
80 kprobe_status_prev = kprobe_status;
81 kprobe_orig_tnpc_prev = current_kprobe_orig_tnpc;
82 kprobe_orig_tstate_pil_prev = current_kprobe_orig_tstate_pil;
83 kprobe_prev = current_kprobe;
84}
85
86static inline void restore_previous_kprobe(void)
87{
88 kprobe_status = kprobe_status_prev;
89 current_kprobe_orig_tnpc = kprobe_orig_tnpc_prev;
90 current_kprobe_orig_tstate_pil = kprobe_orig_tstate_pil_prev;
91 current_kprobe = kprobe_prev;
92}
93
94static inline void set_current_kprobe(struct kprobe *p, struct pt_regs *regs)
1da177e4
LT
95{
96 current_kprobe_orig_tnpc = regs->tnpc;
97 current_kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
e539c233
PP
98 current_kprobe = p;
99}
100
101static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
102{
1da177e4
LT
103 regs->tstate |= TSTATE_PIL;
104
105 /*single step inline, if it a breakpoint instruction*/
106 if (p->opcode == BREAKPOINT_INSTRUCTION) {
107 regs->tpc = (unsigned long) p->addr;
108 regs->tnpc = current_kprobe_orig_tnpc;
109 } else {
110 regs->tpc = (unsigned long) &p->ainsn.insn[0];
111 regs->tnpc = (unsigned long) &p->ainsn.insn[1];
112 }
113}
114
05e14cb3 115static int __kprobes kprobe_handler(struct pt_regs *regs)
1da177e4
LT
116{
117 struct kprobe *p;
118 void *addr = (void *) regs->tpc;
119 int ret = 0;
120
121 preempt_disable();
122
123 if (kprobe_running()) {
124 /* We *are* holding lock here, so this is safe.
125 * Disarm the probe we just hit, and ignore it.
126 */
127 p = get_kprobe(addr);
128 if (p) {
129 if (kprobe_status == KPROBE_HIT_SS) {
130 regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
131 current_kprobe_orig_tstate_pil);
132 unlock_kprobes();
133 goto no_kprobe;
134 }
e539c233
PP
135 /* We have reentered the kprobe_handler(), since
136 * another probe was hit while within the handler.
137 * We here save the original kprobes variables and
138 * just single step on the instruction of the new probe
139 * without calling any user handlers.
140 */
141 save_previous_kprobe();
142 set_current_kprobe(p, regs);
143 p->nmissed++;
144 kprobe_status = KPROBE_REENTER;
145 prepare_singlestep(p, regs);
146 return 1;
1da177e4
LT
147 } else {
148 p = current_kprobe;
149 if (p->break_handler && p->break_handler(p, regs))
150 goto ss_probe;
151 }
152 /* If it's not ours, can't be delete race, (we hold lock). */
153 goto no_kprobe;
154 }
155
156 lock_kprobes();
157 p = get_kprobe(addr);
158 if (!p) {
159 unlock_kprobes();
160 if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
161 /*
162 * The breakpoint instruction was removed right
163 * after we hit it. Another cpu has removed
164 * either a probepoint or a debugger breakpoint
165 * at this address. In either case, no further
166 * handling of this interrupt is appropriate.
167 */
168 ret = 1;
169 }
170 /* Not one of ours: let kernel handle it */
171 goto no_kprobe;
172 }
173
e539c233 174 set_current_kprobe(p, regs);
1da177e4 175 kprobe_status = KPROBE_HIT_ACTIVE;
1da177e4
LT
176 if (p->pre_handler && p->pre_handler(p, regs))
177 return 1;
178
179ss_probe:
180 prepare_singlestep(p, regs);
181 kprobe_status = KPROBE_HIT_SS;
182 return 1;
183
184no_kprobe:
185 preempt_enable_no_resched();
186 return ret;
187}
188
189/* If INSN is a relative control transfer instruction,
190 * return the corrected branch destination value.
191 *
192 * The original INSN location was REAL_PC, it actually
193 * executed at PC and produced destination address NPC.
194 */
05e14cb3
PP
195static unsigned long __kprobes relbranch_fixup(u32 insn, unsigned long real_pc,
196 unsigned long pc,
197 unsigned long npc)
1da177e4
LT
198{
199 /* Branch not taken, no mods necessary. */
200 if (npc == pc + 0x4UL)
201 return real_pc + 0x4UL;
202
203 /* The three cases are call, branch w/prediction,
204 * and traditional branch.
205 */
206 if ((insn & 0xc0000000) == 0x40000000 ||
207 (insn & 0xc1c00000) == 0x00400000 ||
208 (insn & 0xc1c00000) == 0x00800000) {
209 /* The instruction did all the work for us
210 * already, just apply the offset to the correct
211 * instruction location.
212 */
213 return (real_pc + (npc - pc));
214 }
215
216 return real_pc + 0x4UL;
217}
218
219/* If INSN is an instruction which writes it's PC location
220 * into a destination register, fix that up.
221 */
05e14cb3
PP
222static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
223 unsigned long real_pc)
1da177e4
LT
224{
225 unsigned long *slot = NULL;
226
227 /* Simplest cast is call, which always uses %o7 */
228 if ((insn & 0xc0000000) == 0x40000000) {
229 slot = &regs->u_regs[UREG_I7];
230 }
231
232 /* Jmpl encodes the register inside of the opcode */
233 if ((insn & 0xc1f80000) == 0x81c00000) {
234 unsigned long rd = ((insn >> 25) & 0x1f);
235
236 if (rd <= 15) {
237 slot = &regs->u_regs[rd];
238 } else {
239 /* Hard case, it goes onto the stack. */
240 flushw_all();
241
242 rd -= 16;
243 slot = (unsigned long *)
244 (regs->u_regs[UREG_FP] + STACK_BIAS);
245 slot += rd;
246 }
247 }
248 if (slot != NULL)
249 *slot = real_pc;
250}
251
252/*
253 * Called after single-stepping. p->addr is the address of the
254 * instruction whose first byte has been replaced by the breakpoint
255 * instruction. To avoid the SMP problems that can occur when we
256 * temporarily put back the original opcode to single-step, we
257 * single-stepped a copy of the instruction. The address of this
258 * copy is p->ainsn.insn.
259 *
260 * This function prepares to return from the post-single-step
261 * breakpoint trap.
262 */
05e14cb3 263static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
1da177e4
LT
264{
265 u32 insn = p->ainsn.insn[0];
266
267 regs->tpc = current_kprobe_orig_tnpc;
268 regs->tnpc = relbranch_fixup(insn,
269 (unsigned long) p->addr,
270 (unsigned long) &p->ainsn.insn[0],
271 regs->tnpc);
272 retpc_fixup(regs, insn, (unsigned long) p->addr);
273
274 regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
275 current_kprobe_orig_tstate_pil);
276}
277
278static inline int post_kprobe_handler(struct pt_regs *regs)
279{
280 if (!kprobe_running())
281 return 0;
282
e539c233
PP
283 if ((kprobe_status != KPROBE_REENTER) && current_kprobe->post_handler) {
284 kprobe_status = KPROBE_HIT_SSDONE;
1da177e4 285 current_kprobe->post_handler(current_kprobe, regs, 0);
e539c233 286 }
1da177e4
LT
287
288 resume_execution(current_kprobe, regs);
289
e539c233
PP
290 /*Restore back the original saved kprobes variables and continue. */
291 if (kprobe_status == KPROBE_REENTER) {
292 restore_previous_kprobe();
293 goto out;
294 }
1da177e4 295 unlock_kprobes();
e539c233 296out:
1da177e4
LT
297 preempt_enable_no_resched();
298
299 return 1;
300}
301
302/* Interrupts disabled, kprobe_lock held. */
303static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
304{
305 if (current_kprobe->fault_handler
306 && current_kprobe->fault_handler(current_kprobe, regs, trapnr))
307 return 1;
308
309 if (kprobe_status & KPROBE_HIT_SS) {
310 resume_execution(current_kprobe, regs);
311
312 unlock_kprobes();
313 preempt_enable_no_resched();
314 }
315 return 0;
316}
317
318/*
319 * Wrapper routine to for handling exceptions.
320 */
05e14cb3
PP
321int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
322 unsigned long val, void *data)
1da177e4
LT
323{
324 struct die_args *args = (struct die_args *)data;
325 switch (val) {
326 case DIE_DEBUG:
327 if (kprobe_handler(args->regs))
328 return NOTIFY_STOP;
329 break;
330 case DIE_DEBUG_2:
331 if (post_kprobe_handler(args->regs))
332 return NOTIFY_STOP;
333 break;
334 case DIE_GPF:
335 if (kprobe_running() &&
336 kprobe_fault_handler(args->regs, args->trapnr))
337 return NOTIFY_STOP;
338 break;
339 case DIE_PAGE_FAULT:
340 if (kprobe_running() &&
341 kprobe_fault_handler(args->regs, args->trapnr))
342 return NOTIFY_STOP;
343 break;
344 default:
345 break;
346 }
347 return NOTIFY_DONE;
348}
349
05e14cb3
PP
350asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
351 struct pt_regs *regs)
1da177e4
LT
352{
353 BUG_ON(trap_level != 0x170 && trap_level != 0x171);
354
355 if (user_mode(regs)) {
356 local_irq_enable();
357 bad_trap(regs, trap_level);
358 return;
359 }
360
361 /* trap_level == 0x170 --> ta 0x70
362 * trap_level == 0x171 --> ta 0x71
363 */
364 if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
365 (trap_level == 0x170) ? "debug" : "debug_2",
366 regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
367 bad_trap(regs, trap_level);
368}
369
370/* Jprobes support. */
371static struct pt_regs jprobe_saved_regs;
372static struct pt_regs *jprobe_saved_regs_location;
373static struct sparc_stackf jprobe_saved_stack;
374
05e14cb3 375int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
1da177e4
LT
376{
377 struct jprobe *jp = container_of(p, struct jprobe, kp);
378
379 jprobe_saved_regs_location = regs;
380 memcpy(&jprobe_saved_regs, regs, sizeof(*regs));
381
382 /* Save a whole stack frame, this gets arguments
383 * pushed onto the stack after using up all the
384 * arg registers.
385 */
386 memcpy(&jprobe_saved_stack,
387 (char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
388 sizeof(jprobe_saved_stack));
389
390 regs->tpc = (unsigned long) jp->entry;
391 regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
392 regs->tstate |= TSTATE_PIL;
393
394 return 1;
395}
396
05e14cb3 397void __kprobes jprobe_return(void)
1da177e4
LT
398{
399 preempt_enable_no_resched();
400 __asm__ __volatile__(
401 ".globl jprobe_return_trap_instruction\n"
402"jprobe_return_trap_instruction:\n\t"
403 "ta 0x70");
404}
405
406extern void jprobe_return_trap_instruction(void);
407
408extern void __show_regs(struct pt_regs * regs);
409
05e14cb3 410int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
1da177e4
LT
411{
412 u32 *addr = (u32 *) regs->tpc;
413
414 if (addr == (u32 *) jprobe_return_trap_instruction) {
415 if (jprobe_saved_regs_location != regs) {
416 printk("JPROBE: Current regs (%p) does not match "
417 "saved regs (%p).\n",
418 regs, jprobe_saved_regs_location);
419 printk("JPROBE: Saved registers\n");
420 __show_regs(jprobe_saved_regs_location);
421 printk("JPROBE: Current registers\n");
422 __show_regs(regs);
423 BUG();
424 }
425 /* Restore old register state. Do pt_regs
426 * first so that UREG_FP is the original one for
427 * the stack frame restore.
428 */
429 memcpy(regs, &jprobe_saved_regs, sizeof(*regs));
430
431 memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
432 &jprobe_saved_stack,
433 sizeof(jprobe_saved_stack));
434
435 return 1;
436 }
437 return 0;
438}
e539c233 439
6772926b
RL
440/* architecture specific initialization */
441int arch_init_kprobes(void)
442{
443 return 0;
444}