[linux-block.git] / arch / sparc / kernel / vmlinux.lds.S

/* SPDX-License-Identifier: GPL-2.0 */
/* ld script for sparc32/sparc64 kernel */

#include <asm-generic/vmlinux.lds.h>

#include <asm/page.h>
#include <asm/thread_info.h>

#ifdef CONFIG_SPARC32
#define INITIAL_ADDRESS  0x10000 + SIZEOF_HEADERS
#define TEXTSTART	0xf0004000

#define SMP_CACHE_BYTES_SHIFT 5

#else
#define SMP_CACHE_BYTES_SHIFT 6
#define INITIAL_ADDRESS 0x4000
#define TEXTSTART      0x0000000000404000

#endif

#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)

#ifdef CONFIG_SPARC32
OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
OUTPUT_ARCH(sparc)
ENTRY(_start)
jiffies = jiffies_64 + 4;
#else
/* sparc64 */
OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
OUTPUT_ARCH(sparc:v9a)
ENTRY(_start)
jiffies = jiffies_64;
#endif

#ifdef CONFIG_SPARC64
ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
#endif

SECTIONS
{
#ifdef CONFIG_SPARC64
	swapper_pg_dir = 0x0000000000402000;
#endif
	. = INITIAL_ADDRESS;
	.text TEXTSTART :
	{
		_text = .;
		HEAD_TEXT
	        ALIGN_FUNCTION();
#ifdef CONFIG_SPARC64
	        /* Match text section symbols in head_64.S first */
	        *head_64.o(.text)
#endif
		TEXT_TEXT
		SCHED_TEXT
		LOCK_TEXT
		KPROBES_TEXT
		IRQENTRY_TEXT
		SOFTIRQENTRY_TEXT
		*(.gnu.warning)
	} = 0
	_etext = .;

	RO_DATA(PAGE_SIZE)

	/* Start of data section */
	_sdata = .;

	.data1 : {
		*(.data1)
	}
	RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZE)

	/* End of data section */
	_edata = .;

	.fixup : {
		__start___fixup = .;
		*(.fixup)
		__stop___fixup = .;
	}
	EXCEPTION_TABLE(16)

	. = ALIGN(PAGE_SIZE);
	__init_begin = ALIGN(PAGE_SIZE);
	INIT_TEXT_SECTION(PAGE_SIZE)
	__init_text_end = .;
	INIT_DATA_SECTION(16)

	. = ALIGN(4);
	.tsb_ldquad_phys_patch : {
		__tsb_ldquad_phys_patch = .;
		*(.tsb_ldquad_phys_patch)
		__tsb_ldquad_phys_patch_end = .;
	}

	.tsb_phys_patch : {
		__tsb_phys_patch = .;
		*(.tsb_phys_patch)
		__tsb_phys_patch_end = .;
	}

	.cpuid_patch : {
		__cpuid_patch = .;
		*(.cpuid_patch)
		__cpuid_patch_end = .;
	}

	.sun4v_1insn_patch : {
		__sun4v_1insn_patch = .;
		*(.sun4v_1insn_patch)
		__sun4v_1insn_patch_end = .;
	}
	.sun4v_2insn_patch : {
		__sun4v_2insn_patch = .;
		*(.sun4v_2insn_patch)
		__sun4v_2insn_patch_end = .;
	}
	.leon_1insn_patch : {
		__leon_1insn_patch = .;
		*(.leon_1insn_patch)
		__leon_1insn_patch_end = .;
	}
	.swapper_tsb_phys_patch : {
		__swapper_tsb_phys_patch = .;
		*(.swapper_tsb_phys_patch)
		__swapper_tsb_phys_patch_end = .;
	}
	.swapper_4m_tsb_phys_patch : {
		__swapper_4m_tsb_phys_patch = .;
		*(.swapper_4m_tsb_phys_patch)
		__swapper_4m_tsb_phys_patch_end = .;
	}
	.popc_3insn_patch : {
		__popc_3insn_patch = .;
		*(.popc_3insn_patch)
		__popc_3insn_patch_end = .;
	}
	.popc_6insn_patch : {
		__popc_6insn_patch = .;
		*(.popc_6insn_patch)
		__popc_6insn_patch_end = .;
	}
	.pause_3insn_patch : {
		__pause_3insn_patch = .;
		*(.pause_3insn_patch)
		__pause_3insn_patch_end = .;
	}
	.sun_m7_1insn_patch : {
		__sun_m7_1insn_patch = .;
		*(.sun_m7_1insn_patch)
		__sun_m7_1insn_patch_end = .;
	}
	.sun_m7_2insn_patch : {
		__sun_m7_2insn_patch = .;
		*(.sun_m7_2insn_patch)
		__sun_m7_2insn_patch_end = .;
	}
	.get_tick_patch : {
		__get_tick_patch = .;
		*(.get_tick_patch)
		__get_tick_patch_end = .;
	}
	.pud_huge_patch : {
		__pud_huge_patch = .;
		*(.pud_huge_patch)
		__pud_huge_patch_end = .;
	}
	.fast_win_ctrl_1insn_patch : {
		__fast_win_ctrl_1insn_patch = .;
		*(.fast_win_ctrl_1insn_patch)
		__fast_win_ctrl_1insn_patch_end = .;
	}
	PERCPU_SECTION(SMP_CACHE_BYTES)

	. = ALIGN(PAGE_SIZE);
	.exit.text : {
		EXIT_TEXT
	}

	.exit.data : {
		EXIT_DATA
	}

	. = ALIGN(PAGE_SIZE);
	__init_end = .;
	BSS_SECTION(0, 0, 0)
	_end = . ;

	STABS_DEBUG
	DWARF_DEBUG
	ELF_DETAILS

	DISCARDS
}
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1b1fbbca	2	/* ld script for sparc32/sparc64 kernel */
1da177e4 LT	3
1da177e4 LT	4	#include <asm-generic/vmlinux.lds.h>
b74e34db	5
bcbe40eb	6	#include <asm/page.h>
b74e34db	7	#include <asm/thread_info.h>
1da177e4	8
1b1fbbca SR	9	#ifdef CONFIG_SPARC32
	10	#define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
	11	#define TEXTSTART 0xf0004000
	12
	13	#define SMP_CACHE_BYTES_SHIFT 5
	14
	15	#else
	16	#define SMP_CACHE_BYTES_SHIFT 6
	17	#define INITIAL_ADDRESS 0x4000
	18	#define TEXTSTART 0x0000000000404000
	19
	20	#endif
	21
	22	#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
	23
	24	#ifdef CONFIG_SPARC32
1da177e4 LT	25	OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
	26	OUTPUT_ARCH(sparc)
	27	ENTRY(_start)
	28	jiffies = jiffies_64 + 4;
1b1fbbca SR	29	#else
	30	/* sparc64 */
	31	OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
	32	OUTPUT_ARCH(sparc:v9a)
	33	ENTRY(_start)
	34	jiffies = jiffies_64;
	35	#endif
	36
49fa5230 DM	37	#ifdef CONFIG_SPARC64
	38	ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
	39	#endif
	40
1da177e4 LT	41	SECTIONS
1da177e4 LT	42	{
d195b71b DM	43	#ifdef CONFIG_SPARC64
	44	swapper_pg_dir = 0x0000000000402000;
	45	#endif
1b1fbbca SR	46	. = INITIAL_ADDRESS;
1b1fbbca SR	47	.text TEXTSTART :
bcbe40eb SR	48	{
bcbe40eb SR	49	_text = .;
ce8a7424	50	HEAD_TEXT
0043ecea RX	51	ALIGN_FUNCTION();
	52	#ifdef CONFIG_SPARC64
	53	/* Match text section symbols in head_64.S first */
	54	*head_64.o(.text)
	55	#endif
bcbe40eb SR	56	TEXT_TEXT
	57	SCHED_TEXT
	58	LOCK_TEXT
1b1fbbca	59	KPROBES_TEXT
9960e9e8	60	IRQENTRY_TEXT
be7635e7	61	SOFTIRQENTRY_TEXT
bcbe40eb SR	62	*(.gnu.warning)
	63	} = 0
	64	_etext = .;
1b1fbbca SR	65
1b1fbbca SR	66	RO_DATA(PAGE_SIZE)
8b8d8e28 DM	67
	68	/* Start of data section */
	69	_sdata = .;
	70
bcbe40eb SR	71	.data1 : {
	72	*(.data1)
	73	}
c9174047	74	RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZE)
3240a77b	75
b74e34db	76	/* End of data section */
bcbe40eb	77	_edata = .;
b74e34db	78
bcbe40eb SR	79	.fixup : {
	80	__start___fixup = .;
	81	*(.fixup)
	82	__stop___fixup = .;
	83	}
3240a77b	84	EXCEPTION_TABLE(16)
bcbe40eb SR	85
bcbe40eb SR	86	. = ALIGN(PAGE_SIZE);
3240a77b GT	87	__init_begin = ALIGN(PAGE_SIZE);
3240a77b GT	88	INIT_TEXT_SECTION(PAGE_SIZE)
bcbe40eb	89	__init_text_end = .;
3240a77b	90	INIT_DATA_SECTION(16)
67d38229	91
1b1fbbca SR	92	. = ALIGN(4);
	93	.tsb_ldquad_phys_patch : {
	94	__tsb_ldquad_phys_patch = .;
	95	*(.tsb_ldquad_phys_patch)
	96	__tsb_ldquad_phys_patch_end = .;
	97	}
	98
	99	.tsb_phys_patch : {
	100	__tsb_phys_patch = .;
	101	*(.tsb_phys_patch)
	102	__tsb_phys_patch_end = .;
	103	}
	104
	105	.cpuid_patch : {
	106	__cpuid_patch = .;
	107	*(.cpuid_patch)
	108	__cpuid_patch_end = .;
	109	}
	110
	111	.sun4v_1insn_patch : {
	112	__sun4v_1insn_patch = .;
	113	*(.sun4v_1insn_patch)
	114	__sun4v_1insn_patch_end = .;
	115	}
	116	.sun4v_2insn_patch : {
	117	__sun4v_2insn_patch = .;
	118	*(.sun4v_2insn_patch)
	119	__sun4v_2insn_patch_end = .;
	120	}
5b8b93c4 SR	121	.leon_1insn_patch : {
	122	__leon_1insn_patch = .;
	123	*(.leon_1insn_patch)
	124	__leon_1insn_patch_end = .;
	125	}
9076d0e7 DM	126	.swapper_tsb_phys_patch : {
	127	__swapper_tsb_phys_patch = .;
	128	*(.swapper_tsb_phys_patch)
	129	__swapper_tsb_phys_patch_end = .;
	130	}
	131	.swapper_4m_tsb_phys_patch : {
	132	__swapper_4m_tsb_phys_patch = .;
	133	*(.swapper_4m_tsb_phys_patch)
	134	__swapper_4m_tsb_phys_patch_end = .;
	135	}
ef7c4d46 DM	136	.popc_3insn_patch : {
	137	__popc_3insn_patch = .;
	138	*(.popc_3insn_patch)
	139	__popc_3insn_patch_end = .;
	140	}
56d205cc DM	141	.popc_6insn_patch : {
	142	__popc_6insn_patch = .;
	143	*(.popc_6insn_patch)
	144	__popc_6insn_patch_end = .;
	145	}
187818cd DM	146	.pause_3insn_patch : {
	147	__pause_3insn_patch = .;
	148	*(.pause_3insn_patch)
	149	__pause_3insn_patch_end = .;
e9b9eb59	150	}
74a04967 KA	151	.sun_m7_1insn_patch : {
	152	__sun_m7_1insn_patch = .;
	153	*(.sun_m7_1insn_patch)
	154	__sun_m7_1insn_patch_end = .;
	155	}
494e5b6f KA	156	.sun_m7_2insn_patch : {
	157	__sun_m7_2insn_patch = .;
	158	*(.sun_m7_2insn_patch)
	159	__sun_m7_2insn_patch_end = .;
	160	}
4929c83a PT	161	.get_tick_patch : {
	162	__get_tick_patch = .;
	163	*(.get_tick_patch)
	164	__get_tick_patch_end = .;
	165	}
df7b2155 NG	166	.pud_huge_patch : {
	167	__pud_huge_patch = .;
	168	*(.pud_huge_patch)
	169	__pud_huge_patch_end = .;
	170	}
a7159a87 AY	171	.fast_win_ctrl_1insn_patch : {
	172	__fast_win_ctrl_1insn_patch = .;
	173	*(.fast_win_ctrl_1insn_patch)
	174	__fast_win_ctrl_1insn_patch_end = .;
	175	}
0415b00d	176	PERCPU_SECTION(SMP_CACHE_BYTES)
1b1fbbca	177
10d7227b JB	178	. = ALIGN(PAGE_SIZE);
	179	.exit.text : {
	180	EXIT_TEXT
	181	}
548f0b9a DM	182
	183	.exit.data : {
	184	EXIT_DATA
	185	}
10d7227b	186
bcbe40eb SR	187	. = ALIGN(PAGE_SIZE);
bcbe40eb SR	188	__init_end = .;
3240a77b	189	BSS_SECTION(0, 0, 0)
bcbe40eb	190	_end = . ;
1b1fbbca	191
bcbe40eb SR	192	STABS_DEBUG
bcbe40eb SR	193	DWARF_DEBUG
c604abc3	194	ELF_DETAILS
023bf6f1 TH	195
023bf6f1 TH	196	DISCARDS
1da177e4	197	}