projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 1b1fbbca | 2 | /* ld script for sparc32/sparc64 kernel */ |
| 1da177e4 LT |
3 | |
| 4 | #include <asm-generic/vmlinux.lds.h> | |
| b74e34db | 5 | |
| bcbe40eb | 6 | #include <asm/page.h> |
| b74e34db | 7 | #include <asm/thread_info.h> |
| 1da177e4 | 8 | |
| 1b1fbbca SR |
9 | #ifdef CONFIG_SPARC32 |
| 10 | #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS | |
| 11 | #define TEXTSTART 0xf0004000 | |
| 12 | ||
| 13 | #define SMP_CACHE_BYTES_SHIFT 5 | |
| 14 | ||
| 15 | #else | |
| 16 | #define SMP_CACHE_BYTES_SHIFT 6 | |
| 17 | #define INITIAL_ADDRESS 0x4000 | |
| 18 | #define TEXTSTART 0x0000000000404000 | |
| 19 | ||
| 20 | #endif | |
| 21 | ||
| 22 | #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) | |
| 23 | ||
| 24 | #ifdef CONFIG_SPARC32 | |
| 1da177e4 LT |
25 | OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") |
| 26 | OUTPUT_ARCH(sparc) | |
| 27 | ENTRY(_start) | |
| 28 | jiffies = jiffies_64 + 4; | |
| 1b1fbbca SR |
29 | #else |
| 30 | /* sparc64 */ | |
| 31 | OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") | |
| 32 | OUTPUT_ARCH(sparc:v9a) | |
| 33 | ENTRY(_start) | |
| 34 | jiffies = jiffies_64; | |
| 35 | #endif | |
| 36 | ||
| 49fa5230 DM |
37 | #ifdef CONFIG_SPARC64 |
| 38 | ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large") | |
| 39 | #endif | |
| 40 | ||
| 1da177e4 LT |
41 | SECTIONS |
| 42 | { | |
| d195b71b DM |
43 | #ifdef CONFIG_SPARC64 |
| 44 | swapper_pg_dir = 0x0000000000402000; | |
| 45 | #endif | |
| 1b1fbbca SR |
46 | . = INITIAL_ADDRESS; |
| 47 | .text TEXTSTART : | |
| bcbe40eb SR |
48 | { |
| 49 | _text = .; | |
| ce8a7424 | 50 | HEAD_TEXT |
| bcbe40eb SR |
51 | TEXT_TEXT |
| 52 | SCHED_TEXT | |
| 6727ad9e | 53 | CPUIDLE_TEXT |
| bcbe40eb | 54 | LOCK_TEXT |
| 1b1fbbca | 55 | KPROBES_TEXT |
| 9960e9e8 | 56 | IRQENTRY_TEXT |
| be7635e7 | 57 | SOFTIRQENTRY_TEXT |
| bcbe40eb SR |
58 | *(.gnu.warning) |
| 59 | } = 0 | |
| 60 | _etext = .; | |
| 1b1fbbca SR |
61 | |
| 62 | RO_DATA(PAGE_SIZE) | |
| 8b8d8e28 DM |
63 | |
| 64 | /* Start of data section */ | |
| 65 | _sdata = .; | |
| 66 | ||
| bcbe40eb SR |
67 | .data1 : { |
| 68 | *(.data1) | |
| 69 | } | |
| 3240a77b GT |
70 | RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE) |
| 71 | ||
| b74e34db | 72 | /* End of data section */ |
| bcbe40eb | 73 | _edata = .; |
| b74e34db | 74 | |
| bcbe40eb SR |
75 | .fixup : { |
| 76 | __start___fixup = .; | |
| 77 | *(.fixup) | |
| 78 | __stop___fixup = .; | |
| 79 | } | |
| 3240a77b | 80 | EXCEPTION_TABLE(16) |
| bcbe40eb SR |
81 | NOTES |
| 82 | ||
| 83 | . = ALIGN(PAGE_SIZE); | |
| 3240a77b GT |
84 | __init_begin = ALIGN(PAGE_SIZE); |
| 85 | INIT_TEXT_SECTION(PAGE_SIZE) | |
| bcbe40eb | 86 | __init_text_end = .; |
| 3240a77b | 87 | INIT_DATA_SECTION(16) |
| 67d38229 | 88 | |
| 1b1fbbca SR |
89 | . = ALIGN(4); |
| 90 | .tsb_ldquad_phys_patch : { | |
| 91 | __tsb_ldquad_phys_patch = .; | |
| 92 | *(.tsb_ldquad_phys_patch) | |
| 93 | __tsb_ldquad_phys_patch_end = .; | |
| 94 | } | |
| 95 | ||
| 96 | .tsb_phys_patch : { | |
| 97 | __tsb_phys_patch = .; | |
| 98 | *(.tsb_phys_patch) | |
| 99 | __tsb_phys_patch_end = .; | |
| 100 | } | |
| 101 | ||
| 102 | .cpuid_patch : { | |
| 103 | __cpuid_patch = .; | |
| 104 | *(.cpuid_patch) | |
| 105 | __cpuid_patch_end = .; | |
| 106 | } | |
| 107 | ||
| 108 | .sun4v_1insn_patch : { | |
| 109 | __sun4v_1insn_patch = .; | |
| 110 | *(.sun4v_1insn_patch) | |
| 111 | __sun4v_1insn_patch_end = .; | |
| 112 | } | |
| 113 | .sun4v_2insn_patch : { | |
| 114 | __sun4v_2insn_patch = .; | |
| 115 | *(.sun4v_2insn_patch) | |
| 116 | __sun4v_2insn_patch_end = .; | |
| 117 | } | |
| 5b8b93c4 SR |
118 | .leon_1insn_patch : { |
| 119 | __leon_1insn_patch = .; | |
| 120 | *(.leon_1insn_patch) | |
| 121 | __leon_1insn_patch_end = .; | |
| 122 | } | |
| 9076d0e7 DM |
123 | .swapper_tsb_phys_patch : { |
| 124 | __swapper_tsb_phys_patch = .; | |
| 125 | *(.swapper_tsb_phys_patch) | |
| 126 | __swapper_tsb_phys_patch_end = .; | |
| 127 | } | |
| 128 | .swapper_4m_tsb_phys_patch : { | |
| 129 | __swapper_4m_tsb_phys_patch = .; | |
| 130 | *(.swapper_4m_tsb_phys_patch) | |
| 131 | __swapper_4m_tsb_phys_patch_end = .; | |
| 132 | } | |
| ef7c4d46 DM |
133 | .popc_3insn_patch : { |
| 134 | __popc_3insn_patch = .; | |
| 135 | *(.popc_3insn_patch) | |
| 136 | __popc_3insn_patch_end = .; | |
| 137 | } | |
| 56d205cc DM |
138 | .popc_6insn_patch : { |
| 139 | __popc_6insn_patch = .; | |
| 140 | *(.popc_6insn_patch) | |
| 141 | __popc_6insn_patch_end = .; | |
| 142 | } | |
| 187818cd DM |
143 | .pause_3insn_patch : { |
| 144 | __pause_3insn_patch = .; | |
| 145 | *(.pause_3insn_patch) | |
| 146 | __pause_3insn_patch_end = .; | |
| e9b9eb59 | 147 | } |
| 494e5b6f KA |
148 | .sun_m7_2insn_patch : { |
| 149 | __sun_m7_2insn_patch = .; | |
| 150 | *(.sun_m7_2insn_patch) | |
| 151 | __sun_m7_2insn_patch_end = .; | |
| 152 | } | |
| 4929c83a PT |
153 | .get_tick_patch : { |
| 154 | __get_tick_patch = .; | |
| 155 | *(.get_tick_patch) | |
| 156 | __get_tick_patch_end = .; | |
| 157 | } | |
| df7b2155 NG |
158 | .pud_huge_patch : { |
| 159 | __pud_huge_patch = .; | |
| 160 | *(.pud_huge_patch) | |
| 161 | __pud_huge_patch_end = .; | |
| 162 | } | |
| a7159a87 AY |
163 | .fast_win_ctrl_1insn_patch : { |
| 164 | __fast_win_ctrl_1insn_patch = .; | |
| 165 | *(.fast_win_ctrl_1insn_patch) | |
| 166 | __fast_win_ctrl_1insn_patch_end = .; | |
| 167 | } | |
| 0415b00d | 168 | PERCPU_SECTION(SMP_CACHE_BYTES) |
| 1b1fbbca | 169 | |
| 10d7227b JB |
170 | #ifdef CONFIG_JUMP_LABEL |
| 171 | . = ALIGN(PAGE_SIZE); | |
| 172 | .exit.text : { | |
| 173 | EXIT_TEXT | |
| 174 | } | |
| 175 | #endif | |
| 176 | ||
| bcbe40eb SR |
177 | . = ALIGN(PAGE_SIZE); |
| 178 | __init_end = .; | |
| 3240a77b | 179 | BSS_SECTION(0, 0, 0) |
| bcbe40eb | 180 | _end = . ; |
| 1b1fbbca | 181 | |
| bcbe40eb SR |
182 | STABS_DEBUG |
| 183 | DWARF_DEBUG | |
| 023bf6f1 TH |
184 | |
| 185 | DISCARDS | |
| 1da177e4 | 186 | } |