Commit | Line | Data |
---|---|---|
cf3d7c1e | 1 | /* time.c: UltraSparc timer and TOD clock support. |
1da177e4 | 2 | * |
cf3d7c1e | 3 | * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
4 | * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) |
5 | * | |
6 | * Based largely on code which is: | |
7 | * | |
8 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) | |
9 | */ | |
10 | ||
1da177e4 | 11 | #include <linux/errno.h> |
066bcaca | 12 | #include <linux/export.h> |
1da177e4 LT |
13 | #include <linux/sched.h> |
14 | #include <linux/kernel.h> | |
15 | #include <linux/param.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/mm.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/time.h> | |
20 | #include <linux/timex.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/ioport.h> | |
23 | #include <linux/mc146818rtc.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/profile.h> | |
26 | #include <linux/bcd.h> | |
27 | #include <linux/jiffies.h> | |
28 | #include <linux/cpufreq.h> | |
29 | #include <linux/percpu.h> | |
8ba706a9 | 30 | #include <linux/miscdevice.h> |
1518e7ed | 31 | #include <linux/rtc/m48t59.h> |
777a4475 | 32 | #include <linux/kernel_stat.h> |
112f4871 DM |
33 | #include <linux/clockchips.h> |
34 | #include <linux/clocksource.h> | |
764f2579 | 35 | #include <linux/of_device.h> |
1518e7ed | 36 | #include <linux/platform_device.h> |
9960e9e8 | 37 | #include <linux/ftrace.h> |
1da177e4 LT |
38 | |
39 | #include <asm/oplib.h> | |
1da177e4 | 40 | #include <asm/timer.h> |
82268da1 | 41 | #include <asm/irq.h> |
1da177e4 | 42 | #include <asm/io.h> |
ff0d2fc6 | 43 | #include <asm/prom.h> |
1da177e4 LT |
44 | #include <asm/starfire.h> |
45 | #include <asm/smp.h> | |
46 | #include <asm/sections.h> | |
47 | #include <asm/cpudata.h> | |
7c0f6ba6 | 48 | #include <linux/uaccess.h> |
63540ba3 | 49 | #include <asm/irq_regs.h> |
1da177e4 | 50 | |
cf3d7c1e DM |
51 | #include "entry.h" |
52 | ||
1da177e4 | 53 | DEFINE_SPINLOCK(rtc_lock); |
1da177e4 | 54 | |
1da177e4 | 55 | #define TICK_PRIV_BIT (1UL << 63) |
112f4871 | 56 | #define TICKCMP_IRQ_BIT (1UL << 63) |
1da177e4 LT |
57 | |
58 | #ifdef CONFIG_SMP | |
59 | unsigned long profile_pc(struct pt_regs *regs) | |
60 | { | |
61 | unsigned long pc = instruction_pointer(regs); | |
62 | ||
63 | if (in_lock_functions(pc)) | |
64 | return regs->u_regs[UREG_RETPC]; | |
65 | return pc; | |
66 | } | |
67 | EXPORT_SYMBOL(profile_pc); | |
68 | #endif | |
69 | ||
70 | static void tick_disable_protection(void) | |
71 | { | |
72 | /* Set things up so user can access tick register for profiling | |
73 | * purposes. Also workaround BB_ERRATA_1 by doing a dummy | |
74 | * read back of %tick after writing it. | |
75 | */ | |
76 | __asm__ __volatile__( | |
77 | " ba,pt %%xcc, 1f\n" | |
78 | " nop\n" | |
79 | " .align 64\n" | |
80 | "1: rd %%tick, %%g2\n" | |
81 | " add %%g2, 6, %%g2\n" | |
82 | " andn %%g2, %0, %%g2\n" | |
83 | " wrpr %%g2, 0, %%tick\n" | |
84 | " rdpr %%tick, %%g0" | |
85 | : /* no outputs */ | |
86 | : "r" (TICK_PRIV_BIT) | |
87 | : "g2"); | |
88 | } | |
89 | ||
112f4871 | 90 | static void tick_disable_irq(void) |
1da177e4 | 91 | { |
1da177e4 | 92 | __asm__ __volatile__( |
1da177e4 | 93 | " ba,pt %%xcc, 1f\n" |
112f4871 | 94 | " nop\n" |
1da177e4 | 95 | " .align 64\n" |
112f4871 | 96 | "1: wr %0, 0x0, %%tick_cmpr\n" |
1da177e4 LT |
97 | " rd %%tick_cmpr, %%g0" |
98 | : /* no outputs */ | |
112f4871 DM |
99 | : "r" (TICKCMP_IRQ_BIT)); |
100 | } | |
101 | ||
102 | static void tick_init_tick(void) | |
103 | { | |
104 | tick_disable_protection(); | |
105 | tick_disable_irq(); | |
1da177e4 LT |
106 | } |
107 | ||
90181136 | 108 | static unsigned long long tick_get_tick(void) |
1da177e4 LT |
109 | { |
110 | unsigned long ret; | |
111 | ||
112 | __asm__ __volatile__("rd %%tick, %0\n\t" | |
113 | "mov %0, %0" | |
114 | : "=r" (ret)); | |
115 | ||
116 | return ret & ~TICK_PRIV_BIT; | |
117 | } | |
118 | ||
112f4871 | 119 | static int tick_add_compare(unsigned long adj) |
1da177e4 | 120 | { |
112f4871 | 121 | unsigned long orig_tick, new_tick, new_compare; |
1da177e4 | 122 | |
112f4871 DM |
123 | __asm__ __volatile__("rd %%tick, %0" |
124 | : "=r" (orig_tick)); | |
1da177e4 | 125 | |
112f4871 | 126 | orig_tick &= ~TICKCMP_IRQ_BIT; |
1da177e4 LT |
127 | |
128 | /* Workaround for Spitfire Errata (#54 I think??), I discovered | |
129 | * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch | |
130 | * number 103640. | |
131 | * | |
132 | * On Blackbird writes to %tick_cmpr can fail, the | |
133 | * workaround seems to be to execute the wr instruction | |
134 | * at the start of an I-cache line, and perform a dummy | |
135 | * read back from %tick_cmpr right after writing to it. -DaveM | |
136 | */ | |
112f4871 DM |
137 | __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" |
138 | " add %1, %2, %0\n\t" | |
1da177e4 LT |
139 | ".align 64\n" |
140 | "1:\n\t" | |
141 | "wr %0, 0, %%tick_cmpr\n\t" | |
112f4871 DM |
142 | "rd %%tick_cmpr, %%g0\n\t" |
143 | : "=r" (new_compare) | |
144 | : "r" (orig_tick), "r" (adj)); | |
145 | ||
146 | __asm__ __volatile__("rd %%tick, %0" | |
147 | : "=r" (new_tick)); | |
148 | new_tick &= ~TICKCMP_IRQ_BIT; | |
1da177e4 | 149 | |
112f4871 | 150 | return ((long)(new_tick - (orig_tick+adj))) > 0L; |
1da177e4 LT |
151 | } |
152 | ||
112f4871 | 153 | static unsigned long tick_add_tick(unsigned long adj) |
1da177e4 | 154 | { |
112f4871 | 155 | unsigned long new_tick; |
1da177e4 LT |
156 | |
157 | /* Also need to handle Blackbird bug here too. */ | |
158 | __asm__ __volatile__("rd %%tick, %0\n\t" | |
112f4871 | 159 | "add %0, %1, %0\n\t" |
1da177e4 | 160 | "wrpr %0, 0, %%tick\n\t" |
112f4871 DM |
161 | : "=&r" (new_tick) |
162 | : "r" (adj)); | |
1da177e4 LT |
163 | |
164 | return new_tick; | |
165 | } | |
166 | ||
d369ddd2 | 167 | static struct sparc64_tick_ops tick_operations __read_mostly = { |
112f4871 | 168 | .name = "tick", |
1da177e4 | 169 | .init_tick = tick_init_tick, |
112f4871 | 170 | .disable_irq = tick_disable_irq, |
1da177e4 | 171 | .get_tick = tick_get_tick, |
1da177e4 LT |
172 | .add_tick = tick_add_tick, |
173 | .add_compare = tick_add_compare, | |
174 | .softint_mask = 1UL << 0, | |
175 | }; | |
176 | ||
fc321495 | 177 | struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations; |
917c3660 | 178 | EXPORT_SYMBOL(tick_ops); |
fc321495 | 179 | |
112f4871 DM |
180 | static void stick_disable_irq(void) |
181 | { | |
182 | __asm__ __volatile__( | |
183 | "wr %0, 0x0, %%asr25" | |
184 | : /* no outputs */ | |
185 | : "r" (TICKCMP_IRQ_BIT)); | |
186 | } | |
187 | ||
188 | static void stick_init_tick(void) | |
1da177e4 | 189 | { |
7aa62645 DM |
190 | /* Writes to the %tick and %stick register are not |
191 | * allowed on sun4v. The Hypervisor controls that | |
192 | * bit, per-strand. | |
193 | */ | |
194 | if (tlb_type != hypervisor) { | |
195 | tick_disable_protection(); | |
112f4871 | 196 | tick_disable_irq(); |
7aa62645 DM |
197 | |
198 | /* Let the user get at STICK too. */ | |
199 | __asm__ __volatile__( | |
200 | " rd %%asr24, %%g2\n" | |
201 | " andn %%g2, %0, %%g2\n" | |
202 | " wr %%g2, 0, %%asr24" | |
203 | : /* no outputs */ | |
204 | : "r" (TICK_PRIV_BIT) | |
205 | : "g1", "g2"); | |
206 | } | |
1da177e4 | 207 | |
112f4871 | 208 | stick_disable_irq(); |
1da177e4 LT |
209 | } |
210 | ||
90181136 | 211 | static unsigned long long stick_get_tick(void) |
1da177e4 LT |
212 | { |
213 | unsigned long ret; | |
214 | ||
215 | __asm__ __volatile__("rd %%asr24, %0" | |
216 | : "=r" (ret)); | |
217 | ||
218 | return ret & ~TICK_PRIV_BIT; | |
219 | } | |
220 | ||
112f4871 | 221 | static unsigned long stick_add_tick(unsigned long adj) |
1da177e4 | 222 | { |
112f4871 | 223 | unsigned long new_tick; |
1da177e4 LT |
224 | |
225 | __asm__ __volatile__("rd %%asr24, %0\n\t" | |
112f4871 | 226 | "add %0, %1, %0\n\t" |
1da177e4 | 227 | "wr %0, 0, %%asr24\n\t" |
112f4871 DM |
228 | : "=&r" (new_tick) |
229 | : "r" (adj)); | |
1da177e4 LT |
230 | |
231 | return new_tick; | |
232 | } | |
233 | ||
112f4871 | 234 | static int stick_add_compare(unsigned long adj) |
1da177e4 | 235 | { |
112f4871 | 236 | unsigned long orig_tick, new_tick; |
1da177e4 | 237 | |
112f4871 DM |
238 | __asm__ __volatile__("rd %%asr24, %0" |
239 | : "=r" (orig_tick)); | |
240 | orig_tick &= ~TICKCMP_IRQ_BIT; | |
241 | ||
242 | __asm__ __volatile__("wr %0, 0, %%asr25" | |
243 | : /* no outputs */ | |
244 | : "r" (orig_tick + adj)); | |
245 | ||
246 | __asm__ __volatile__("rd %%asr24, %0" | |
247 | : "=r" (new_tick)); | |
248 | new_tick &= ~TICKCMP_IRQ_BIT; | |
1da177e4 | 249 | |
112f4871 | 250 | return ((long)(new_tick - (orig_tick+adj))) > 0L; |
1da177e4 LT |
251 | } |
252 | ||
d369ddd2 | 253 | static struct sparc64_tick_ops stick_operations __read_mostly = { |
112f4871 | 254 | .name = "stick", |
1da177e4 | 255 | .init_tick = stick_init_tick, |
112f4871 | 256 | .disable_irq = stick_disable_irq, |
1da177e4 | 257 | .get_tick = stick_get_tick, |
1da177e4 LT |
258 | .add_tick = stick_add_tick, |
259 | .add_compare = stick_add_compare, | |
260 | .softint_mask = 1UL << 16, | |
261 | }; | |
262 | ||
263 | /* On Hummingbird the STICK/STICK_CMPR register is implemented | |
264 | * in I/O space. There are two 64-bit registers each, the | |
265 | * first holds the low 32-bits of the value and the second holds | |
266 | * the high 32-bits. | |
267 | * | |
268 | * Since STICK is constantly updating, we have to access it carefully. | |
269 | * | |
270 | * The sequence we use to read is: | |
9eb3394b RM |
271 | * 1) read high |
272 | * 2) read low | |
273 | * 3) read high again, if it rolled re-read both low and high again. | |
1da177e4 LT |
274 | * |
275 | * Writing STICK safely is also tricky: | |
276 | * 1) write low to zero | |
277 | * 2) write high | |
278 | * 3) write low | |
279 | */ | |
280 | #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL | |
281 | #define HBIRD_STICK_ADDR 0x1fe0000f070UL | |
282 | ||
283 | static unsigned long __hbird_read_stick(void) | |
284 | { | |
285 | unsigned long ret, tmp1, tmp2, tmp3; | |
9eb3394b | 286 | unsigned long addr = HBIRD_STICK_ADDR+8; |
1da177e4 | 287 | |
9eb3394b RM |
288 | __asm__ __volatile__("ldxa [%1] %5, %2\n" |
289 | "1:\n\t" | |
1da177e4 | 290 | "sub %1, 0x8, %1\n\t" |
9eb3394b RM |
291 | "ldxa [%1] %5, %3\n\t" |
292 | "add %1, 0x8, %1\n\t" | |
1da177e4 LT |
293 | "ldxa [%1] %5, %4\n\t" |
294 | "cmp %4, %2\n\t" | |
9eb3394b RM |
295 | "bne,a,pn %%xcc, 1b\n\t" |
296 | " mov %4, %2\n\t" | |
297 | "sllx %4, 32, %4\n\t" | |
1da177e4 LT |
298 | "or %3, %4, %0\n\t" |
299 | : "=&r" (ret), "=&r" (addr), | |
300 | "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3) | |
301 | : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr)); | |
302 | ||
303 | return ret; | |
304 | } | |
305 | ||
1da177e4 LT |
306 | static void __hbird_write_stick(unsigned long val) |
307 | { | |
308 | unsigned long low = (val & 0xffffffffUL); | |
309 | unsigned long high = (val >> 32UL); | |
310 | unsigned long addr = HBIRD_STICK_ADDR; | |
311 | ||
312 | __asm__ __volatile__("stxa %%g0, [%0] %4\n\t" | |
313 | "add %0, 0x8, %0\n\t" | |
314 | "stxa %3, [%0] %4\n\t" | |
315 | "sub %0, 0x8, %0\n\t" | |
316 | "stxa %2, [%0] %4" | |
317 | : "=&r" (addr) | |
318 | : "0" (addr), "r" (low), "r" (high), | |
319 | "i" (ASI_PHYS_BYPASS_EC_E)); | |
320 | } | |
321 | ||
322 | static void __hbird_write_compare(unsigned long val) | |
323 | { | |
324 | unsigned long low = (val & 0xffffffffUL); | |
325 | unsigned long high = (val >> 32UL); | |
326 | unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL; | |
327 | ||
328 | __asm__ __volatile__("stxa %3, [%0] %4\n\t" | |
329 | "sub %0, 0x8, %0\n\t" | |
330 | "stxa %2, [%0] %4" | |
331 | : "=&r" (addr) | |
332 | : "0" (addr), "r" (low), "r" (high), | |
333 | "i" (ASI_PHYS_BYPASS_EC_E)); | |
334 | } | |
335 | ||
112f4871 | 336 | static void hbtick_disable_irq(void) |
1da177e4 | 337 | { |
112f4871 DM |
338 | __hbird_write_compare(TICKCMP_IRQ_BIT); |
339 | } | |
1da177e4 | 340 | |
112f4871 DM |
341 | static void hbtick_init_tick(void) |
342 | { | |
1da177e4 LT |
343 | tick_disable_protection(); |
344 | ||
345 | /* XXX This seems to be necessary to 'jumpstart' Hummingbird | |
346 | * XXX into actually sending STICK interrupts. I think because | |
347 | * XXX of how we store %tick_cmpr in head.S this somehow resets the | |
348 | * XXX {TICK + STICK} interrupt mux. -DaveM | |
349 | */ | |
350 | __hbird_write_stick(__hbird_read_stick()); | |
351 | ||
112f4871 | 352 | hbtick_disable_irq(); |
1da177e4 LT |
353 | } |
354 | ||
90181136 | 355 | static unsigned long long hbtick_get_tick(void) |
1da177e4 LT |
356 | { |
357 | return __hbird_read_stick() & ~TICK_PRIV_BIT; | |
358 | } | |
359 | ||
112f4871 | 360 | static unsigned long hbtick_add_tick(unsigned long adj) |
1da177e4 LT |
361 | { |
362 | unsigned long val; | |
363 | ||
364 | val = __hbird_read_stick() + adj; | |
365 | __hbird_write_stick(val); | |
366 | ||
1da177e4 LT |
367 | return val; |
368 | } | |
369 | ||
112f4871 | 370 | static int hbtick_add_compare(unsigned long adj) |
1da177e4 | 371 | { |
112f4871 DM |
372 | unsigned long val = __hbird_read_stick(); |
373 | unsigned long val2; | |
1da177e4 | 374 | |
112f4871 DM |
375 | val &= ~TICKCMP_IRQ_BIT; |
376 | val += adj; | |
1da177e4 LT |
377 | __hbird_write_compare(val); |
378 | ||
112f4871 DM |
379 | val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT; |
380 | ||
381 | return ((long)(val2 - val)) > 0L; | |
1da177e4 LT |
382 | } |
383 | ||
d369ddd2 | 384 | static struct sparc64_tick_ops hbtick_operations __read_mostly = { |
112f4871 | 385 | .name = "hbtick", |
1da177e4 | 386 | .init_tick = hbtick_init_tick, |
112f4871 | 387 | .disable_irq = hbtick_disable_irq, |
1da177e4 | 388 | .get_tick = hbtick_get_tick, |
1da177e4 LT |
389 | .add_tick = hbtick_add_tick, |
390 | .add_compare = hbtick_add_compare, | |
391 | .softint_mask = 1UL << 0, | |
392 | }; | |
393 | ||
d369ddd2 | 394 | static unsigned long timer_ticks_per_nsec_quotient __read_mostly; |
1da177e4 | 395 | |
da86783d DM |
396 | unsigned long cmos_regs; |
397 | EXPORT_SYMBOL(cmos_regs); | |
690c8fd3 | 398 | |
d8ada0a2 | 399 | static struct resource rtc_cmos_resource; |
da86783d DM |
400 | |
401 | static struct platform_device rtc_cmos_device = { | |
402 | .name = "rtc_cmos", | |
403 | .id = -1, | |
404 | .resource = &rtc_cmos_resource, | |
405 | .num_resources = 1, | |
406 | }; | |
690c8fd3 | 407 | |
7c9503b8 | 408 | static int rtc_probe(struct platform_device *op) |
690c8fd3 | 409 | { |
da86783d | 410 | struct resource *r; |
690c8fd3 | 411 | |
90181136 | 412 | printk(KERN_INFO "%s: RTC regs at 0x%llx\n", |
61c7a080 | 413 | op->dev.of_node->full_name, op->resource[0].start); |
d037e053 | 414 | |
da86783d DM |
415 | /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons |
416 | * up a fake resource so that the probe works for all cases. | |
417 | * When the RTC is behind an ISA bus it will have IORESOURCE_IO | |
418 | * already, whereas when it's behind EBUS is will be IORESOURCE_MEM. | |
419 | */ | |
420 | ||
421 | r = &rtc_cmos_resource; | |
422 | r->flags = IORESOURCE_IO; | |
423 | r->name = op->resource[0].name; | |
424 | r->start = op->resource[0].start; | |
425 | r->end = op->resource[0].end; | |
426 | ||
427 | cmos_regs = op->resource[0].start; | |
428 | return platform_device_register(&rtc_cmos_device); | |
429 | } | |
430 | ||
3628aa06 | 431 | static const struct of_device_id rtc_match[] = { |
da86783d DM |
432 | { |
433 | .name = "rtc", | |
434 | .compatible = "m5819", | |
435 | }, | |
436 | { | |
437 | .name = "rtc", | |
438 | .compatible = "isa-m5819p", | |
439 | }, | |
440 | { | |
441 | .name = "rtc", | |
442 | .compatible = "isa-m5823p", | |
443 | }, | |
444 | { | |
445 | .name = "rtc", | |
446 | .compatible = "ds1287", | |
447 | }, | |
448 | {}, | |
449 | }; | |
450 | ||
4ebb24f7 | 451 | static struct platform_driver rtc_driver = { |
da86783d | 452 | .probe = rtc_probe, |
4018294b GL |
453 | .driver = { |
454 | .name = "rtc", | |
4018294b | 455 | .of_match_table = rtc_match, |
da86783d DM |
456 | }, |
457 | }; | |
91521485 | 458 | |
29b503f1 DM |
459 | static struct platform_device rtc_bq4802_device = { |
460 | .name = "rtc-bq4802", | |
461 | .id = -1, | |
462 | .num_resources = 1, | |
463 | }; | |
464 | ||
7c9503b8 | 465 | static int bq4802_probe(struct platform_device *op) |
da86783d | 466 | { |
690c8fd3 | 467 | |
90181136 | 468 | printk(KERN_INFO "%s: BQ4802 regs at 0x%llx\n", |
61c7a080 | 469 | op->dev.of_node->full_name, op->resource[0].start); |
690c8fd3 | 470 | |
29b503f1 DM |
471 | rtc_bq4802_device.resource = &op->resource[0]; |
472 | return platform_device_register(&rtc_bq4802_device); | |
690c8fd3 | 473 | } |
690c8fd3 | 474 | |
3628aa06 | 475 | static const struct of_device_id bq4802_match[] = { |
ee5caf0e | 476 | { |
1518e7ed | 477 | .name = "rtc", |
da86783d | 478 | .compatible = "bq4802", |
1518e7ed | 479 | }, |
770a4241 | 480 | {}, |
1518e7ed DM |
481 | }; |
482 | ||
4ebb24f7 | 483 | static struct platform_driver bq4802_driver = { |
da86783d | 484 | .probe = bq4802_probe, |
4018294b GL |
485 | .driver = { |
486 | .name = "bq4802", | |
4018294b | 487 | .of_match_table = bq4802_match, |
ee5caf0e | 488 | }, |
1518e7ed DM |
489 | }; |
490 | ||
491 | static unsigned char mostek_read_byte(struct device *dev, u32 ofs) | |
492 | { | |
493 | struct platform_device *pdev = to_platform_device(dev); | |
12a9ee3c KH |
494 | void __iomem *regs = (void __iomem *) pdev->resource[0].start; |
495 | ||
496 | return readb(regs + ofs); | |
1518e7ed DM |
497 | } |
498 | ||
499 | static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) | |
500 | { | |
501 | struct platform_device *pdev = to_platform_device(dev); | |
12a9ee3c KH |
502 | void __iomem *regs = (void __iomem *) pdev->resource[0].start; |
503 | ||
1518e7ed DM |
504 | writeb(val, regs + ofs); |
505 | } | |
506 | ||
507 | static struct m48t59_plat_data m48t59_data = { | |
508 | .read_byte = mostek_read_byte, | |
509 | .write_byte = mostek_write_byte, | |
510 | }; | |
511 | ||
512 | static struct platform_device m48t59_rtc = { | |
513 | .name = "rtc-m48t59", | |
514 | .id = 0, | |
515 | .num_resources = 1, | |
516 | .dev = { | |
517 | .platform_data = &m48t59_data, | |
518 | }, | |
519 | }; | |
520 | ||
7c9503b8 | 521 | static int mostek_probe(struct platform_device *op) |
1518e7ed | 522 | { |
61c7a080 | 523 | struct device_node *dp = op->dev.of_node; |
1518e7ed DM |
524 | |
525 | /* On an Enterprise system there can be multiple mostek clocks. | |
526 | * We should only match the one that is on the central FHC bus. | |
527 | */ | |
528 | if (!strcmp(dp->parent->name, "fhc") && | |
529 | strcmp(dp->parent->parent->name, "central") != 0) | |
530 | return -ENODEV; | |
531 | ||
90181136 | 532 | printk(KERN_INFO "%s: Mostek regs at 0x%llx\n", |
1518e7ed DM |
533 | dp->full_name, op->resource[0].start); |
534 | ||
535 | m48t59_rtc.resource = &op->resource[0]; | |
536 | return platform_device_register(&m48t59_rtc); | |
537 | } | |
538 | ||
3628aa06 | 539 | static const struct of_device_id mostek_match[] = { |
ee5caf0e | 540 | { |
1518e7ed | 541 | .name = "eeprom", |
ee5caf0e DM |
542 | }, |
543 | {}, | |
544 | }; | |
690c8fd3 | 545 | |
4ebb24f7 | 546 | static struct platform_driver mostek_driver = { |
1518e7ed | 547 | .probe = mostek_probe, |
4018294b GL |
548 | .driver = { |
549 | .name = "mostek", | |
4018294b | 550 | .of_match_table = mostek_match, |
a2cd1558 | 551 | }, |
ee5caf0e | 552 | }; |
690c8fd3 | 553 | |
84d6bd5e DM |
554 | static struct platform_device rtc_sun4v_device = { |
555 | .name = "rtc-sun4v", | |
556 | .id = -1, | |
557 | }; | |
558 | ||
f2be6de8 DM |
559 | static struct platform_device rtc_starfire_device = { |
560 | .name = "rtc-starfire", | |
561 | .id = -1, | |
562 | }; | |
563 | ||
ee5caf0e | 564 | static int __init clock_init(void) |
690c8fd3 | 565 | { |
f2be6de8 DM |
566 | if (this_is_starfire) |
567 | return platform_device_register(&rtc_starfire_device); | |
568 | ||
84d6bd5e DM |
569 | if (tlb_type == hypervisor) |
570 | return platform_device_register(&rtc_sun4v_device); | |
1da177e4 | 571 | |
4ebb24f7 GL |
572 | (void) platform_driver_register(&rtc_driver); |
573 | (void) platform_driver_register(&mostek_driver); | |
574 | (void) platform_driver_register(&bq4802_driver); | |
1518e7ed DM |
575 | |
576 | return 0; | |
1da177e4 LT |
577 | } |
578 | ||
ee5caf0e DM |
579 | /* Must be after subsys_initcall() so that busses are probed. Must |
580 | * be before device_initcall() because things like the RTC driver | |
581 | * need to see the clock registers. | |
582 | */ | |
583 | fs_initcall(clock_init); | |
584 | ||
1da177e4 LT |
585 | /* This is gets the master TICK_INT timer going. */ |
586 | static unsigned long sparc64_init_timers(void) | |
587 | { | |
07f8e5f3 | 588 | struct device_node *dp; |
d8ada0a2 | 589 | unsigned long freq; |
1da177e4 | 590 | |
07f8e5f3 | 591 | dp = of_find_node_by_path("/"); |
1da177e4 LT |
592 | if (tlb_type == spitfire) { |
593 | unsigned long ver, manuf, impl; | |
594 | ||
595 | __asm__ __volatile__ ("rdpr %%ver, %0" | |
596 | : "=&r" (ver)); | |
597 | manuf = ((ver >> 48) & 0xffff); | |
598 | impl = ((ver >> 32) & 0xffff); | |
599 | if (manuf == 0x17 && impl == 0x13) { | |
600 | /* Hummingbird, aka Ultra-IIe */ | |
601 | tick_ops = &hbtick_operations; | |
d8ada0a2 | 602 | freq = of_getintprop_default(dp, "stick-frequency", 0); |
1da177e4 LT |
603 | } else { |
604 | tick_ops = &tick_operations; | |
d8ada0a2 | 605 | freq = local_cpu_data().clock_tick; |
1da177e4 LT |
606 | } |
607 | } else { | |
608 | tick_ops = &stick_operations; | |
d8ada0a2 | 609 | freq = of_getintprop_default(dp, "stick-frequency", 0); |
1da177e4 | 610 | } |
1da177e4 | 611 | |
d8ada0a2 | 612 | return freq; |
1da177e4 LT |
613 | } |
614 | ||
1da177e4 | 615 | struct freq_table { |
1da177e4 LT |
616 | unsigned long clock_tick_ref; |
617 | unsigned int ref_freq; | |
618 | }; | |
3763be32 | 619 | static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 }; |
1da177e4 LT |
620 | |
621 | unsigned long sparc64_get_clock_tick(unsigned int cpu) | |
622 | { | |
623 | struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); | |
624 | ||
625 | if (ft->clock_tick_ref) | |
626 | return ft->clock_tick_ref; | |
627 | return cpu_data(cpu).clock_tick; | |
628 | } | |
917c3660 | 629 | EXPORT_SYMBOL(sparc64_get_clock_tick); |
1da177e4 LT |
630 | |
631 | #ifdef CONFIG_CPU_FREQ | |
632 | ||
633 | static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val, | |
634 | void *data) | |
635 | { | |
636 | struct cpufreq_freqs *freq = data; | |
637 | unsigned int cpu = freq->cpu; | |
638 | struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); | |
639 | ||
640 | if (!ft->ref_freq) { | |
641 | ft->ref_freq = freq->old; | |
1da177e4 LT |
642 | ft->clock_tick_ref = cpu_data(cpu).clock_tick; |
643 | } | |
644 | if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || | |
0b443ead | 645 | (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) { |
1da177e4 LT |
646 | cpu_data(cpu).clock_tick = |
647 | cpufreq_scale(ft->clock_tick_ref, | |
648 | ft->ref_freq, | |
649 | freq->new); | |
650 | } | |
651 | ||
652 | return 0; | |
653 | } | |
654 | ||
655 | static struct notifier_block sparc64_cpufreq_notifier_block = { | |
656 | .notifier_call = sparc64_cpufreq_notifier | |
657 | }; | |
658 | ||
7ae93f51 DM |
659 | static int __init register_sparc64_cpufreq_notifier(void) |
660 | { | |
661 | ||
662 | cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, | |
663 | CPUFREQ_TRANSITION_NOTIFIER); | |
664 | return 0; | |
665 | } | |
666 | ||
667 | core_initcall(register_sparc64_cpufreq_notifier); | |
668 | ||
1da177e4 LT |
669 | #endif /* CONFIG_CPU_FREQ */ |
670 | ||
112f4871 DM |
671 | static int sparc64_next_event(unsigned long delta, |
672 | struct clock_event_device *evt) | |
673 | { | |
d62c6f09 | 674 | return tick_ops->add_compare(delta) ? -ETIME : 0; |
112f4871 DM |
675 | } |
676 | ||
ff4aea45 VK |
677 | static int sparc64_timer_shutdown(struct clock_event_device *evt) |
678 | { | |
679 | tick_ops->disable_irq(); | |
680 | return 0; | |
112f4871 DM |
681 | } |
682 | ||
683 | static struct clock_event_device sparc64_clockevent = { | |
ff4aea45 VK |
684 | .features = CLOCK_EVT_FEAT_ONESHOT, |
685 | .set_state_shutdown = sparc64_timer_shutdown, | |
686 | .set_next_event = sparc64_next_event, | |
687 | .rating = 100, | |
688 | .shift = 30, | |
689 | .irq = -1, | |
1da177e4 | 690 | }; |
112f4871 | 691 | static DEFINE_PER_CPU(struct clock_event_device, sparc64_events); |
1da177e4 | 692 | |
9960e9e8 | 693 | void __irq_entry timer_interrupt(int irq, struct pt_regs *regs) |
1da177e4 | 694 | { |
112f4871 DM |
695 | struct pt_regs *old_regs = set_irq_regs(regs); |
696 | unsigned long tick_mask = tick_ops->softint_mask; | |
697 | int cpu = smp_processor_id(); | |
698 | struct clock_event_device *evt = &per_cpu(sparc64_events, cpu); | |
699 | ||
700 | clear_softint(tick_mask); | |
701 | ||
702 | irq_enter(); | |
703 | ||
daecbf58 | 704 | local_cpu_data().irq0_irqs++; |
87a69ad6 | 705 | kstat_incr_irq_this_cpu(0); |
112f4871 DM |
706 | |
707 | if (unlikely(!evt->event_handler)) { | |
708 | printk(KERN_WARNING | |
709 | "Spurious SPARC64 timer interrupt on cpu %d\n", cpu); | |
710 | } else | |
711 | evt->event_handler(evt); | |
712 | ||
713 | irq_exit(); | |
714 | ||
715 | set_irq_regs(old_regs); | |
716 | } | |
1da177e4 | 717 | |
7c9503b8 | 718 | void setup_sparc64_timer(void) |
112f4871 DM |
719 | { |
720 | struct clock_event_device *sevt; | |
721 | unsigned long pstate; | |
1da177e4 | 722 | |
112f4871 DM |
723 | /* Guarantee that the following sequences execute |
724 | * uninterrupted. | |
1da177e4 | 725 | */ |
112f4871 DM |
726 | __asm__ __volatile__("rdpr %%pstate, %0\n\t" |
727 | "wrpr %0, %1, %%pstate" | |
728 | : "=r" (pstate) | |
729 | : "i" (PSTATE_IE)); | |
730 | ||
731 | tick_ops->init_tick(); | |
732 | ||
733 | /* Restore PSTATE_IE. */ | |
734 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" | |
735 | : /* no outputs */ | |
736 | : "r" (pstate)); | |
737 | ||
494fc421 | 738 | sevt = this_cpu_ptr(&sparc64_events); |
112f4871 DM |
739 | |
740 | memcpy(sevt, &sparc64_clockevent, sizeof(*sevt)); | |
320ab2b0 | 741 | sevt->cpumask = cpumask_of(smp_processor_id()); |
112f4871 DM |
742 | |
743 | clockevents_register_device(sevt); | |
744 | } | |
745 | ||
03983ab8 | 746 | #define SPARC64_NSEC_PER_CYC_SHIFT 10UL |
112f4871 DM |
747 | |
748 | static struct clocksource clocksource_tick = { | |
749 | .rating = 100, | |
750 | .mask = CLOCKSOURCE_MASK(64), | |
112f4871 DM |
751 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
752 | }; | |
753 | ||
8b99cfb8 DM |
754 | static unsigned long tb_ticks_per_usec __read_mostly; |
755 | ||
756 | void __delay(unsigned long loops) | |
757 | { | |
758 | unsigned long bclock, now; | |
759 | ||
760 | bclock = tick_ops->get_tick(); | |
761 | do { | |
762 | now = tick_ops->get_tick(); | |
763 | } while ((now-bclock) < loops); | |
764 | } | |
765 | EXPORT_SYMBOL(__delay); | |
766 | ||
767 | void udelay(unsigned long usecs) | |
768 | { | |
769 | __delay(tb_ticks_per_usec * usecs); | |
770 | } | |
771 | EXPORT_SYMBOL(udelay); | |
772 | ||
a5a1d1c2 | 773 | static u64 clocksource_tick_read(struct clocksource *cs) |
8e19608e MD |
774 | { |
775 | return tick_ops->get_tick(); | |
776 | } | |
777 | ||
112f4871 DM |
778 | void __init time_init(void) |
779 | { | |
d8ada0a2 | 780 | unsigned long freq = sparc64_init_timers(); |
1da177e4 | 781 | |
d8ada0a2 | 782 | tb_ticks_per_usec = freq / USEC_PER_SEC; |
8b99cfb8 | 783 | |
1da177e4 | 784 | timer_ticks_per_nsec_quotient = |
d8ada0a2 | 785 | clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT); |
112f4871 DM |
786 | |
787 | clocksource_tick.name = tick_ops->name; | |
8e19608e | 788 | clocksource_tick.read = clocksource_tick_read; |
112f4871 | 789 | |
81043e81 | 790 | clocksource_register_hz(&clocksource_tick, freq); |
112f4871 DM |
791 | printk("clocksource: mult[%x] shift[%d]\n", |
792 | clocksource_tick.mult, clocksource_tick.shift); | |
793 | ||
112f4871 | 794 | sparc64_clockevent.name = tick_ops->name; |
6865b7f9 | 795 | clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4); |
112f4871 DM |
796 | |
797 | sparc64_clockevent.max_delta_ns = | |
cf3d7c1e | 798 | clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent); |
112f4871 DM |
799 | sparc64_clockevent.min_delta_ns = |
800 | clockevent_delta2ns(0xF, &sparc64_clockevent); | |
801 | ||
7466bd3c | 802 | printk("clockevent: mult[%x] shift[%d]\n", |
112f4871 DM |
803 | sparc64_clockevent.mult, sparc64_clockevent.shift); |
804 | ||
805 | setup_sparc64_timer(); | |
1da177e4 LT |
806 | } |
807 | ||
808 | unsigned long long sched_clock(void) | |
809 | { | |
810 | unsigned long ticks = tick_ops->get_tick(); | |
811 | ||
812 | return (ticks * timer_ticks_per_nsec_quotient) | |
813 | >> SPARC64_NSEC_PER_CYC_SHIFT; | |
814 | } | |
815 | ||
7c9503b8 | 816 | int read_current_timer(unsigned long *timer_val) |
941e492b AM |
817 | { |
818 | *timer_val = tick_ops->get_tick(); | |
819 | return 0; | |
820 | } |