Commit | Line | Data |
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64d329ee | 1 | /* linux/arch/sparc/kernel/time.c |
1da177e4 | 2 | * |
64d329ee | 3 | * Copyright (C) 1995 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
4 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) |
5 | * | |
6 | * Chris Davis (cdavis@cois.on.ca) 03/27/1998 | |
7 | * Added support for the intersil on the sun4/4200 | |
8 | * | |
9 | * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998 | |
10 | * Support for MicroSPARC-IIep, PCI CPU. | |
11 | * | |
12 | * This file handles the Sparc specific time handling details. | |
13 | * | |
14 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | |
15 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | |
16 | */ | |
1da177e4 LT |
17 | #include <linux/errno.h> |
18 | #include <linux/module.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/param.h> | |
22 | #include <linux/string.h> | |
23 | #include <linux/mm.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/time.h> | |
c4cbe6f9 DM |
26 | #include <linux/rtc.h> |
27 | #include <linux/rtc/m48t59.h> | |
1da177e4 LT |
28 | #include <linux/timex.h> |
29 | #include <linux/init.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/ioport.h> | |
32 | #include <linux/profile.h> | |
454eeb2d | 33 | #include <linux/of.h> |
764f2579 | 34 | #include <linux/of_device.h> |
c4cbe6f9 | 35 | #include <linux/platform_device.h> |
1da177e4 LT |
36 | |
37 | #include <asm/oplib.h> | |
0299b137 | 38 | #include <asm/timex.h> |
1da177e4 | 39 | #include <asm/timer.h> |
1da177e4 LT |
40 | #include <asm/system.h> |
41 | #include <asm/irq.h> | |
42 | #include <asm/io.h> | |
43 | #include <asm/idprom.h> | |
44 | #include <asm/machines.h> | |
1da177e4 LT |
45 | #include <asm/page.h> |
46 | #include <asm/pcic.h> | |
0d84438d | 47 | #include <asm/irq_regs.h> |
1da177e4 | 48 | |
32231a66 AV |
49 | #include "irq.h" |
50 | ||
1da177e4 | 51 | DEFINE_SPINLOCK(rtc_lock); |
6943f3da SR |
52 | EXPORT_SYMBOL(rtc_lock); |
53 | ||
1da177e4 | 54 | static int set_rtc_mmss(unsigned long); |
1da177e4 | 55 | |
1da177e4 LT |
56 | unsigned long profile_pc(struct pt_regs *regs) |
57 | { | |
58 | extern char __copy_user_begin[], __copy_user_end[]; | |
59 | extern char __atomic_begin[], __atomic_end[]; | |
60 | extern char __bzero_begin[], __bzero_end[]; | |
1da177e4 LT |
61 | |
62 | unsigned long pc = regs->pc; | |
63 | ||
64 | if (in_lock_functions(pc) || | |
65 | (pc >= (unsigned long) __copy_user_begin && | |
66 | pc < (unsigned long) __copy_user_end) || | |
67 | (pc >= (unsigned long) __atomic_begin && | |
68 | pc < (unsigned long) __atomic_end) || | |
69 | (pc >= (unsigned long) __bzero_begin && | |
8a8b836b | 70 | pc < (unsigned long) __bzero_end)) |
1da177e4 LT |
71 | pc = regs->u_regs[UREG_RETPC]; |
72 | return pc; | |
73 | } | |
74 | ||
9550e59c MH |
75 | EXPORT_SYMBOL(profile_pc); |
76 | ||
1da177e4 | 77 | __volatile__ unsigned int *master_l10_counter; |
1da177e4 | 78 | |
0299b137 JS |
79 | u32 (*do_arch_gettimeoffset)(void); |
80 | ||
f5c9c9be JS |
81 | int update_persistent_clock(struct timespec now) |
82 | { | |
83 | return set_rtc_mmss(now.tv_sec); | |
84 | } | |
85 | ||
1da177e4 LT |
86 | /* |
87 | * timer_interrupt() needs to keep up the real-time clock, | |
4ea1b725 | 88 | * as well as call the "xtime_update()" routine every clocktick |
1da177e4 LT |
89 | */ |
90 | ||
91 | #define TICK_SIZE (tick_nsec / 1000) | |
92 | ||
5dc0742b | 93 | static irqreturn_t timer_interrupt(int dummy, void *dev_id) |
1da177e4 | 94 | { |
1da177e4 | 95 | #ifndef CONFIG_SMP |
0d84438d | 96 | profile_tick(CPU_PROFILING); |
1da177e4 LT |
97 | #endif |
98 | ||
1da177e4 LT |
99 | clear_clock_irq(); |
100 | ||
4ea1b725 | 101 | xtime_update(1); |
1da177e4 | 102 | |
aa02cd2d PZ |
103 | #ifndef CONFIG_SMP |
104 | update_process_times(user_mode(get_irq_regs())); | |
105 | #endif | |
1da177e4 LT |
106 | return IRQ_HANDLED; |
107 | } | |
108 | ||
c4cbe6f9 | 109 | static unsigned char mostek_read_byte(struct device *dev, u32 ofs) |
1da177e4 | 110 | { |
c4cbe6f9 DM |
111 | struct platform_device *pdev = to_platform_device(dev); |
112 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
12a9ee3c KH |
113 | |
114 | return readb(pdata->ioaddr + ofs); | |
1da177e4 LT |
115 | } |
116 | ||
c4cbe6f9 | 117 | static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) |
1da177e4 | 118 | { |
c4cbe6f9 DM |
119 | struct platform_device *pdev = to_platform_device(dev); |
120 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
12a9ee3c KH |
121 | |
122 | writeb(val, pdata->ioaddr + ofs); | |
1da177e4 LT |
123 | } |
124 | ||
c4cbe6f9 DM |
125 | static struct m48t59_plat_data m48t59_data = { |
126 | .read_byte = mostek_read_byte, | |
127 | .write_byte = mostek_write_byte, | |
128 | }; | |
129 | ||
130 | /* resource is set at runtime */ | |
131 | static struct platform_device m48t59_rtc = { | |
132 | .name = "rtc-m48t59", | |
133 | .id = 0, | |
134 | .num_resources = 1, | |
135 | .dev = { | |
136 | .platform_data = &m48t59_data, | |
137 | }, | |
138 | }; | |
96ba989d | 139 | |
4ebb24f7 | 140 | static int __devinit clock_probe(struct platform_device *op) |
1da177e4 | 141 | { |
61c7a080 | 142 | struct device_node *dp = op->dev.of_node; |
8271f042 | 143 | const char *model = of_get_property(dp, "model", NULL); |
1da177e4 | 144 | |
ee5caf0e DM |
145 | if (!model) |
146 | return -ENODEV; | |
1da177e4 | 147 | |
1c833bc3 KO |
148 | /* Only the primary RTC has an address property */ |
149 | if (!of_find_property(dp, "address", NULL)) | |
150 | return -ENODEV; | |
151 | ||
c4cbe6f9 | 152 | m48t59_rtc.resource = &op->resource[0]; |
ee5caf0e | 153 | if (!strcmp(model, "mk48t02")) { |
1da177e4 | 154 | /* Map the clock register io area read-only */ |
c4cbe6f9 DM |
155 | m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0, |
156 | 2048, "rtc-m48t59"); | |
157 | m48t59_data.type = M48T59RTC_TYPE_M48T02; | |
ee5caf0e | 158 | } else if (!strcmp(model, "mk48t08")) { |
c4cbe6f9 DM |
159 | m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0, |
160 | 8192, "rtc-m48t59"); | |
161 | m48t59_data.type = M48T59RTC_TYPE_M48T08; | |
ee5caf0e DM |
162 | } else |
163 | return -ENODEV; | |
1da177e4 | 164 | |
c4cbe6f9 DM |
165 | if (platform_device_register(&m48t59_rtc) < 0) |
166 | printk(KERN_ERR "Registering RTC device failed\n"); | |
96ba989d | 167 | |
ee5caf0e DM |
168 | return 0; |
169 | } | |
170 | ||
fd098316 | 171 | static struct of_device_id __initdata clock_match[] = { |
ee5caf0e DM |
172 | { |
173 | .name = "eeprom", | |
174 | }, | |
175 | {}, | |
176 | }; | |
177 | ||
4ebb24f7 | 178 | static struct platform_driver clock_driver = { |
ee5caf0e | 179 | .probe = clock_probe, |
4018294b GL |
180 | .driver = { |
181 | .name = "rtc", | |
182 | .owner = THIS_MODULE, | |
183 | .of_match_table = clock_match, | |
a2cd1558 | 184 | }, |
ee5caf0e DM |
185 | }; |
186 | ||
187 | ||
188 | /* Probe for the mostek real time clock chip. */ | |
96ba989d | 189 | static int __init clock_init(void) |
ee5caf0e | 190 | { |
4ebb24f7 | 191 | return platform_driver_register(&clock_driver); |
1da177e4 | 192 | } |
96ba989d BB |
193 | /* Must be after subsys_initcall() so that busses are probed. Must |
194 | * be before device_initcall() because things like the RTC driver | |
195 | * need to see the clock registers. | |
196 | */ | |
197 | fs_initcall(clock_init); | |
96ba989d | 198 | |
1da177e4 | 199 | |
0299b137 | 200 | u32 sbus_do_gettimeoffset(void) |
1da177e4 | 201 | { |
000775c5 DM |
202 | unsigned long val = *master_l10_counter; |
203 | unsigned long usec = (val >> 10) & 0x1fffff; | |
204 | ||
205 | /* Limit hit? */ | |
206 | if (val & 0x80000000) | |
207 | usec += 1000000 / HZ; | |
208 | ||
0299b137 | 209 | return usec * 1000; |
1da177e4 LT |
210 | } |
211 | ||
1da177e4 | 212 | |
0299b137 | 213 | u32 arch_gettimeoffset(void) |
1da177e4 | 214 | { |
0299b137 JS |
215 | if (unlikely(!do_arch_gettimeoffset)) |
216 | return 0; | |
217 | return do_arch_gettimeoffset(); | |
1da177e4 LT |
218 | } |
219 | ||
0299b137 | 220 | static void __init sbus_time_init(void) |
1da177e4 | 221 | { |
0299b137 | 222 | do_arch_gettimeoffset = sbus_do_gettimeoffset; |
1da177e4 | 223 | |
0299b137 | 224 | btfixup(); |
1da177e4 | 225 | |
bbdc2661 | 226 | sparc_irq_config.init_timers(timer_interrupt); |
0299b137 | 227 | } |
1da177e4 | 228 | |
0299b137 JS |
229 | void __init time_init(void) |
230 | { | |
231 | #ifdef CONFIG_PCI | |
232 | extern void pci_time_init(void); | |
233 | if (pcic_present()) { | |
234 | pci_time_init(); | |
235 | return; | |
236 | } | |
237 | #endif | |
238 | sbus_time_init(); | |
1da177e4 LT |
239 | } |
240 | ||
0299b137 | 241 | |
c4cbe6f9 | 242 | static int set_rtc_mmss(unsigned long secs) |
1da177e4 | 243 | { |
c4cbe6f9 | 244 | struct rtc_device *rtc = rtc_class_open("rtc0"); |
ab138c03 | 245 | int err = -1; |
1da177e4 | 246 | |
ab138c03 DM |
247 | if (rtc) { |
248 | err = rtc_set_mmss(rtc, secs); | |
249 | rtc_class_close(rtc); | |
250 | } | |
1da177e4 | 251 | |
ab138c03 | 252 | return err; |
1da177e4 | 253 | } |